/openbmc/linux/arch/powerpc/boot/dts/fsl/ |
H A D | t2080rdb.dts | 61 phy-connection-type = "xgmii"; 66 phy-connection-type = "xgmii"; 81 phy-connection-type = "xgmii"; 86 phy-connection-type = "xgmii";
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H A D | t2080qds.dts | 67 phy-connection-type = "xgmii"; 72 phy-connection-type = "xgmii"; 97 phy-connection-type = "xgmii"; 102 phy-connection-type = "xgmii";
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H A D | t4240rdb.dts | 185 phy-connection-type = "xgmii"; 190 phy-connection-type = "xgmii"; 225 phy-connection-type = "xgmii"; 230 phy-connection-type = "xgmii";
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H A D | b4860qds.dts | 69 phy-connection-type = "xgmii"; 74 phy-connection-type = "xgmii";
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H A D | t4240qds.dts | 511 phy-connection-type = "xgmii"; 516 phy-connection-type = "xgmii"; 587 phy-connection-type = "xgmii"; 592 phy-connection-type = "xgmii";
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H A D | t2081qds.dts | 89 phy-connection-type = "xgmii"; 94 phy-connection-type = "xgmii";
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H A D | p4080ds.dts | 217 phy-connection-type = "xgmii"; 244 phy-connection-type = "xgmii";
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H A D | p5040ds.dts | 201 phy-connection-type = "xgmii"; 229 phy-connection-type = "xgmii";
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | nixge.txt | 38 phy-mode = "xgmii"; 61 phy-mode = "xgmii"; 77 phy-mode = "xgmii";
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H A D | samsung-sxgbe.txt | 14 Supported values are: "sgmii", "xgmii". 51 phy-mode = "xgmii";
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H A D | amd-xgbe.txt | 67 phy-mode = "xgmii";
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/openbmc/linux/arch/arm64/boot/dts/amd/ |
H A D | amd-seattle-xgbe-b.dtsi | 57 phy-mode = "xgmii"; 83 phy-mode = "xgmii";
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/openbmc/u-boot/board/freescale/corenet_ds/ |
H A D | eth_hydra.c | 9 * the RGMII/SGMII/XGMII PHYs on a Freescale P3041/P5020 "Hydra" reference 12 * XGMII PHY is provided via the XAUI riser card. Since there is only one 19 * inserted in. The EMI2 bits control muxing for the the XGMII. Like SGMII, 262 /* If it's not RGMII or XGMII, it must be SGMII */ in board_ft_fman_fixup_port()
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H A D | eth_superhydra.c | 9 * the RGMII/SGMII/XGMII PHYs on a Freescale P5040 "Super Hydra" reference 12 * XGMII PHYs are provided via the XAUI riser card. The P5040 has 2 FMans 19 * inserted in. The EMI2 bits control muxing for the the XGMII. Like SGMII, 220 /* RGMII and XGMII are already mapped correctly in the DTS */ in board_ft_fman_fixup_port()
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/openbmc/linux/arch/arm/boot/dts/nxp/vf/ |
H A D | vf610-zii-scu4-aib.dts | 114 phy-mode = "xgmii"; 161 phy-mode = "xgmii"; 174 phy-mode = "xgmii"; 328 phy-mode = "xgmii";
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/openbmc/u-boot/doc/device-tree-bindings/net/ |
H A D | ethernet.txt | 14 "rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto
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/openbmc/u-boot/include/ |
H A D | phy_interface.h | 53 [PHY_INTERFACE_MODE_XGMII] = "xgmii",
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | fsl-ls1046a-qds.dts | 227 phy-connection-type = "xgmii"; 232 phy-connection-type = "xgmii";
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H A D | fsl-ls1046a-rdb.dts | 152 phy-connection-type = "xgmii";
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/openbmc/u-boot/include/configs/ |
H A D | lx2160ardb.h | 59 #define CONFIG_ETHPRIME "DPMAC1@xgmii"
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | transmit-amplitude.yaml | 41 - xgmii
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/openbmc/linux/Documentation/ABI/testing/ |
H A D | sysfs-class-net-phydev | 43 xgmii, moca, qsgmii, trgmii, 1000base-x, 2500base-x, rxaui,
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/openbmc/linux/drivers/net/ethernet/ti/ |
H A D | cpsw_sl.h | 42 CPSW_SL_CTL_XGMII_EN = BIT(13), /* XGMII Enable */
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/openbmc/u-boot/board/freescale/b4860qds/ |
H A D | eth_b4860qds.c | 11 * the RGMII/SGMII/XGMII PHYs on a Freescale B4860 "Centaur". The SGMII 13 * The 10Gb XGMII PHY is provided via the XAUI riser card. There is only
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/openbmc/u-boot/drivers/net/fm/ |
H A D | memac.c | 105 /* Enable automatic speed selection for Non-XGMII */ in memac_set_interface_mode()
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