xref: /openbmc/linux/Documentation/devicetree/bindings/net/amd-xgbe.txt (revision c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2)
17c123b6aSLendacky, Thomas* AMD 10GbE driver (amd-xgbe)
27c123b6aSLendacky, Thomas
334bfff40SLendacky, ThomasRequired properties:
47c123b6aSLendacky, Thomas- compatible: Should be "amd,xgbe-seattle-v1a"
57c123b6aSLendacky, Thomas- reg: Address and length of the register sets for the device
67c123b6aSLendacky, Thomas   - MAC registers
77c123b6aSLendacky, Thomas   - PCS registers
834bfff40SLendacky, Thomas   - SerDes Rx/Tx registers
934bfff40SLendacky, Thomas   - SerDes integration registers (1/2)
1034bfff40SLendacky, Thomas   - SerDes integration registers (2/2)
119227dc5eSLendacky, Thomas- interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt
129227dc5eSLendacky, Thomas  listed is required and is the general device interrupt. If the optional
139227dc5eSLendacky, Thomas  amd,per-channel-interrupt property is specified, then one additional
1434bfff40SLendacky, Thomas  interrupt for each DMA channel supported by the device should be specified.
1534bfff40SLendacky, Thomas  The last interrupt listed should be the PCS auto-negotiation interrupt.
1623e4eef7SLendacky, Thomas- clocks:
1723e4eef7SLendacky, Thomas   - DMA clock for the amd-xgbe device (used for calculating the
1823e4eef7SLendacky, Thomas     correct Rx interrupt watchdog timer value on a DMA channel
1923e4eef7SLendacky, Thomas     for coalescing)
2023e4eef7SLendacky, Thomas   - PTP clock for the amd-xgbe device
2123e4eef7SLendacky, Thomas- clock-names: Should be the names of the clocks
2223e4eef7SLendacky, Thomas   - "dma_clk" for the DMA clock
2323e4eef7SLendacky, Thomas   - "ptp_clk" for the PTP clock
247c123b6aSLendacky, Thomas- phy-mode: See ethernet.txt file in the same directory
257c123b6aSLendacky, Thomas
2634bfff40SLendacky, ThomasOptional properties:
271a2a909bSLendacky, Thomas- dma-coherent: Present if dma operations are coherent
289227dc5eSLendacky, Thomas- amd,per-channel-interrupt: Indicates that Rx and Tx complete will generate
299227dc5eSLendacky, Thomas  a unique interrupt for each DMA channel - this requires an additional
309227dc5eSLendacky, Thomas  interrupt be configured for each DMA channel
317c12aa08SLendacky, Thomas- amd,speed-set: Speed capabilities of the device
327c12aa08SLendacky, Thomas    0 - 1GbE and 10GbE (default)
337c12aa08SLendacky, Thomas    1 - 2.5GbE and 10GbE
347c12aa08SLendacky, Thomas
35*687e3d55SPetr ŠtetiarThe MAC address will be determined using the optional properties defined in
36*687e3d55SPetr Štetiarethernet.txt.
37*687e3d55SPetr Štetiar
387c12aa08SLendacky, ThomasThe following optional properties are represented by an array with each
397c12aa08SLendacky, Thomasvalue corresponding to a particular speed. The first array value represents
407c12aa08SLendacky, Thomasthe setting for the 1GbE speed, the second value for the 2.5GbE speed and
417c12aa08SLendacky, Thomasthe third value for the 10GbE speed.  All three values are required if the
427c12aa08SLendacky, Thomasproperty is used.
437c12aa08SLendacky, Thomas- amd,serdes-blwc: Baseline wandering correction enablement
447c12aa08SLendacky, Thomas    0 - Off
457c12aa08SLendacky, Thomas    1 - On
467c12aa08SLendacky, Thomas- amd,serdes-cdr-rate: CDR rate speed selection
477c12aa08SLendacky, Thomas- amd,serdes-pq-skew: PQ (data sampling) skew
487c12aa08SLendacky, Thomas- amd,serdes-tx-amp: TX amplitude boost
497c12aa08SLendacky, Thomas- amd,serdes-dfe-tap-config: DFE taps available to run
507c12aa08SLendacky, Thomas- amd,serdes-dfe-tap-enable: DFE taps to enable
517c12aa08SLendacky, Thomas
527c123b6aSLendacky, ThomasExample:
537c123b6aSLendacky, Thomas	xgbe@e0700000 {
547c123b6aSLendacky, Thomas		compatible = "amd,xgbe-seattle-v1a";
557c123b6aSLendacky, Thomas		reg = <0 0xe0700000 0 0x80000>,
5634bfff40SLendacky, Thomas		      <0 0xe0780000 0 0x80000>,
5734bfff40SLendacky, Thomas		      <0 0xe1240800 0 0x00400>,
587c12aa08SLendacky, Thomas		      <0 0xe1250000 0 0x00060>,
597c12aa08SLendacky, Thomas		      <0 0xe1250080 0 0x00004>;
607c12aa08SLendacky, Thomas		interrupt-parent = <&gic>;
6134bfff40SLendacky, Thomas		interrupts = <0 325 4>,
6234bfff40SLendacky, Thomas			     <0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>,
6334bfff40SLendacky, Thomas			     <0 323 4>;
6434bfff40SLendacky, Thomas		amd,per-channel-interrupt;
6534bfff40SLendacky, Thomas		clocks = <&xgbe_dma_clk>, <&xgbe_ptp_clk>;
6634bfff40SLendacky, Thomas		clock-names = "dma_clk", "ptp_clk";
6734bfff40SLendacky, Thomas		phy-mode = "xgmii";
6834bfff40SLendacky, Thomas		mac-address = [ 02 a1 a2 a3 a4 a5 ];
697c12aa08SLendacky, Thomas		amd,speed-set = <0>;
707c12aa08SLendacky, Thomas		amd,serdes-blwc = <1>, <1>, <0>;
717c12aa08SLendacky, Thomas		amd,serdes-cdr-rate = <2>, <2>, <7>;
727c12aa08SLendacky, Thomas		amd,serdes-pq-skew = <10>, <10>, <30>;
737c12aa08SLendacky, Thomas		amd,serdes-tx-amp = <15>, <15>, <10>;
747c12aa08SLendacky, Thomas		amd,serdes-dfe-tap-config = <3>, <3>, <1>;
757c12aa08SLendacky, Thomas		amd,serdes-dfe-tap-enable = <0>, <0>, <127>;
767c12aa08SLendacky, Thomas	};
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