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/openbmc/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-goramo-multilink.dts1 // SPDX-License-Identifier: ISC
5 * - MultiLink Basic (a box)
6 * - MultiLink Max (19" rack mount)
9 * This is one of the few devices supporting the IXP4xx High-Speed Serial
14 /dts-v1/;
16 #include "intel-ixp42x.dtsi"
17 #include <dt-bindings/input/input.h>
21 compatible = "goramo,multilink-router", "intel,ixp42x";
22 #address-cells = <1>;
23 #size-cells = <1>;
[all …]
H A Dintel-ixp42x-linksys-wrv54g.dts1 // SPDX-License-Identifier: ISC
9 /dts-v1/;
11 #include "intel-ixp42x.dtsi"
12 #include <dt-bindings/input/input.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
28 stdout-path = "uart1:115200n8";
39 compatible = "gpio-leds";
40 led-power {
42 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
[all …]
H A Dintel-ixp42x-freecom-fsg-3.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for the Freecom FSG-3 router.
8 /dts-v1/;
10 #include "intel-ixp42x.dtsi"
11 #include <dt-bindings/input/input.h>
14 model = "Freecom FSG-3";
15 compatible = "freecom,fsg-3", "intel,ixp42x";
16 #address-cells = <1>;
17 #size-cells = <1>;
28 stdout-path = "uart0:115200n8";
[all …]
H A Dintel-ixp42x-iomega-nas100d.dts1 // SPDX-License-Identifier: ISC
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
9 #include <dt-bindings/input/input.h>
13 compatible = "iom,nas-100d", "intel,ixp42x";
14 #address-cells = <1>;
15 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-wlan {
[all …]
H A Dintel-ixp42x-linksys-nslu2.dts1 // SPDX-License-Identifier: ISC
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-status {
36 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
[all …]
H A Dintel-ixp42x-gateworks-gw2348.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp42x.dtsi"
10 #include <dt-bindings/input/input.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-user {
36 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
[all …]
H A Dintel-ixp43x-gateworks-gw2358.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for Gateworks IXP43x-based Cambria GW2358
6 /dts-v1/;
8 #include "intel-ixp43x.dtsi"
13 #address-cells = <1>;
14 #size-cells = <1>;
24 stdout-path = "uart0:115200n8";
32 compatible = "gpio-leds";
33 led-user {
35 gpios = <&pld1 0 GPIO_ACTIVE_LOW>;
[all …]
/openbmc/linux/drivers/staging/iio/resolver/
H A Dad2s1210.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2010 Analog Devices Inc.
79 static const struct ad2s1210_gpio gpios[] = { variable
87 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
92 struct gpio_desc *gpios[5]; member
93 unsigned int fclkin;
94 unsigned int fexcit;
98 u8 rx[2] __aligned(IIO_DMA_MINALIGN);
102 static const int ad2s1210_mode_vals[4][2] = {
111 gpiod_set_value(st->gpios[AD2S1210_A0], ad2s1210_mode_vals[mode][0]); in ad2s1210_set_mode()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Dmicrochip,mcp251xfd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip MCP2517FD, MCP2518FD and MCP251863 stand-alone CAN controller
10 - Marc Kleine-Budde <mkl@pengutronix.de>
13 - $ref: can-controller.yaml#
18 - enum:
19 - microchip,mcp2517fd
20 - microchip,mcp2518fd
21 - microchip,mcp251xfd
[all …]
/openbmc/linux/drivers/tty/serial/
H A Dstm32-usart.c1 // SPDX-License-Identifier: GPL-2.0
9 * Inspired by st-asc.c from STMicroelectronics (c)
15 #include <linux/dma-direction.h>
17 #include <linux/dma-mapping.h>
36 #include "stm32-usart.h"
120 val = readl_relaxed(port->membase + reg); in stm32_usart_set_bits()
122 writel_relaxed(val, port->membase + reg); in stm32_usart_set_bits()
129 val = readl_relaxed(port->membase + reg); in stm32_usart_clr_bits()
131 writel_relaxed(val, port->membase + reg); in stm32_usart_clr_bits()
134 static unsigned int stm32_usart_tx_empty(struct uart_port *port) in stm32_usart_tx_empty()
[all …]
H A Dar933x_uart.c1 // SPDX-License-Identifier: GPL-2.0
3 * Atheros AR933X SoC built-in UART driver
31 #include <asm/mach-ath79/ar933x_uart.h>
35 #define DRIVER_NAME "ar933x-uart"
49 unsigned int ier; /* shadow Interrupt Enable Register */
50 unsigned int min_baud;
51 unsigned int max_baud;
53 struct mctrl_gpios *gpios; member
57 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, in ar933x_uart_read()
58 int offset) in ar933x_uart_read()
[all …]
H A Dcpm_uart.c1 // SPDX-License-Identifier: GPL-2.0+
14 * (C) 2005-2006 MontaVista Software, Inc.
28 #include <linux/dma-mapping.h>
50 static int cpm_uart_tx_pump(struct uart_port *port);
57 static void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) in cpm_line_cr_cmd()
59 cpm_command(port->command, cmd); in cpm_line_cr_cmd()
65 static unsigned int cpm_uart_tx_empty(struct uart_port *port) in cpm_uart_tx_empty()
69 cbd_t __iomem *bdp = pinfo->tx_bd_base; in cpm_uart_tx_empty()
70 int ret = 0; in cpm_uart_tx_empty()
73 if (in_be16(&bdp->cbd_sc) & BD_SC_READY) in cpm_uart_tx_empty()
[all …]
H A Dstm32-usart.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #define DRIVER_NAME "stm32-usart"
31 int fifosize;
182 #define RX_BUF_L 4096 /* dma rx buffer length */
183 #define RX_BUF_P (RX_BUF_L / 2) /* dma rx buffer period */
192 struct dma_chan *rx_ch; /* dma rx channel */
193 dma_addr_t rx_dma_buf; /* dma rx buffer bus address */
194 unsigned char *rx_buf; /* dma rx buffer cpu address */
200 int last_res;
202 bool rx_dma_busy; /* dma rx transaction in progress */
[all …]
H A Dmxs-auart.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
11 * Copyright 2008-2010 Freescale Semiconductor, Inc.
34 #include <linux/dma-mapping.h>
90 #define AUART_LINECTRL_WLEN(v) ((((v) - 5) & 0x3) << 5)
124 * RW. Tell the UART to execute the RX DMA Command. The
131 * RW. RX TIMEOUT Enable. Valid for FIFO and DMA.
132 * Warning: If this bit is set to 0, the RX timeout will not affect receive DMA
138 * RW. Receive Timeout Counter Value: number of 8-bit-time to wait before
139 * asserting timeout on the RX input. If the RXFIFO is not empty and the RX
[all …]
H A Dimx.c1 // SPDX-License-Identifier: GPL-2.0+
30 #include <linux/dma-mapping.h>
33 #include <linux/dma/imx-dma.h>
125 #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7)
154 #define UTS_LOOP (1<<12) /* Loop tx and rx */
161 /* We've been assigned a range on the "Low-density serial ports" major */
174 #define DRIVER_NAME "IMX-uart"
202 unsigned int old_status;
203 unsigned int have_rtscts:1;
204 unsigned int have_rtsgpio:1;
[all …]
H A Datmel_serial.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/clk-provider.h>
24 #include <linux/dma-mapping.h>
46 * These two offsets are substracted from the RX FIFO size to define the RTS
62 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
71 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
84 unsigned int dma_size;
85 unsigned int ofs;
114 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
116 int break_active; /* break being received */
[all …]
H A Dpic32_uart.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Sorin-Andrei Pistirica <andrei.pistirica@microchip.com>
26 #include <asm/mach-pic32/pic32.h>
29 #define PIC32_DEV_NAME "pic32-uart"
43 /* struct pic32_sport - pic32 serial port descriptor
48 * @irq_rx: virtual rx interrupt number
49 * @irq_rx_name: irq rx name
57 int idx;
59 int irq_fault;
61 int irq_rx;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsun4i-a10-pcduino.dts5 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
45 #include "sun4i-a10.dtsi"
46 #include "sunxi-common-regulators.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/input.h>
53 compatible = "linksprite,a10-pcduino", "allwinner,sun4i-a10";
60 stdout-path = "serial0:115200n8";
64 compatible = "gpio-leds";
68 gpios = <&pio 7 15 GPIO_ACTIVE_LOW>;
[all …]
H A Dsun7i-a20-pcduino3.dts5 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
45 #include "sun7i-a20.dtsi"
46 #include "sunxi-common-regulators.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/input.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
54 compatible = "linksprite,pcduino3", "allwinner,sun7i-a20";
61 stdout-path = "serial0:115200n8";
65 compatible = "gpio-leds";
[all …]
/openbmc/u-boot/drivers/spi/
H A Dpic32_spi.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <dt-bindings/clock/microchip,clock.h>
37 #define PIC32_SPI_CTRL_SMP BIT(9) /* Rx at middle or end of tx */
67 u32 speed_hz; /* spi-clk rate */
68 int mode;
73 const void *rx; member
84 writel(PIC32_SPI_CTRL_ON, &priv->regs->ctrl.set); in pic32_spi_enable()
89 writel(PIC32_SPI_CTRL_ON, &priv->regs->ctrl.clr); in pic32_spi_disable()
94 u32 sr = readl(&priv->regs->status.raw); in pic32_spi_rx_fifo_level()
101 u32 sr = readl(&priv->regs->status.raw); in pic32_spi_tx_fifo_level()
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j721e-beagleboneai64.dts1 // SPDX-License-Identifier: GPL-2.0
3 * https://beagleboard.org/ai-64
4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include "k3-j721e.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
16 #include <dt-bindings/phy/phy-cadence.h>
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun7i-a20-pcduino3.dts5 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
45 #include "sun7i-a20.dtsi"
46 #include "sunxi-common-regulators.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/input.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
54 compatible = "linksprite,pcduino3", "allwinner,sun7i-a20";
61 stdout-path = "serial0:115200n8";
65 compatible = "gpio-leds";
[all …]
H A Dsun4i-a10-pcduino.dts5 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
45 #include "sun4i-a10.dtsi"
46 #include "sunxi-common-regulators.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/input.h>
53 compatible = "linksprite,a10-pcduino", "allwinner,sun4i-a10";
60 stdout-path = "serial0:115200n8";
64 compatible = "gpio-leds";
66 led-0 {
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-qcard.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
34 wcd9385: audio-codec-1 {
35 compatible = "qcom,wcd9385-codec";
36 pinctrl-names = "default", "sleep";
37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
38 pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
[all …]

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