Revision tags: v6.6.67, v6.6.66, v6.6.65, v6.6.64, v6.6.63, v6.6.62, v6.6.61, v6.6.60, v6.6.59, v6.6.58, v6.6.57, v6.6.56, v6.6.55 |
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34d6f206 |
| 07-Oct-2024 |
Andrew Jeffery <andrew@codeconstruct.com.au> |
Merge tag 'v6.6.54' into for/openbmc/dev-6.6
This is the 6.6.54 stable release
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Revision tags: v6.6.54, v6.6.53, v6.6.52, v6.6.51, v6.6.50, v6.6.49, v6.6.48, v6.6.47, v6.6.46, v6.6.45, v6.6.44 |
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7c84cb5a |
| 01-Aug-2024 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x carveout locations
[ Upstream commit 1a314099b7559690fe23cdf3300dfff6e830ecb1 ]
The DMA carveout for the C6x core 0 is at 0xa6000000 and co
arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x carveout locations
[ Upstream commit 1a314099b7559690fe23cdf3300dfff6e830ecb1 ]
The DMA carveout for the C6x core 0 is at 0xa6000000 and core 1 is at 0xa7000000. These are reversed in DT. While both C6x can access either region, so this is not normally a problem, but if we start restricting the memory each core can access (such as with firewalls) the cores accessing the regions for the wrong core will not work. Fix this here.
Fixes: fae14a1cb8dd ("arm64: dts: ti: Add k3-j721e-beagleboneai64") Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240801181232.55027-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v6.6.43, v6.6.42, v6.6.41, v6.6.40, v6.6.39, v6.6.38, v6.6.37, v6.6.36, v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3 |
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c900529f |
| 12-Sep-2023 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-fixes into drm-misc-fixes
Forwarding to v6.6-rc1.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
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Revision tags: v6.5.2, v6.1.51, v6.5.1 |
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0e72db77 |
| 30-Aug-2023 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann: "These are the devicetree updates for Arm and RISC-V based SoCs, main
Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann: "These are the devicetree updates for Arm and RISC-V based SoCs, mainly from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and Starfive.
Only a few new SoC got added:
- TI AM62P5, a variant of the existing Sitara AM62x family
- Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55 SoC.
- Qualcomm ipq5018 is used in wireless access points
- Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone platform.
In total, 29 machines get added, which is low because of the summer break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST, Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of these are development and reference boards.
Despite not adding a lot of new machines, there are over 700 patches in total, most of which are cleanups and minor fixes"
* tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits) arm64: dts: use capital "OR" for multiple licenses in SPDX ARM: dts: use capital "OR" for multiple licenses in SPDX arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved ARM: dts: qcom: apq8064: add support to gsbi4 uart riscv: dts: change TH1520 files to dual license riscv: dts: thead: add BeagleV Ahead board device tree dt-bindings: riscv: Add BeagleV Ahead board compatibles ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs ARM: dts: stm32: support display on stm32f746-disco board ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco ARM: dts: stm32: add pin map for LTDC on stm32f7 ARM: dts: stm32: add ltdc support on stm32f746 MCU arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Add PDC riscv: dts: starfive: fix jh7110 qspi sort order ...
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Revision tags: v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46 |
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99355a23 |
| 14-Aug-2023 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.6
New Boards: - TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL ca
Merge tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.6
New Boards: - TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board - TI's AM62P5 Starter Kit (SK)
New features: AM625: - Support for Display (parallel only) - hdmi+audio support for AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support for verdin. - MCU MCAN support and enable of Toradex Verdin - Toradex Verdin Dahlia audio support AM62A7: - MCU MCAN support - Enable USB Dual Role Device(DRD) support for AM62A7 Starter Kit(SK). AM64: - TQ group's tqma64xxl: Overlays for SD-card and wlan. J721E: - Main domain CPSW9G and correponding gateway/ethernet switch expansion - GESI board. J721S2/AM68: - New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support - Main domain CPSW2G and correponding gateway/ethernet switch expansion - GESI board. J784S4/AM69: - Boot phase tag marking in device tree - UFS support
Cleanups and non-urgent fixes: - Cosmetic style fixups around "=" and "{" whitespace usage. - Fixups across multiple SoCs/boards for pwm-tbclk to matchup with bindings - Serdes header file include/dt-bindings/mux/ti-serdes.h is now deprecated, use k3-serdes.h in soc dtsi folder. - All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the board level. - Fixups for AM62: Crypto powerdomains are conditional to better represent control of the crypto engines by security controller. - Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board. - Fixups for j721s2/am68: pimux offsets for OSPI. - Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt ranges for wkup/main gpios
* tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (68 commits) arm64: dts: ti: verdin-am62: Add DSI display support arm64: dts: ti: Add support for the AM62P5 Starter Kit arm64: dts: ti: Introduce AM62P5 family of SoCs dt-bindings: arm: ti: Add bindings for AM62P5 SoCs arm64: dts: ti: k3-am69-sk: Add phase tags marking arm64: dts: ti: k3-j784s4-evm: Add phase tags marking arm64: dts: ti: k3-j784s4: Add phase tags marking arm64: dts: ti: k3-am625-beagleplay: Add HDMI support arm64: dts: ti: am62x-sk: Add overlay for HDMI audio arm64: dts: ti: k3-am62x-sk-common: Add HDMI support arm64: dts: ti: k3-am62-main: Add node for DSS arm64: dts: ti: k3-am62x-sk-common: Update main-i2c1 frequency arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level arm64: dts: ti: k3-j784s4: Enable C7x DSP nodes at the board level arm64: dts: ti: k3-j721e: Enable C7x DSP nodes at the board level arm64: dts: ti: k3-*: fix fss node dtbs check warnings arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level ...
Link: https://lore.kernel.org/r/20230814160651.frxohyshd2evp2k4@expenses Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v6.1.45 |
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00ae4c39 |
| 09-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
C6x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with
arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
C6x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with both mboxes and memory-region information.
As theses only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the C6x DSP nodes in the dtsi files and only enable the ones that are given the required mboxes and memory-region on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Hari Nagalla <hnagalla@ti.com> Tested-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230809180145.53158-3-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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35dba715 |
| 09-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-j721e: Enable C7x DSP nodes at the board level
C7x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with
arm64: dts: ti: k3-j721e: Enable C7x DSP nodes at the board level
C7x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with both mboxes and memory-region information.
As theses only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the C7x DSP nodes in the dtsi files and only enable the ones that are given the required mboxes and memory-region on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Hari Nagalla <hnagalla@ti.com> Tested-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230809180145.53158-1-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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a5a4cdda |
| 09-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level
TSCADC nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pin
arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level
TSCADC nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and/or device information.
Disable the TSCADC nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-12-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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8757108b |
| 09-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-j721e: Enable GPIO nodes at the board level
GPIO nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux
arm64: dts: ti: k3-j721e: Enable GPIO nodes at the board level
GPIO nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information.
Disable the GPIO nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-9-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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73676c48 |
| 09-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level
OSPI nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux
arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level
OSPI nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information.
As the attached OSPI device is only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the OSPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-6-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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6fbd1310 |
| 09-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level
SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended.
As the
arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level
SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended.
As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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Revision tags: v6.1.44 |
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2612e3bb |
| 07-Aug-2023 |
Rodrigo Vivi <rodrigo.vivi@intel.com> |
Merge drm/drm-next into drm-intel-next
Catching-up with drm-next and drm-intel-gt-next. It will unblock a code refactor around the platform definitions (names vs acronyms).
Signed-off-by: Rodrigo V
Merge drm/drm-next into drm-intel-next
Catching-up with drm-next and drm-intel-gt-next. It will unblock a code refactor around the platform definitions (names vs acronyms).
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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9f771739 |
| 07-Aug-2023 |
Joonas Lahtinen <joonas.lahtinen@linux.intel.com> |
Merge drm/drm-next into drm-intel-gt-next
Need to pull in b3e4aae612ec ("drm/i915/hdcp: Modify hdcp_gsc_message msg sending mechanism") as a dependency for https://patchwork.freedesktop.org/series/1
Merge drm/drm-next into drm-intel-gt-next
Need to pull in b3e4aae612ec ("drm/i915/hdcp: Modify hdcp_gsc_message msg sending mechanism") as a dependency for https://patchwork.freedesktop.org/series/121735/
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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Revision tags: v6.1.43, v6.1.42, v6.1.41 |
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61b73694 |
| 24-Jul-2023 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-next into drm-misc-next
Backmerging to get v6.5-rc2.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
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Revision tags: v6.1.40, v6.1.39 |
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0791faeb |
| 17-Jul-2023 |
Mark Brown <broonie@kernel.org> |
ASoC: Merge v6.5-rc2
Get a similar baseline to my other branches, and fixes for people using the branch.
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2f98e686 |
| 11-Jul-2023 |
Maxime Ripard <mripard@kernel.org> |
Merge v6.5-rc1 into drm-misc-fixes
Boris needs 6.5-rc1 in drm-misc-fixes to prevent a conflict.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
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Revision tags: v6.1.38, v6.1.37 |
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44f10dbe |
| 30-Jun-2023 |
Andrew Morton <akpm@linux-foundation.org> |
Merge branch 'master' into mm-hotfixes-stable
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6c1561fb |
| 29-Jun-2023 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC devicetree updates from Arnd Bergmann: "The biggest change this time is for the 32-bit devicetree files,
Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC devicetree updates from Arnd Bergmann: "The biggest change this time is for the 32-bit devicetree files, which are all moved to a new location, using separate subdirectories for each SoC vendor, following the same scheme that is used on arm64, mips and riscv. This has been discussed for many years, but so far we never did this as there was a plan to move the files out of the kernel entirely, which has never happened.
The impact of this will be that all external patches no longer apply, and anything depending on the location of the dtb files in the build directory will have to change. The installed files after 'make dtbs_install' keep the current location.
There are six added SoCs here that are largely variants of previously added chips. Two other chips are added in a separate branch along with their device drivers.
- The Samsung Exynos 4212 makes its return after the Samsung Galaxy Express phone is addded at last. The SoC support was originally added in 2012 but removed again in 2017 as it was unused at the time.
- Amlogic C3 is a Cortex-A35 based smart IP camera chip
- Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of the still common MSM8916 (Snapdragon 410) phone chip that has been supported for a long time.
- Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end laptop chips, used in the Lenovo Flex 5G, which is added along with the reference board.
- Qualcomm SDX75 is the latest generation modem chip that is used as a peripherial in phones but can also run a standalone Linux. Unlike the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.
- Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the Xuantie C910 core, a step up from all previously added rv64 chips.
All of the above come with reference board implementations, those included there are 39 new board files, but only five more 32-bit this time, probably a new low:
- Marantec Maveo board based on dhcor imx6ull module
- Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip
- Epson Moverio BT-200 AR glasses based on TI OMAP4
- PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM
- ICnova ADB4006 board based on Allwinner A20
On the 64-bit side, there are also fewer addded machines than we had in the recent releases:
- Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.
- NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234
- Qualcomm gains support for 6 reference boards on various members of their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top of the various reference platforms for their new chips.
- Rockchips support for several newer boards: Indiedroid Nova (rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn Fastrhino R66S/R68S (rk3568)
- TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex Verdin family with AM62 COM, carrier and dev boards
Other changes to existing boards contain the usual minor improvements along with
- continued updates to clean up dts files based on dtc warnings and binding checks, in particular cache properties and node names
- support for devicetree overlays on at91, bcm283x
- significant additions to existing SoC support on mediatek, qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST STM32MP1
As usual, a lot more detail is available in the individual merge commits"
* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits) ARM: mvebu: fix unit address on armada-390-db flash ARM: dts: Move .dts files to vendor sub-directories kbuild: Support flat DTBs install ARM: dts: Add .dts files missing from the build ARM: dts: allwinner: Use quoted #include ARM: dts: lan966x: kontron-d10: add PHY interrupts ARM: dts: lan966x: kontron-d10: fix SPI CS ARM: dts: lan966x: kontron-d10: fix board reset ARM: dts: at91: Enable device-tree overlay support for AT91 boards arm: dts: Enable device-tree overlay support for AT91 boards arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller ARM: dts: at91: use generic name for shutdown controller ARM: dts: BCM5301X: Add cells sizes to PCIe nodes dt-bindings: firmware: brcm,kona-smc: convert to YAML riscv: dts: sort makefile entries by directory riscv: defconfig: enable T-HEAD SoC MAINTAINERS: add entry for T-HEAD RISC-V SoC riscv: dts: thead: add sipeed Lichee Pi 4A board device tree riscv: dts: add initial T-HEAD TH1520 SoC device tree riscv: Add the T-HEAD SoC family Kconfig option ...
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Revision tags: v6.1.36, v6.4, v6.1.35 |
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#
af3c6847 |
| 20-Jun-2023 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'ti-k3-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.5
New Boards: phyBOARD-Lyra-AM625 Board support Toradex Verdin
Merge tag 'ti-k3-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.5
New Boards: phyBOARD-Lyra-AM625 Board support Toradex Verdin AM62 COM, carrier and dev boards
New features: Across K3 SoCs: - Error Signaling Module(ESM) and Secproxy IPC modules - On board I2C EEPROM - Voltage Temp Monitoring (VTM) module - DM timers (GP Timers) J784s4: - R5 and C7x DSP remoteproc, ADC, QSPI AM69: - Addition of more peripherals: CPSW, eMMC, UARTs, I2C et al J721s2: - USB, Serdes, OSPI, PCIe AM62a: - Watchdog J721e: - HyperFlash/HyperBus AM62: - Type-C USB0 port
Cleanups and non-urgent fixes Particularly large set of cleanups to get rid of dtbs_check errors and dtc warnings: - Addition of missing pinmux and uart nodes for AM64, AM62x, AM62A, J721e, J7200 that are used by bootloader - Split Pinmux regions/range to avoid holes for J721s2, J7200, J784s4 - Drop bootargs and unneeded aliases across all K3 SoCs - Move aliases to board dts files from SoC dtsi files - Move to generic node name for can, rtc nodes on am65 - s/-pins-default/default-pins/ to match upcoming pinctrl.yaml update - Fix pinctrl phandle references to use <> as separator where multiple entries are present
* tag 'ti-k3-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (153 commits) arm64: dts: ti: Unify pin group node names for make dtbs checks arm64: dts: ti: add verdin am62 yavia arm64: dts: ti: add verdin am62 dahlia arm64: dts: ti: add verdin am62 dt-bindings: arm: ti: add toradex,verdin-am62 et al. arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM625 dt-bindings: arm: ti: Add bindings for PHYTEC AM62x based hardware arm64: dts: ti: k3-j7200-mcu-wakeup: Remove 0x unit address prefix from nodename arm64: dts: ti: k3-j721e-som-p0: Enable wakeup_i2c0 and eeprom arm64: dts: ti: k3-am64: Add ESM support arm64: dts: ti: k3-am62: Add ESM support arm64: dts: ti: k3-j7200: Add ESM support arm64: dts: ti: k3-j721e: Add ESM support dt-bindings: misc: esm: Add ESM support for TI K3 devices arm64: dts: ti: k3-j721s2-som-p0: Enable wakeup_i2c0 and eeprom arm64: dts: ti: k3-j721s2-common-proc-board: Add uart pinmux arm64: dts: ti: k3-am68-sk-som: Enable wakeup_i2c0 and eeprom arm64: dts: ti: k3-am68-sk-base-board: Add uart pinmux arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header arm64: dts: ti: k3-j721s2: Fix wkup pinmux range ...
Link: https://lore.kernel.org/r/7fe0c6de-cb99-9c89-8583-b3855fde16f8@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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a4956811 |
| 15-Jun-2023 |
Tony Lindgren <tony@atomide.com> |
arm64: dts: ti: Unify pin group node names for make dtbs checks
Prepare for pinctrl-single yaml binding and unify pin group node names.
Let's standardize on pin group node naming ending in -pins. A
arm64: dts: ti: Unify pin group node names for make dtbs checks
Prepare for pinctrl-single yaml binding and unify pin group node names.
Let's standardize on pin group node naming ending in -pins. As we don't necessarily have a SoC specific compatible property for pinctrl-single. I'd rather not add a pattern match for pins somewhere in the name for all the users.
Trying to add matches for pins-default will be futile as on the earlier SoCs we've already seen names like pins-sleep, pins-idle, pins-off and so on that would need to be matched.
And as the node is a pin group, let's prefer to use naming -pins rather than -pin as more pins may need to be added to the pin group later on.
Signed-off-by: Tony Lindgren <tony@atomide.com> [vigneshr@ti.com: Rebase onto latest ti/next and extend to new nodes] Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Revision tags: v6.1.34, v6.1.33, v6.1.32 |
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4c2c9902 |
| 01-Jun-2023 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: k3-j721e-beagleboneai64: Add wakeup_uart pinmux
Define the wakeup uart pin-mux for completeness. This allows the device tree usage in bootloader and firmwares that can configure the
arm64: dts: ti: k3-j721e-beagleboneai64: Add wakeup_uart pinmux
Define the wakeup uart pin-mux for completeness. This allows the device tree usage in bootloader and firmwares that can configure the same appropriately.
Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20230601183151.1000157-7-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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4a701c01 |
| 06-Jun-2023 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: k3-j721e-beagleboneai64: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array entries is better notation as it makes potential errors
arm64: dts: ti: k3-j721e-beagleboneai64: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array entries is better notation as it makes potential errors with phandle and cell arguments easier to catch. Fix the outliers to be consistent with the rest of the usage.
Cc: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20230606182220.3661956-6-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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88875d4c |
| 06-Jun-2023 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: k3-j721e-beagleboneai64: Move eeprom WP gpio pinctrl to eeprom node
Move the eeprom WP GPIO mux configuration to be part of the eeprom node instead of the I2C node.
Cc: Robert Nelso
arm64: dts: ti: k3-j721e-beagleboneai64: Move eeprom WP gpio pinctrl to eeprom node
Move the eeprom WP GPIO mux configuration to be part of the eeprom node instead of the I2C node.
Cc: Robert Nelson <robertcnelson@gmail.com> Suggested-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20230606182220.3661956-5-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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d528c29f |
| 06-Jun-2023 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: k3-j721e-beagleboneai64: Move camera gpio pinctrl to gpio node
Move the GPIO mux configuration needed for camera module to work to the GPIO node instead of the I2C node.
Camera node
arm64: dts: ti: k3-j721e-beagleboneai64: Move camera gpio pinctrl to gpio node
Move the GPIO mux configuration needed for camera module to work to the GPIO node instead of the I2C node.
Camera nodes are maintained as overlay files, but the common mux is always needed to ensure that camera probes fine and ensuring the mux is configured as part of the GPIO module allows for the multiple overlay files to be simpler.
Cc: Robert Nelson <robertcnelson@gmail.com> Suggested-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20230606182220.3661956-4-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Revision tags: v6.1.31, v6.1.30, v6.1.29 |
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b0efb45d |
| 15-May-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-j721e: Enable MDIO nodes at the board level
MDIO nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with a pinm
arm64: dts: ti: k3-j721e: Enable MDIO nodes at the board level
MDIO nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with a pinmux.
As the attached PHY is only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the MDIO nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230515172137.474626-5-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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