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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dusb251xb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip USB 2.0 Hi-Speed Hub Controller
10 - Richard Leitner <richard.leitner@skidata.com>
15 - microchip,usb2422
16 - microchip,usb2512b
17 - microchip,usb2512bi
18 - microchip,usb2513b
19 - microchip,usb2513bi
[all …]
/openbmc/linux/drivers/cpufreq/
H A De_powersaver.c1 // SPDX-License-Identifier: GPL-2.0-only
61 return -ENOMEM; in eps_acpi_init()
63 if (!zalloc_cpumask_var(&eps_acpi_cpu_perf->shared_cpu_map, in eps_acpi_init()
67 return -ENOMEM; in eps_acpi_init()
71 free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map); in eps_acpi_init()
74 return -EIO; in eps_acpi_init()
83 free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map); in eps_acpi_exit()
94 u32 lo, hi; in eps_get() local
103 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_get()
104 return centaur->fsb * ((lo >> 8) & 0xff); in eps_get()
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H A Dlonghaul.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2001-2004 Dave Jones.
13 * Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C).
16 * It is present in Ezra-T (C5M), Nehemiah (C5X) and above.
90 static char *print_speed(int speed) in print_speed() argument
92 if (speed < 1000) { in print_speed()
93 snprintf(speedbuffer, sizeof(speedbuffer), "%dMHz", speed); in print_speed()
97 if (speed%1000 == 0) in print_speed()
99 "%dGHz", speed/1000); in print_speed()
102 "%d.%dGHz", speed/1000, (speed%1000)/100); in print_speed()
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/openbmc/linux/Documentation/devicetree/bindings/iio/accel/
H A Dlis302.txt8 - compatible: should be set to "st,lis3lv02d-spi"
9 - reg: the chipselect index
10 - spi-max-frequency: maximal bus speed, should be set to 1000000 unless
12 - interrupts: the interrupt generated by the device
15 - compatible: should be set to "st,lis3lv02d"
16 - reg: i2c slave address
17 - Vdd-supply: The input supply for Vdd
18 - Vdd_IO-supply: The input supply for Vdd_IO
23 - st,click-single-{x,y,z}: if present, tells the device to issue an
26 - st,click-double-{x,y,z}: if present, tells the device to issue an
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/openbmc/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_switch_map.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
49 /* VLAN-FID Table offset. 4096 VIDs. 2B per VID = 8KB = 0x2000 */
52 /* VLAN-FID Table offset for EMAC */
88 /* IEP count hi roll over count */
91 /* IEP count hi sw counter */
112 /* pktTxDelay for P1 = link speed dependent p1 mac delay + p1 phy delay */
115 /* pktTxDelay for P2 = link speed dependent p2 mac delay + p2 phy delay */
173 * cut-through/S&F.
180 /* Used to notify the FW of the current link speed */
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/openbmc/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dpm3393.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * PMC/SIERRA (pm3393) MAC-PHY functionality. *
14 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
87 t1_tpi_read(cmac->adapter, OFFSET(reg), data32); in pmread()
93 t1_tpi_write(cmac->adapter, OFFSET(reg), data32); in pmwrite()
115 /* PM3393 - Enabling all hardware block interrupts. in pm3393_interrupt_enable()
138 /* PM3393 - Global interrupt enable in pm3393_interrupt_enable()
140 /* TBD XXX Disable for now until we figure out why error interrupts keep asserting. */ in pm3393_interrupt_enable()
144 /* TERMINATOR - PL_INTERUPTS_EXT */ in pm3393_interrupt_enable()
145 pl_intr = readl(cmac->adapter->regs + A_PL_ENABLE); in pm3393_interrupt_enable()
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H A Dvsc7326_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Straight off the data sheet, VMDS-10038 Rev 2.0 and
9 * PD0011-01-14-Meigs-II 2002-12-12
26 #define REG_PLL_CLK_SPEED CRA(0x7,0xf,0x19) /* Clock Speed Selection */
55 #define BIST_COMMAND 0x01 /* BIST enable/disable */
58 #define BIST_ERR_CNT_MSB 0x04 /* BIST error count hi 8b */
60 #define BIST_ERR_SEL_MSB 0x06 /* BIST error select hi 8b */
65 #define BIST_ERR_ADR3 0x0b /* BIST error address hi 8b */
69 * fn = FIFO number, 0-9
84 * bn = bucket number 0-10 (yes, 11 buckets)
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/openbmc/linux/drivers/usb/dwc2/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
10 Say Y here if your system has a Dual Role Hi-Speed USB
18 dwc2_platform.ko. For all modes(host, gadget and dual-role), there
33 The Designware USB2.0 high-speed host controller
35 driver to operate in Host-only mode.
37 comment "Gadget/Dual-role mode requires USB Gadget support to be enabled"
43 The Designware USB2.0 high-speed gadget controller
45 driver to operate in Peripheral-only mode. This option requires
52 Select this option if you want the driver to work in a dual-role
54 the role will be determined by the cable that gets plugged-in. This
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/openbmc/linux/Documentation/usb/
H A Diuu_phoenix.rst5 Hi all,
10 bring a ttyUSB[0-x] interface. This driver must be
23 How to tune the reader speed?
50 - clockmode will provide 3 different base settings commonly adopted by
57 - boost provide a way to overclock the reader ( my favorite :-) )
64 the speed to a score 10 to 20% better than the simple clockmode=3 !!!
67 - cdmode permit to setup the signal used to inform the userland ( ioctl answer )
70 - xmas is completely useless except for your eyes. This is one of my friend who was
75 - debug will produce a lot of debugging messages...
82 is an abstraction, so use any speed or parity setting will
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/openbmc/u-boot/drivers/spi/
H A Dcadence_qspi.c1 // SPDX-License-Identifier: GPL-2.0+
24 struct cadence_spi_platdata *plat = bus->platdata; in cadence_spi_write_speed()
27 cadence_qspi_apb_config_baudrate_div(priv->regbase, in cadence_spi_write_speed()
30 /* Reconfigure delay timing if speed is changed. */ in cadence_spi_write_speed()
31 cadence_qspi_apb_delay(priv->regbase, CONFIG_CQSPI_REF_CLK, hz, in cadence_spi_write_speed()
32 plat->tshsl_ns, plat->tsd2d_ns, in cadence_spi_write_speed()
33 plat->tchsh_ns, plat->tslch_ns); in cadence_spi_write_speed()
42 void *base = priv->regbase; in spi_calibration()
45 int err = 0, i, range_lo = -1, range_hi = -1; in spi_calibration()
67 /* Disable QSPI */ in spi_calibration()
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/openbmc/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_init_fw_funcs.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2021 Marvell International Ltd.
36 0x100) - 1 : 0)
39 /* Max link speed (in Mbps) */
53 #define VOQS_BIT_MASK (BIT(MAX_NUM_VOQS) - 1)
79 #define QM_VP_WFQ_BYPASS_THRESH (QM_VP_WFQ_MIN_INC_VAL - 100)
98 /* RL increment value - rate is specified in mbps */
113 /* QCN RL Upper bound, speed is in Mpbs */
114 #define QM_GLOBAL_RL_UPPER_BOUND(speed) ((u32)max_t( \ argument
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/openbmc/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-rgmii.c7 * Copyright (C) 2003-2018 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
34 #include <asm/octeon/cvmx-config.h>
36 #include <asm/octeon/cvmx-pko.h>
37 #include <asm/octeon/cvmx-helper.h>
38 #include <asm/octeon/cvmx-helper-board.h>
40 #include <asm/octeon/cvmx-npi-defs.h>
41 #include <asm/octeon/cvmx-gmxx-defs.h>
42 #include <asm/octeon/cvmx-asxx-defs.h>
[all …]
/openbmc/linux/drivers/net/ethernet/atheros/atlx/
H A Datl1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
4 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
5 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
8 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
20 * Fix abstruse irq enable/disable condition described here:
21 * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
37 #include <linux/dma-mapping.h>
84 #define OPTION_UNSET -1
93 * Valid Range: 10-65535
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/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_ptp_hw.c1 // SPDX-License-Identifier: GPL-2.0
16 * +---------------+ +---------------+ +---------------+
18 * +---------------+ +---------------+ +---------------+
24 * +---------------+ +---------------+
26 * +---------------+ +---------------+
37 * - 823.4375 MHz
38 * - 783.36 MHz
39 * - 796.875 MHz
40 * - 816 MHz
41 * - 830.078125 MHz
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/openbmc/linux/drivers/net/ethernet/intel/igb/
H A Digb_ptp.c1 // SPDX-License-Identifier: GPL-2.0+
38 * +--------------+ +---+---+------+
40 * +--------------+ +---+---+------+
43 * +----------+---+ +--------------+
45 * +----------+---+ +--------------+
50 * 2^45 * 10^-9 / 3600 = 9.77 hours.
53 * 2^40 * 10^-9 / 60 = 18.3 minutes.
67 #define INCVALUE_82576_MASK GENMASK(E1000_TIMINCA_16NS_SHIFT - 1, 0)
79 struct e1000_hw *hw = &igb->hw; in igb_ptp_read_82576()
81 u32 lo, hi; in igb_ptp_read_82576() local
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/openbmc/u-boot/arch/x86/cpu/baytrail/
H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0+
42 * Configure the internal clock of both SIO HS-UARTs, if they are enabled
52 /* Loop over the 2 HS-UARTs */ in arch_cpu_init_dm()
70 /* Enable speed step */ in set_max_freq()
88 perf_ctl.hi = 0; in set_max_freq()
100 * On BayTrail the turbo disable bit is actually scoped at the in cpu_x86_baytrail_probe()
101 * building-block level, not package. For non-BSP cores that are in cpu_x86_baytrail_probe()
111 /* Disable C1E */ in cpu_x86_baytrail_probe()
153 info->cpu_freq = tsc_freq(); in baytrail_get_info()
154 info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU; in baytrail_get_info()
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/openbmc/linux/drivers/net/dsa/microchip/
H A Dksz8795.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/platform_data/microchip-ksz.h>
47 regs = dev->info->regs; in ksz8_ind_write8()
49 mutex_lock(&dev->alu_mutex); in ksz8_ind_write8()
56 mutex_unlock(&dev->alu_mutex); in ksz8_ind_write8()
113 if (!dsa_is_cpu_port(dev->ds, port)) in ksz8_change_mtu()
118 switch (dev->chip_id) { in ksz8_change_mtu()
127 return -EOPNOTSUPP; in ksz8_change_mtu()
132 u8 hi, lo; in ksz8795_set_prio_queue() local
147 ksz_pread8(dev, port, P_DROP_TAG_CTRL, &hi); in ksz8795_set_prio_queue()
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/openbmc/linux/drivers/net/ethernet/xscale/
H A Dixp4xx_eth.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * NPE 0 (NPE-A) 1 (NPE-B) 2 (NPE-C)
13 * RX-free queue 26 27 28
14 * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
17 * bits 0 -> 1 - NPE ID (RX and TX-done)
18 * bits 0 -> 2 - priority (TX, per 802.1D)
19 * bits 3 -> 4 - port ID (user-set?)
20 * bits 5 -> 31 - physical descriptor address
24 #include <linux/dma-mapping.h>
72 #define MAX_CLOSE_WAIT 1000 /* microseconds, typically 2-3 cycles */
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/openbmc/linux/drivers/net/dsa/qca/
H A Dqca8k-8xxx.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
47 ret = bus->write(bus, phy_id, regnum, lo); in qca8k_mii_write_lo()
49 dev_err_ratelimited(&bus->dev, in qca8k_mii_write_lo()
59 u16 hi; in qca8k_mii_write_hi() local
61 hi = (u16)(val >> 16); in qca8k_mii_write_hi()
62 ret = bus->write(bus, phy_id, regnum, hi); in qca8k_mii_write_hi()
64 dev_err_ratelimited(&bus->dev, in qca8k_mii_write_hi()
65 "failed to write qca8k 32bit hi register\n"); in qca8k_mii_write_hi()
75 ret = bus->read(bus, phy_id, regnum); in qca8k_mii_read_lo()
[all …]
/openbmc/linux/drivers/net/ethernet/freescale/enetc/
H A Denetc_qos.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
17 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed) in enetc_sched_speed_set() argument
19 struct enetc_hw *hw = &priv->si->hw; in enetc_sched_speed_set()
20 u32 old_speed = priv->speed; in enetc_sched_speed_set()
23 if (speed == old_speed) in enetc_sched_speed_set()
26 switch (speed) { in enetc_sched_speed_set()
41 priv->speed = speed; in enetc_sched_speed_set()
49 struct enetc_hw *hw = &priv->si->hw; in enetc_setup_taprio()
63 for (i = 0; i < priv->num_tx_rings; i++) in enetc_setup_taprio()
64 if (priv->tx_ring[i]->tsd_enable) in enetc_setup_taprio()
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/openbmc/linux/drivers/usb/misc/
H A Dusb251xb.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Microchip USB251xB USB 2.0 Hi-Speed Hub Controller
9 * a not-accepted patch by Fabien Lahoudere, see:
110 #define DRIVER_DESC "Microchip USB 2.0 Hi-Speed Hub Controller"
234 if (dev->type == &i2c_adapter_type) { in usb251xb_check_dev_children()
244 struct gpio_chip *gc = gpiod_to_chip(hub->gpio_reset); in usb251x_check_gpio_chip()
245 struct i2c_adapter *adap = hub->i2c->adapter; in usb251x_check_gpio_chip()
248 if (!hub->gpio_reset) in usb251x_check_gpio_chip()
252 return -EINVAL; in usb251x_check_gpio_chip()
254 ret = usb251xb_check_dev_children(&adap->dev, gc->parent); in usb251x_check_gpio_chip()
[all …]
/openbmc/u-boot/drivers/timer/
H A Dtsc_timer.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <asm/u-boot-x86.h>
40 if (gd->arch.x86_vendor != X86_VENDOR_INTEL) in native_calibrate_tsc()
54 switch (gd->arch.x86_model) { in native_calibrate_tsc()
77 if (gd->arch.x86_vendor != X86_VENDOR_INTEL) in cpu_mhz_from_cpuid()
87 * According to Intel 64 and IA-32 System Programming Guide,
107 /* TNG - Intel Atom processor Z3400 series */
109 /* VLV2 - Intel Atom processor E3000, Z3600, Z3700 series */
111 /* ANN - Intel Atom processor Z3500 series */
113 /* AMT - Intel Atom processor X7-Z8000 and X5-Z8000 series */
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/openbmc/linux/Documentation/driver-api/usb/
H A Dpower-management.rst1 .. _usb-power-management:
7 :Date: Last-updated: February 2014
11 ---------
17 * Changing the default idle-delay time
31 -------------------------
35 component is ``suspended`` it is in a nonfunctional low-power state; it
37 ``resumed`` (returned to a functional full-power state) when the kernel
67 ----------------------
85 --------------------------
101 -------------------
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/openbmc/linux/include/linux/usb/
H A Dr8a66597.h1 // SPDX-License-Identifier: GPL-2.0
124 #define XTAL 0xC000 /* b15-14: Crystal selection */
133 #define HSE 0x0080 /* b7: Hi-speed enable */
135 #define DRPD 0x0020 /* b5: D+/- pull down control */
140 #define OVCBIT 0x8000 /* b15-14: Over-current bit */
141 #define OVCMON 0xC000 /* b15-14: Over-current monitor */
143 #define IDMON 0x0004 /* b3: ID-pin monitor */
144 #define LNST 0x0003 /* b1-0: D+, D- line status */
146 #define FS_KSTS 0x0002 /* Full-Speed K State */
147 #define FS_JSTS 0x0001 /* Full-Speed J State */
[all …]
/openbmc/linux/drivers/usb/gadget/udc/
H A Dm66592-udc.h1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2006-2007 Renesas Solutions Corp.
17 #define M66592_XTAL 0xC000 /* b15-14: Crystal selection */
26 #define M66592_HSE 0x0080 /* b7: Hi-speed enable */
28 #define M66592_DMRPD 0x0020 /* b5: D- pull down control */
30 #define M66592_FSRPC 0x0004 /* b2: Full-speed receiver enable */
35 #define M66592_LNST 0x0003 /* b1-0: D+, D- line status */
47 #define M66592_RHST 0x0003 /* b1-0: Reset handshake status */
48 #define M66592_HSMODE 0x0003 /* Hi-Speed mode */
49 #define M66592_FSMODE 0x0002 /* Full-Speed mode */
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