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/openbmc/linux/sound/usb/
H A Dquirks.c42 for (quirk = quirk_comp->data; quirk->ifnum >= 0; ++quirk) { in create_composite_quirk()
50 if (err < 0) in create_composite_quirk()
54 for (quirk = quirk_comp->data; quirk->ifnum >= 0; ++quirk) { in create_composite_quirk()
62 if (err < 0) in create_composite_quirk()
67 return 0; in create_composite_quirk()
75 return 0; in ignore_interface_quirk()
84 return snd_usb_midi_v2_create(chip, intf, quirk, 0); in create_any_midi_quirk()
99 alts = &iface->altsetting[0]; in create_standard_audio_quirk()
102 if (err < 0) { in create_standard_audio_quirk()
108 usb_set_interface(chip->dev, altsd->bInterfaceNumber, 0); in create_standard_audio_quirk()
[all...]
/openbmc/linux/arch/arm/nwfpe/
H A Dfpopcode.c19 { .high = 0x0000, .low = 0x0000000000000000ULL},/* extended 0.0 */
20 { .high = 0x3fff, .low = 0x8000000000000000ULL},/* extended 1.0 */
21 { .high = 0x4000, .low = 0x8000000000000000ULL},/* extended 2.0 */
22 { .high = 0x4000, .low = 0xc000000000000000ULL},/* extended 3.0 */
23 { .high = 0x4001, .low = 0x8000000000000000ULL},/* extended 4.0 */
24 { .high = 0x4001, .low = 0xa000000000000000ULL},/* extended 5.0 */
25 { .high = 0x3ffe, .low = 0x8000000000000000ULL},/* extended 0.5 */
26 { .high = 0x4002, .low = 0xa000000000000000ULL},/* extended 10.0 */
31 0x0000000000000000ULL, /* double 0.0 */
32 0x3ff0000000000000ULL, /* double 1.0 */
[all …]
/openbmc/qemu/linux-user/arm/nwfpe/
H A Dfpopcode.c30 { 0x0000000000000000ULL, 0x0000}, /* extended 0.0 */
31 { 0x8000000000000000ULL, 0x3fff}, /* extended 1.0 */
32 { 0x8000000000000000ULL, 0x4000}, /* extended 2.0 */
33 { 0xc000000000000000ULL, 0x4000}, /* extended 3.0 */
34 { 0x8000000000000000ULL, 0x4001}, /* extended 4.0 */
35 { 0xa000000000000000ULL, 0x4001}, /* extended 5.0 */
36 { 0x8000000000000000ULL, 0x3ffe}, /* extended 0.5 */
37 { 0xa000000000000000ULL, 0x4002} /* extended 10.0 */
41 const_float64(0x0000000000000000ULL), /* double 0.0 */
42 const_float64(0x3ff0000000000000ULL), /* double 1.0 */
[all …]
/openbmc/linux/tools/arch/x86/include/uapi/asm/
H A Dprctl.h5 #define ARCH_SET_GS 0x1001
6 #define ARCH_SET_FS 0x1002
7 #define ARCH_GET_FS 0x1003
8 #define ARCH_GET_GS 0x1004
10 #define ARCH_GET_CPUID 0x1011
11 #define ARCH_SET_CPUID 0x1012
13 #define ARCH_GET_XCOMP_SUPP 0x1021
14 #define ARCH_GET_XCOMP_PERM 0x1022
15 #define ARCH_REQ_XCOMP_PERM 0x1023
16 #define ARCH_GET_XCOMP_GUEST_PERM 0x1024
[all …]
/openbmc/linux/arch/x86/include/uapi/asm/
H A Dprctl.h5 #define ARCH_SET_GS 0x1001
6 #define ARCH_SET_FS 0x1002
7 #define ARCH_GET_FS 0x1003
8 #define ARCH_GET_GS 0x1004
10 #define ARCH_GET_CPUID 0x1011
11 #define ARCH_SET_CPUID 0x1012
13 #define ARCH_GET_XCOMP_SUPP 0x1021
14 #define ARCH_GET_XCOMP_PERM 0x1022
15 #define ARCH_REQ_XCOMP_PERM 0x1023
16 #define ARCH_GET_XCOMP_GUEST_PERM 0x1024
[all …]
/openbmc/linux/tools/perf/trace/beauty/
H A Dx86_arch_prctl.sh25 print_range 1 0x1 0x1001
26 print_range 2 0x2 0x2001
27 print_range 3 0x4 0x4001
/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Dti,sa2ul.yaml93 reg = <0x4e00000 0x1200>;
95 dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
96 <&main_udmap 0x4001>;
/openbmc/linux/drivers/media/rc/keymaps/
H A Drc-ct-90405.c5 * Copyright (C) 2021 Alexander Voronov <avv.0@ya.ru>
12 { 0x4014, KEY_SWITCHVIDEOMODE },
13 { 0x4012, KEY_POWER },
14 { 0x4044, KEY_TV },
15 { 0x40be43, KEY_3D_MODE },
16 { 0x400c, KEY_SUBTITLE },
17 { 0x4001, KEY_NUMERIC_1 },
18 { 0x4002, KEY_NUMERIC_2 },
19 { 0x4003, KEY_NUMERIC_3 },
20 { 0x4004, KEY_NUMERIC_4 },
[all …]
/openbmc/linux/drivers/comedi/drivers/
H A Ddas08_cs.c58 dev->board_ptr = &das08_cs_boards[0]; in das08_cs_auto_attach()
64 iobase = link->resource[0]->start; in das08_cs_auto_attach()
86 PCMCIA_DEVICE_MANF_CARD(0x01c5, 0x4001),
/openbmc/u-boot/include/net/pfe_eth/pfe/cbus/
H A Demac.h10 #define EMAC_IEVENT_REG 0x004
11 #define EMAC_IMASK_REG 0x008
12 #define EMAC_R_DES_ACTIVE_REG 0x010
13 #define EMAC_X_DES_ACTIVE_REG 0x014
14 #define EMAC_ECNTRL_REG 0x024
15 #define EMAC_MII_DATA_REG 0x040
16 #define EMAC_MII_CTRL_REG 0x044
17 #define EMAC_MIB_CTRL_STS_REG 0x064
18 #define EMAC_RCNTRL_REG 0x084
19 #define EMAC_TCNTRL_REG 0x0C4
[all …]
/openbmc/u-boot/include/
H A Dmedia_bus_format.h16 * These bus formats uniquely identify data formats on the data bus. Format 0
35 #define MEDIA_BUS_FMT_FIXED 0x0001
37 /* RGB - next is 0x101b */
38 #define MEDIA_BUS_FMT_RGB444_1X12 0x1016
39 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
40 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
41 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE 0x1003
42 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE 0x1004
43 #define MEDIA_BUS_FMT_RGB565_1X16 0x1017
44 #define MEDIA_BUS_FMT_BGR565_2X8_BE 0x1005
[all …]
/openbmc/linux/drivers/dma/ti/
H A Dk3-psil-am654.c54 PSIL_SA2UL(0x4000, 0),
55 PSIL_SA2UL(0x4001, 0),
56 PSIL_SA2UL(0x4002, 0),
57 PSIL_SA2UL(0x4003, 0),
59 PSIL_ETHERNET(0x4100),
60 PSIL_ETHERNET(0x4101),
61 PSIL_ETHERNET(0x4102),
62 PSIL_ETHERNET(0x4103),
64 PSIL_ETHERNET(0x4200),
65 PSIL_ETHERNET(0x4201),
[all …]
H A Dk3-psil-am64.c66 PSIL_SAUL(0x4000, 17, 32, 8, 32, 0),
67 PSIL_SAUL(0x4001, 18, 32, 8, 33, 0),
68 PSIL_SAUL(0x4002, 19, 40, 8, 40, 0),
69 PSIL_SAUL(0x4003, 20, 40, 8, 41, 0),
71 PSIL_ETHERNET(0x4100, 21, 48, 16),
72 PSIL_ETHERNET(0x4101, 22, 64, 16),
73 PSIL_ETHERNET(0x4102, 23, 80, 16),
74 PSIL_ETHERNET(0x4103, 24, 96, 16),
76 PSIL_ETHERNET(0x4200, 25, 112, 16),
77 PSIL_ETHERNET(0x4201, 26, 128, 16),
[all …]
/openbmc/linux/include/uapi/linux/
H A Dmedia-bus-format.h16 * These bus formats uniquely identify data formats on the data bus. Format 0
35 #define MEDIA_BUS_FMT_FIXED 0x0001
37 /* RGB - next is 0x1025 */
38 #define MEDIA_BUS_FMT_RGB444_1X12 0x1016
39 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
40 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
41 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE 0x1003
42 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE 0x1004
43 #define MEDIA_BUS_FMT_RGB565_1X16 0x1017
44 #define MEDIA_BUS_FMT_BGR565_2X8_BE 0x1005
[all …]
/openbmc/u-boot/drivers/bios_emulator/
H A Dbiosemu.c52 BE_sysEnv _BE_env = {{0}};
71 #define OFF(addr) (u16)(((addr) >> 0) & 0xffff)
72 #define SEG(addr) (u16)(((addr) >> 4) & 0xf000)
82 BIOS image as the BIOS that is used and emulated at 0xC0000.
90 memset(&M, 0, sizeof(M)); in BE_init()
93 return 0; in BE_init()
100 return 0; in BE_init()
104 _BE_env.emulateVGA = 0; in BE_init()
108 return 0; in BE_init()
142 _BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen - 1; in BE_setVGA()
[all …]
/openbmc/linux/include/linux/
H A DmISDNif.h43 * <16 bit 0 >
58 #define MISDN_CMDMASK 0xff00
59 #define MISDN_LAYERMASK 0x00ff
62 #define OPEN_CHANNEL 0x0100
63 #define CLOSE_CHANNEL 0x0200
64 #define CONTROL_CHANNEL 0x0300
65 #define CHECK_DATA 0x0400
68 #define PH_ACTIVATE_REQ 0x0101
69 #define PH_DEACTIVATE_REQ 0x0201
70 #define PH_DATA_REQ 0x2001
[all …]
/openbmc/qemu/target/m68k/
H A Dsoftfloat_fpsp_tables.h26 make_floatx80_init(0x3FFE, 0xFE03F80FE03F80FE),
27 make_floatx80_init(0x3FF7, 0xFF015358833C47E2),
28 make_floatx80_init(0x3FFE, 0xFA232CF252138AC0),
29 make_floatx80_init(0x3FF9, 0xBDC8D83EAD88D549),
30 make_floatx80_init(0x3FFE, 0xF6603D980F6603DA),
31 make_floatx80_init(0x3FFA, 0x9CF43DCFF5EAFD48),
32 make_floatx80_init(0x3FFE, 0xF2B9D6480F2B9D65),
33 make_floatx80_init(0x3FFA, 0xDA16EB88CB8DF614),
34 make_floatx80_init(0x3FFE, 0xEF2EB71FC4345238),
35 make_floatx80_init(0x3FFB, 0x8B29B7751BD70743),
[all …]
/openbmc/qemu/tests/unit/
H A Dtest-bitcnt.c25 { { .w8 = 0x00 }, .popct=0 },
26 { { .w8 = 0x01 }, .popct=1 },
27 { { .w8 = 0x03 }, .popct=2 },
28 { { .w8 = 0x04 }, .popct=1 },
29 { { .w8 = 0x0f }, .popct=4 },
30 { { .w8 = 0x3f }, .popct=6 },
31 { { .w8 = 0x40 }, .popct=1 },
32 { { .w8 = 0xf0 }, .popct=4 },
33 { { .w8 = 0x7f }, .popct=7 },
34 { { .w8 = 0x80 }, .popct=1 },
[all …]
/openbmc/u-boot/arch/x86/include/asm/arch-quark/
H A Dquark.h10 #define MSG_PORT_MEM_ARBITER 0x00
11 #define MSG_PORT_HOST_BRIDGE 0x03
12 #define MSG_PORT_RMU 0x04
13 #define MSG_PORT_MEM_MGR 0x05
14 #define MSG_PORT_USB_AFE 0x14
15 #define MSG_PORT_PCIE_AFE 0x16
16 #define MSG_PORT_SOC_UNIT 0x31
18 /* Port 0x00: Memory Arbiter Message Port Registers */
21 #define AEC_CTRL 0x00
23 /* Port 0x03: Host Bridge Message Port Registers */
[all …]
/openbmc/linux/arch/sh/kernel/cpu/sh4/
H A Dprobe.c28 pvr = (__raw_readl(CCN_PVR) >> 8) & 0xffffff; in cpu_probe()
29 prr = (__raw_readl(CCN_PRR) >> 4) & 0xff; in cpu_probe()
56 if (((pvr >> 16) & 0xff) == 0x10) { in cpu_probe()
59 if ((cvr & 0x10000000) == 0) { in cpu_probe()
65 boot_cpu_data.cut_major = pvr & 0x7f; in cpu_probe()
76 if ((cvr & 0x20000000)) in cpu_probe()
80 pvr &= 0xffff; in cpu_probe()
87 case 0x205: in cpu_probe()
92 case 0x206: in cpu_probe()
97 case 0x1100: in cpu_probe()
[all …]
/openbmc/linux/drivers/media/i2c/
H A Dov8858.c36 #define OV8858_REG_ADDR_MASK 0xffff
41 #define OV8858_REG_SC_CTRL0100 OV8858_REG_8BIT(0x0100)
42 #define OV8858_MODE_SW_STANDBY 0x0
43 #define OV8858_MODE_STREAMING 0x1
45 #define OV8858_REG_CHIP_ID OV8858_REG_24BIT(0x300a)
46 #define OV8858_CHIP_ID 0x008858
48 #define OV8858_REG_SUB_ID OV8858_REG_8BIT(0x302a)
49 #define OV8858_R1A 0xb0
50 #define OV8858_R2A 0xb2
52 #define OV8858_REG_LONG_EXPO OV8858_REG_24BIT(0x3500)
[all …]
H A Dov5647.c42 #define MIPI_CTRL00_CLOCK_LANE_DISABLE BIT(0)
44 #define OV5647_SW_STANDBY 0x0100
45 #define OV5647_SW_RESET 0x0103
46 #define OV5647_REG_CHIPID_H 0x300a
47 #define OV5647_REG_CHIPID_L 0x300b
48 #define OV5640_REG_PAD_OUT 0x300d
49 #define OV5647_REG_EXP_HI 0x3500
50 #define OV5647_REG_EXP_MID 0x3501
51 #define OV5647_REG_EXP_LO 0x3502
52 #define OV5647_REG_AEC_AGC 0x3503
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
H A Dhub.fuc30 gpc_count: .b32 0
31 rop_count: .b32 0
34 ctx_current: .b32 0
38 chan_mmio_count: .b32 0
39 chan_mmio_address: .b32 0
45 .b32 0x0417e91c // 0x17e91c, 2
55 nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(5), 0, $r15)
57 nv_iowr(NV_PGRAPH_FECS_INTR_UP_SET, 0, $r15)
64 // CC_SCRATCH[0]:
67 // 31:0: total PGRAPH context size
[all …]
/openbmc/linux/include/ufs/
H A Dunipro.h12 #define TX_HIBERN8TIME_CAPABILITY 0x000F
13 #define TX_MODE 0x0021
14 #define TX_HSRATE_SERIES 0x0022
15 #define TX_HSGEAR 0x0023
16 #define TX_PWMGEAR 0x0024
17 #define TX_AMPLITUDE 0x0025
18 #define TX_HS_SLEWRATE 0x0026
19 #define TX_SYNC_SOURCE 0x0027
20 #define TX_HS_SYNC_LENGTH 0x0028
21 #define TX_HS_PREPARE_LENGTH 0x0029
[all …]
/openbmc/linux/include/linux/perf/
H A Darm_pmuv3.h15 #define ARMV8_PMUV3_PERFCTR_SW_INCR 0x0000
16 #define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x0001
17 #define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x0002
18 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x0003
19 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x0004
20 #define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x0005
21 #define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x0006
22 #define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x0007
23 #define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x0008
24 #define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x0009
[all …]

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