18c6bb62fSPeter Ujfalusi // SPDX-License-Identifier: GPL-2.0 28c6bb62fSPeter Ujfalusi /* 38c6bb62fSPeter Ujfalusi * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com 48c6bb62fSPeter Ujfalusi * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> 58c6bb62fSPeter Ujfalusi */ 68c6bb62fSPeter Ujfalusi 78c6bb62fSPeter Ujfalusi #include <linux/kernel.h> 88c6bb62fSPeter Ujfalusi 98c6bb62fSPeter Ujfalusi #include "k3-psil-priv.h" 108c6bb62fSPeter Ujfalusi 118c6bb62fSPeter Ujfalusi #define PSIL_PDMA_XY_TR(x) \ 128c6bb62fSPeter Ujfalusi { \ 138c6bb62fSPeter Ujfalusi .thread_id = x, \ 148c6bb62fSPeter Ujfalusi .ep_config = { \ 158c6bb62fSPeter Ujfalusi .ep_type = PSIL_EP_PDMA_XY, \ 168c6bb62fSPeter Ujfalusi }, \ 178c6bb62fSPeter Ujfalusi } 188c6bb62fSPeter Ujfalusi 198c6bb62fSPeter Ujfalusi #define PSIL_PDMA_XY_PKT(x) \ 208c6bb62fSPeter Ujfalusi { \ 218c6bb62fSPeter Ujfalusi .thread_id = x, \ 228c6bb62fSPeter Ujfalusi .ep_config = { \ 238c6bb62fSPeter Ujfalusi .ep_type = PSIL_EP_PDMA_XY, \ 248c6bb62fSPeter Ujfalusi .pkt_mode = 1, \ 258c6bb62fSPeter Ujfalusi }, \ 268c6bb62fSPeter Ujfalusi } 278c6bb62fSPeter Ujfalusi 288c6bb62fSPeter Ujfalusi #define PSIL_ETHERNET(x) \ 298c6bb62fSPeter Ujfalusi { \ 308c6bb62fSPeter Ujfalusi .thread_id = x, \ 318c6bb62fSPeter Ujfalusi .ep_config = { \ 328c6bb62fSPeter Ujfalusi .ep_type = PSIL_EP_NATIVE, \ 338c6bb62fSPeter Ujfalusi .pkt_mode = 1, \ 348c6bb62fSPeter Ujfalusi .needs_epib = 1, \ 358c6bb62fSPeter Ujfalusi .psd_size = 16, \ 368c6bb62fSPeter Ujfalusi }, \ 378c6bb62fSPeter Ujfalusi } 388c6bb62fSPeter Ujfalusi 398c6bb62fSPeter Ujfalusi #define PSIL_SA2UL(x, tx) \ 408c6bb62fSPeter Ujfalusi { \ 418c6bb62fSPeter Ujfalusi .thread_id = x, \ 428c6bb62fSPeter Ujfalusi .ep_config = { \ 438c6bb62fSPeter Ujfalusi .ep_type = PSIL_EP_NATIVE, \ 448c6bb62fSPeter Ujfalusi .pkt_mode = 1, \ 458c6bb62fSPeter Ujfalusi .needs_epib = 1, \ 468c6bb62fSPeter Ujfalusi .psd_size = 64, \ 478c6bb62fSPeter Ujfalusi .notdpkt = tx, \ 488c6bb62fSPeter Ujfalusi }, \ 498c6bb62fSPeter Ujfalusi } 508c6bb62fSPeter Ujfalusi 518c6bb62fSPeter Ujfalusi /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */ 52*2bd8010aSPeter Ujfalusi static struct psil_ep am654_src_ep_map[] = { 538c6bb62fSPeter Ujfalusi /* SA2UL */ 548c6bb62fSPeter Ujfalusi PSIL_SA2UL(0x4000, 0), 558c6bb62fSPeter Ujfalusi PSIL_SA2UL(0x4001, 0), 568c6bb62fSPeter Ujfalusi PSIL_SA2UL(0x4002, 0), 578c6bb62fSPeter Ujfalusi PSIL_SA2UL(0x4003, 0), 588c6bb62fSPeter Ujfalusi /* PRU_ICSSG0 */ 598c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4100), 608c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4101), 618c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4102), 628c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4103), 638c6bb62fSPeter Ujfalusi /* PRU_ICSSG1 */ 648c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4200), 658c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4201), 668c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4202), 678c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4203), 688c6bb62fSPeter Ujfalusi /* PRU_ICSSG2 */ 698c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4300), 708c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4301), 718c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4302), 728c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x4303), 738c6bb62fSPeter Ujfalusi /* PDMA0 - McASPs */ 748c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_TR(0x4400), 758c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_TR(0x4401), 768c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_TR(0x4402), 778c6bb62fSPeter Ujfalusi /* PDMA1 - SPI0-4 */ 788c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4500), 798c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4501), 808c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4502), 818c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4503), 828c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4504), 838c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4505), 848c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4506), 858c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4507), 868c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4508), 878c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4509), 888c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x450a), 898c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x450b), 908c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x450c), 918c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x450d), 928c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x450e), 938c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x450f), 948c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4510), 958c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4511), 968c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4512), 978c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4513), 988c6bb62fSPeter Ujfalusi /* PDMA1 - USART0-2 */ 998c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4514), 1008c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4515), 1018c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x4516), 1028c6bb62fSPeter Ujfalusi /* CPSW0 */ 1038c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0x7000), 1048c6bb62fSPeter Ujfalusi /* MCU_PDMA0 - ADCs */ 1058c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_TR(0x7100), 1068c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_TR(0x7101), 1078c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_TR(0x7102), 1088c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_TR(0x7103), 1098c6bb62fSPeter Ujfalusi /* MCU_PDMA1 - MCU_SPI0-2 */ 1108c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7200), 1118c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7201), 1128c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7202), 1138c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7203), 1148c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7204), 1158c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7205), 1168c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7206), 1178c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7207), 1188c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7208), 1198c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7209), 1208c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x720a), 1218c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x720b), 1228c6bb62fSPeter Ujfalusi /* MCU_PDMA1 - MCU_USART0 */ 1238c6bb62fSPeter Ujfalusi PSIL_PDMA_XY_PKT(0x7212), 1248c6bb62fSPeter Ujfalusi }; 1258c6bb62fSPeter Ujfalusi 1268c6bb62fSPeter Ujfalusi /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */ 127*2bd8010aSPeter Ujfalusi static struct psil_ep am654_dst_ep_map[] = { 1288c6bb62fSPeter Ujfalusi /* SA2UL */ 1298c6bb62fSPeter Ujfalusi PSIL_SA2UL(0xc000, 1), 1308c6bb62fSPeter Ujfalusi PSIL_SA2UL(0xc001, 1), 1318c6bb62fSPeter Ujfalusi /* PRU_ICSSG0 */ 1328c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc100), 1338c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc101), 1348c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc102), 1358c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc103), 1368c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc104), 1378c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc105), 1388c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc106), 1398c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc107), 1408c6bb62fSPeter Ujfalusi /* PRU_ICSSG1 */ 1418c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc200), 1428c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc201), 1438c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc202), 1448c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc203), 1458c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc204), 1468c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc205), 1478c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc206), 1488c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc207), 1498c6bb62fSPeter Ujfalusi /* PRU_ICSSG2 */ 1508c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc300), 1518c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc301), 1528c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc302), 1538c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc303), 1548c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc304), 1558c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc305), 1568c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc306), 1578c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xc307), 1588c6bb62fSPeter Ujfalusi /* CPSW0 */ 1598c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xf000), 1608c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xf001), 1618c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xf002), 1628c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xf003), 1638c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xf004), 1648c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xf005), 1658c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xf006), 1668c6bb62fSPeter Ujfalusi PSIL_ETHERNET(0xf007), 1678c6bb62fSPeter Ujfalusi }; 1688c6bb62fSPeter Ujfalusi 1698c6bb62fSPeter Ujfalusi struct psil_ep_map am654_ep_map = { 1708c6bb62fSPeter Ujfalusi .name = "am654", 1718c6bb62fSPeter Ujfalusi .src = am654_src_ep_map, 1728c6bb62fSPeter Ujfalusi .src_count = ARRAY_SIZE(am654_src_ep_map), 1738c6bb62fSPeter Ujfalusi .dst = am654_dst_ep_map, 1748c6bb62fSPeter Ujfalusi .dst_count = ARRAY_SIZE(am654_dst_ep_map), 1758c6bb62fSPeter Ujfalusi }; 176