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Searched refs:UVD_MPC_CNTL__PERF_RST__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h487 #define UVD_MPC_CNTL__PERF_RST__SHIFT 0x00000006 macro
H A Duvd_4_2_sh_mask.h474 #define UVD_MPC_CNTL__PERF_RST__SHIFT 0x6 macro
H A Duvd_3_1_sh_mask.h470 #define UVD_MPC_CNTL__PERF_RST__SHIFT 0x6 macro
H A Duvd_6_0_sh_mask.h508 #define UVD_MPC_CNTL__PERF_RST__SHIFT 0x6 macro
H A Duvd_5_0_sh_mask.h506 #define UVD_MPC_CNTL__PERF_RST__SHIFT 0x6 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h2831 #define UVD_MPC_CNTL__PERF_RST__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2596 #define UVD_MPC_CNTL__PERF_RST__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h2822 #define UVD_MPC_CNTL__PERF_RST__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h3902 #define UVD_MPC_CNTL__PERF_RST__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h4152 #define UVD_MPC_CNTL__PERF_RST__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h4191 #define UVD_MPC_CNTL__PERF_RST__SHIFT … macro