| /openbmc/linux/Documentation/devicetree/bindings/fpga/ |
| H A D | fpga-region.txt | 9 - FPGA Region
18 FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in
57 FPGA Bridge
58 * FPGA Bridges gate bus signals between a host and FPGA.
72 FPGA Manager
112 2. Program the FPGA using the FPGA manager.
121 FPGA Region
124 FPGA Regions represent FPGA's and FPGA PR regions in the device tree. An FPGA
155 If an FPGA Region does not specify an FPGA Manager, it will inherit the FPGA
322 The live Device Tree must contain an FPGA Region, an FPGA Manager, and any FPGA
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| H A D | altera-socfpga-fpga-mgr.txt | 1 Altera SOCFPGA FPGA Manager
6 - The first index is for FPGA manager register access.
7 - The second index is for writing FPGA configuration data.
8 - interrupts : interrupt for the FPGA Manager device.
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| /openbmc/linux/drivers/fpga/ |
| H A D | Kconfig | 6 menuconfig FPGA config
10 kernel. The FPGA framework adds an FPGA manager class and FPGA
13 if FPGA
71 FPGA manager driver support for Xilinx FPGA configuration
91 FPGA manager driver support for the Altera Cyclone II FPGA
137 FPGA Region common code. An FPGA Region controls an FPGA Manager
139 region of an FPGA or a whole FPGA.
179 Say Y to enable FPGA Manager driver for FPGA Management Engine.
185 Say Y to enable FPGA Bridge driver for FPGA Management Engine.
191 Say Y to enable FPGA Region driver for FPGA Management Engine.
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| /openbmc/u-boot/drivers/fpga/ |
| H A D | Kconfig | 1 menu "FPGA support"
3 config FPGA config
7 bool "Enable Altera FPGA drivers"
8 select FPGA
10 Say Y here to enable the Altera FPGA driver
46 bool "Enable Xilinx FPGA drivers"
47 select FPGA
60 bool "Enable Spartan3 FPGA driver"
65 bool "Enable Xilinx FPGA for Zynq"
72 bool "Enable Aspeed FPGA driver"
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| /openbmc/linux/Documentation/driver-api/fpga/ |
| H A D | intro.rst | 4 The FPGA subsystem supports reprogramming FPGAs dynamically under
5 Linux. Some of the core intentions of the FPGA subsystems are:
7 * The FPGA subsystem is vendor agnostic.
9 * The FPGA subsystem separates upper layers (userspace interfaces and
11 FPGA.
23 FPGA Manager
26 If you are adding a new FPGA or a new method of programming an FPGA,
32 FPGA Bridge
35 FPGA Bridges prevent spurious signals from going out of an FPGA or a
43 FPGA Region
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| H A D | fpga-programming.rst | 1 In-kernel API for FPGA Programming
8 FPGA manager, bridge, and regions. The actual function used to
9 trigger FPGA programming is fpga_region_program_fpga().
12 the FPGA manager and bridges. It will:
15 * lock the mutex of the region's FPGA manager
26 How to program an FPGA using a region
29 When the FPGA region driver probed, it was given a pointer to an FPGA manager
84 API for programming an FPGA
87 * fpga_region_program_fpga() - Program an FPGA
95 FPGA Manager flags
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| H A D | fpga-region.rst | 1 FPGA Region
7 This document is meant to be a brief overview of the FPGA region API usage. A
12 an FPGA Manager and a bridge (or bridges) with a reprogrammable region of an
13 FPGA or the whole FPGA. The API provides a way to register a region and to
24 * which FPGA manager to use to do the programming
37 How to add a new FPGA region
45 API to add a new FPGA region
48 * struct fpga_region - The FPGA region struct
54 * fpga_region_unregister() - Unregister an FPGA region
59 The FPGA region's probe function will need to get a reference to the FPGA
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| H A D | fpga-mgr.rst | 1 FPGA Manager
7 The FPGA manager core exports a set of functions for programming an FPGA with
11 it's just binary data. The FPGA manager core won't parse it.
23 How to support a new FPGA device
53 mgr = fpga_mgr_register(dev, "Altera SOCFPGA FPGA Manager",
109 whole FPGA image or may be a smaller chunk of an FPGA image. In the latter
117 to put the FPGA into operating mode.
123 API for implementing a new FPGA Manager driver
127 * struct fpga_manager - the FPGA manager struct
128 * struct fpga_manager_ops - Low level FPGA manager driver ops
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| H A D | fpga-bridge.rst | 1 FPGA Bridge
4 API to implement a new FPGA bridge
7 * struct fpga_bridge - The FPGA Bridge structure
13 the module that registers the FPGA bridge as the owner.
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-fpga-manager | 13 wrong during FPGA programming (something that the driver can't
18 This is a superset of FPGA states and fpga manager driver
20 to get the FPGA into a known operating state. It's a sequence,
21 though some steps may get skipped. Valid FPGA states will vary
25 * power off = FPGA power is off
26 * power up = FPGA reports power is up
27 * reset = FPGA held in reset state
30 * write init = preparing FPGA for programming
32 * write = FPGA ready to receive image data
36 * operating = FPGA is programmed and operating
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| H A D | sysfs-bus-mcb | 11 Description: The FPGA's revision number
17 Description: The FPGA's minor number
23 Description: The FPGA's model number
29 Description: The FPGA's name
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| H A D | sysfs-class-fpga-region | 5 Description: FPGA region id for compatibility check, e.g. compatibility
6 of the FPGA reconfiguration hardware and image. This value
8 FPGA region. This interface returns the compat_id value or
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| /openbmc/u-boot/Documentation/devicetree/bindings/misc/ |
| H A D | gdsys,iocpu_fpga.txt | 1 gdsys IHS FPGA for CPU devices
3 The gdsys IHS FPGA is the main FPGA on gdsys CPU devices. This driver provides
4 support for enabling and starting the FPGA, as well as verifying working bus
9 - reset-gpios: List of GPIOs controlling the FPGA's reset
10 - done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is
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| H A D | gdsys,iocon_fpga.txt | 1 gdsys IHS FPGA for CON devices
3 The gdsys IHS FPGA is the main FPGA on gdsys CON devices. This driver provides
4 support for enabling and starting the FPGA, as well as verifying working bus
9 - reset-gpios: List of GPIOs controlling the FPGA's reset
10 - done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is
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| H A D | gdsys,io-endpoint.txt | 1 gdsys IO endpoint of IHS FPGA devices
3 The IO endpoint of IHS FPGA devices is a packet-based transmission interface
5 FPGA's main ethernet connection.
10 the FPGA's register space)
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| /openbmc/linux/Documentation/devicetree/bindings/bus/ |
| H A D | ts-nbus.txt | 4 Systems FPGA on the TS-4600 SoM.
10 - pwms : The PWM bound to the FPGA
11 - ts,data-gpios : The 8 GPIO pins connected to the data lines on the FPGA
12 - ts,csn-gpios : The GPIO pin connected to the csn line on the FPGA
13 - ts,txrx-gpios : The GPIO pin connected to the txrx line on the FPGA
14 - ts,strobe-gpios : The GPIO pin connected to the stobe line on the FPGA
15 - ts,ale-gpios : The GPIO pin connected to the ale line on the FPGA
16 - ts,rdy-gpios : The GPIO pin connected to the rdy line on the FPGA
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| /openbmc/linux/Documentation/driver-api/ |
| H A D | xillybus.rst | 2 Xillybus driver for generic FPGA interface
22 -- Host never reads from the FPGA
51 FPGA parallels of library functions. IP cores may implement certain
65 FPGA differently than any device on the bus.
154 For FPGA to host pipes, asynchronous pipes allow data transfer from the FPGA
205 host pipe (the FPGA "writes").
208 host and FPGA.
234 Host never reads from the FPGA
262 related messages from the FPGA, and has no pipe attached to it.
272 buffer is full, the FPGA informs the host about that (appending a
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| /openbmc/linux/Documentation/devicetree/bindings/board/ |
| H A D | fsl-board.txt | 20 * Freescale on-board FPGA
22 This is the memory-mapped registers for on board FPGA.
26 indicating the type of FPGA. Example:
29 - reg: should contain the address and the length of the FPGA register set.
50 * Freescale on-board FPGA connected on I2C bus
52 Some Freescale boards like BSC9132QDS have on board FPGA connected on
57 indicating the type of FPGA. Example:
59 - reg: Should contain the address of the FPGA
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| /openbmc/linux/Documentation/fpga/ |
| H A D | dfl.rst | 2 FPGA Device Feature List (DFL) Framework Overview
57 interface to FPGA, e.g. the FPGA Management Engine (FME) and Port (more
197 FIU - FME (FPGA Management Engine)
342 b) Partial Reconfiguration. The FME driver creates FPGA manager, FPGA
372 FPGA virtualization - PCIe SRIOV
414 | FPGA || FPGA || FPGA | |
422 | FPGA Container Device | | | FPGA Container Device |
423 | (FPGA Base Region) | | | (FPGA Base Region) |
426 | FPGA PCIE Module | | Virtual | FPGA PCIE Module |
433 FPGA PCIe device driver is always loaded first once an FPGA PCIe PF or VF device
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| /openbmc/linux/drivers/char/xillybus/ |
| H A D | Kconfig | 10 tristate "Xillybus generic FPGA interface"
16 programmable logic (FPGA). The driver probes the hardware for
28 with the FPGA. The module will be called xillybus_pcie.
43 tristate "XillyUSB: Xillybus generic FPGA interface for USB"
49 with the FPGA.
52 the FPGA. The module will be called xillyusb.
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| /openbmc/linux/drivers/misc/altera-stapl/ |
| H A D | Kconfig | 2 comment "Altera FPGA firmware download module (requires I2C)"
6 tristate "Altera FPGA firmware download module"
9 An Altera FPGA module. Say Y when you want to support this tool.
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| /openbmc/openbmc/meta-arm/meta-arm-bsp/documentation/corstone1000/ |
| H A D | release-notes.rst | 38 - This software release is tested on Corstone-1000 FPGA version AN550_v2
61 - This software release is tested on Corstone-1000 FPGA version AN550_v2
86 - This software release is tested on Corstone-1000 FPGA version AN550_v1
97 - FPGA support Linux distro install and boot through installer. However,
106 - This software release is tested on Corstone-1000 FPGA version AN550_v1
116 - The following tests only work on Corstone-1000 FPGA: ACS tests (SCT, FWTS,
121 - This software release is tested on Corstone-1000 FPGA version AN550_v1
130 - The following tests only work on Corstone-1000 FPGA: ACS tests (SCT, FWTS,
135 - This software release is tested on Corstone-1000 FPGA version AN550_v1
169 - This software release is tested on Corstone-1000 FPGA version AN550_v1
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| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | gpio-ts4900.txt | 1 * Technologic Systems I2C-FPGA's GPIO controller bindings
3 This bindings describes the GPIO controller for Technologic's FPGA core.
4 TS-4900's FPGA encodes the GPIO state on 3 bits, whereas the TS-7970's FPGA
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| /openbmc/linux/drivers/fpga/tests/ |
| H A D | Kconfig | 2 bool "KUnit test for the FPGA subsystem" if !KUNIT_ALL_TESTS
3 depends on FPGA=y && FPGA_REGION=y && FPGA_BRIDGE=y && KUNIT=y && MODULES=n
6 This builds unit tests for the FPGA subsystem
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| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | arm,versatile-fpga-irq.txt | 1 * ARM Versatile FPGA interrupt controller
3 One or more FPGA IRQ controllers can be synthesized in an ARM reference board
12 as the FPGA IRQ controller has no configuration options for interrupt
14 - reg: The register bank for the FPGA interrupt controller.
36 - interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ
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