1*7e86242bSMario Sixgdsys IO endpoint of IHS FPGA devices 2*7e86242bSMario Six 3*7e86242bSMario SixThe IO endpoint of IHS FPGA devices is a packet-based transmission interface 4*7e86242bSMario Sixthat allows interconnected gdsys devices to send and receive data over the 5*7e86242bSMario SixFPGA's main ethernet connection. 6*7e86242bSMario Six 7*7e86242bSMario SixRequired properties: 8*7e86242bSMario Six- compatible: must be "gdsys,io-endpoint" 9*7e86242bSMario Six- reg: describes the address and length of the endpoint's register map (within 10*7e86242bSMario Six the FPGA's register space) 11*7e86242bSMario Six 12*7e86242bSMario SixExample: 13*7e86242bSMario Six 14*7e86242bSMario Sixfpga0_ep0 { 15*7e86242bSMario Six compatible = "gdsys,io-endpoint"; 16*7e86242bSMario Six reg = <0x020 0x10 17*7e86242bSMario Six 0x320 0x10 18*7e86242bSMario Six 0x340 0x10 19*7e86242bSMario Six 0x360 0x10>; 20*7e86242bSMario Six}; 21