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Searched refs:CLK_IS_CRITICAL (Results 1 – 25 of 180) sorted by relevance

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/openbmc/linux/drivers/clk/st/
H A Dclk-flexgen.c308 { .name = "clk-ic-lmi0", .flags = CLK_IS_CRITICAL },
318 { .name = "clk-ic-lmi0", .flags = CLK_IS_CRITICAL },
319 { .name = "clk-ic-lmi1", .flags = CLK_IS_CRITICAL },
337 { .name = "clk-icn-cpu", .flags = CLK_IS_CRITICAL },
344 { .name = "clk-ext2fa9", .flags = CLK_IS_CRITICAL },
354 { .name = "clk-icn-lmi", .flags = CLK_IS_CRITICAL },
357 { .name = "clk-icn-sbc", .flags = CLK_IS_CRITICAL },
382 { .name = "clk-icn-cpu", .flags = CLK_IS_CRITICAL },
389 { .name = "clk-ext2fa9", .flags = CLK_IS_CRITICAL },
399 { .name = "clk-icn-lmi", .flags = CLK_IS_CRITICAL },
[all …]
/openbmc/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7110-stg.c49 JH71X0_GATE(JH7110_STGCLK_PCIE_SLV_MAIN, "pcie_slv_main", CLK_IS_CRITICAL,
55 JH71X0_GATE(JH7110_STGCLK_GRP0_MAIN, "mtrx_grp0_main", CLK_IS_CRITICAL,
57 JH71X0_GATE(JH7110_STGCLK_GRP0_BUS, "mtrx_grp0_bus", CLK_IS_CRITICAL,
59 JH71X0_GATE(JH7110_STGCLK_GRP0_STG, "mtrx_grp0_stg", CLK_IS_CRITICAL,
61 JH71X0_GATE(JH7110_STGCLK_GRP1_MAIN, "mtrx_grp1_main", CLK_IS_CRITICAL,
63 JH71X0_GATE(JH7110_STGCLK_GRP1_BUS, "mtrx_grp1_bus", CLK_IS_CRITICAL,
65 JH71X0_GATE(JH7110_STGCLK_GRP1_STG, "mtrx_grp1_stg", CLK_IS_CRITICAL,
67 JH71X0_GATE(JH7110_STGCLK_GRP1_HIFI, "mtrx_grp1_hifi", CLK_IS_CRITICAL,
H A Dclk-starfive-jh7110-sys.c56 JH71X0_GATE(JH7110_SYSCLK_AHB0, "ahb0", CLK_IS_CRITICAL, JH7110_SYSCLK_STG_AXIAHB),
57 JH71X0_GATE(JH7110_SYSCLK_AHB1, "ahb1", CLK_IS_CRITICAL, JH7110_SYSCLK_STG_AXIAHB),
59 JH71X0_GATE(JH7110_SYSCLK_APB0, "apb0", CLK_IS_CRITICAL, JH7110_SYSCLK_APB_BUS),
77 JH71X0_GATE(JH7110_SYSCLK_CORE, "core", CLK_IS_CRITICAL, JH7110_SYSCLK_CPU_CORE),
91 JH71X0_GATE(JH7110_SYSCLK_NOC_BUS_CPU_AXI, "noc_bus_cpu_axi", CLK_IS_CRITICAL,
115 JH71X0_GATE(JH7110_SYSCLK_NOC_BUS_ISP_AXI, "noc_bus_isp_axi", CLK_IS_CRITICAL,
121 JH71X0_GATE(JH7110_SYSCLK_AXI_CFG1_MAIN, "axi_cfg1_main", CLK_IS_CRITICAL,
123 JH71X0_GATE(JH7110_SYSCLK_AXI_CFG1_AHB, "axi_cfg1_ahb", CLK_IS_CRITICAL,
159 JH71X0_GATE(JH7110_SYSCLK_AXI_CFG0_MAIN, "axi_cfg0_main", CLK_IS_CRITICAL,
161 JH71X0_GATE(JH7110_SYSCLK_AXI_CFG0_HIFI4, "axi_cfg0_hifi4", CLK_IS_CRITICAL,
[all …]
H A Dclk-starfive-jh7100.c87 JH71X0_GATE(JH7100_CLK_DOM3AHB_BUS, "dom3ahb_bus", CLK_IS_CRITICAL, JH7100_CLK_AHB_BUS),
88 JH71X0_GATE(JH7100_CLK_DOM7AHB_BUS, "dom7ahb_bus", CLK_IS_CRITICAL, JH7100_CLK_AHB_BUS),
89 JH71X0_GATE(JH7100_CLK_U74_CORE0, "u74_core0", CLK_IS_CRITICAL, JH7100_CLK_CPU_CORE),
90 JH71X0_GDIV(JH7100_CLK_U74_CORE1, "u74_core1", CLK_IS_CRITICAL, 8, JH7100_CLK_CPU_CORE),
91 JH71X0_GATE(JH7100_CLK_U74_AXI, "u74_axi", CLK_IS_CRITICAL, JH7100_CLK_CPU_AXI),
92 JH71X0_GATE(JH7100_CLK_U74RTC_TOGGLE, "u74rtc_toggle", CLK_IS_CRITICAL, JH7100_CLK_OSC_SYS),
125 JH71X0_GDIV(JH7100_CLK_DDRPLL_DIV4, "ddrpll_div4", CLK_IS_CRITICAL, 2,
127 JH71X0_GDIV(JH7100_CLK_DDRPLL_DIV8, "ddrpll_div8", CLK_IS_CRITICAL, 2,
130 JH71X0_GMUX(JH7100_CLK_DDRC0, "ddrc0", CLK_IS_CRITICAL, 4,
135 JH71X0_GMUX(JH7100_CLK_DDRC1, "ddrc1", CLK_IS_CRITICAL, 4,
[all …]
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8186-infra_ao.c74 "infra_ao_scp_core", "top_scp", 4, CLK_IS_CRITICAL),
77 "infra_ao_sej", "top_axi", 5, CLK_IS_CRITICAL),
106 "infra_ao_dvfsrc", "top_dvfsrc", 7, CLK_IS_CRITICAL),
118 "infra_ao_dapc", "top_axi", 20, CLK_IS_CRITICAL),
145 GATE_INFRA_AO2_FLAGS(CLK_INFRA_AO_SSPM, "infra_ao_sspm", "top_sspm", 15, CLK_IS_CRITICAL),
167 CLK_IS_CRITICAL),
169 CLK_IS_CRITICAL),
177 "infra_ao_sej_f13m", "clk26m", 15, CLK_IS_CRITICAL),
180 "infra_ao_aes_top0_bclk", "top_axi", 16, CLK_IS_CRITICAL),
H A Dclk-mt8188-infra_ao.c87 GATE_INFRA_AO0_FLAGS(CLK_INFRA_AO_SEJ, "infra_ao_sej", "top_axi", 5, CLK_IS_CRITICAL),
115 "clk26m", 7, CLK_IS_CRITICAL),
127 "top_axi", 20, CLK_IS_CRITICAL),
143 "top_sspm", 15, CLK_IS_CRITICAL),
145 "top_axi", 17, CLK_IS_CRITICAL),
166 "top_axi", 25, CLK_IS_CRITICAL),
171 "top_axi", 0, CLK_IS_CRITICAL),
173 "top_axi", 1, CLK_IS_CRITICAL),
H A Dclk-mt7986-topckgen.c206 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
211 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
215 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
219 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
245 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
264 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
H A Dclk-mt8195-infra_ao.c86 GATE_INFRA_AO0_FLAGS(CLK_INFRA_AO_SEJ, "infra_ao_sej", "top_axi", 5, CLK_IS_CRITICAL),
124 CLK_IS_CRITICAL),
145 CLK_IS_CRITICAL),
147 CLK_IS_CRITICAL),
172 CLK_IS_CRITICAL),
179 CLK_IS_CRITICAL),
181 CLK_IS_CRITICAL),
H A Dclk-mt8195-topckgen.c866 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
869 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
872 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
875 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
959 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
1029 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
1040 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
1152 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
1155 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
1158 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
[all …]
H A Dclk-mt7981-topckgen.c320 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
324 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
329 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
333 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
337 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
362 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
H A Dclk-mt8186-topckgen.c507 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
510 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
562 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
573 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
576 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
630 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
H A Dclk-mt8188-topckgen.c958 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
961 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
964 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
967 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
1086 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
1097 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
1174 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
1177 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
H A Dclk-mt8183.c461 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
518 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
532 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
769 GATE_INFRA2_FLAGS(CLK_INFRA_SSPM, "infra_sspm", "sspm_sel", 15, CLK_IS_CRITICAL),
772 GATE_INFRA2_FLAGS(CLK_INFRA_SSPM_BUS_HCLK, "infra_sspm_bus_hclk", "axi_sel", 17, CLK_IS_CRITICAL),
791 GATE_INFRA3_FLAGS(CLK_INFRA_SSPM_26M_SELF, "infra_sspm_26m_self", "f_f26m_ck", 3, CLK_IS_CRITICAL),
793 GATE_INFRA3_FLAGS(CLK_INFRA_SSPM_32K_SELF, "infra_sspm_32k_self", "clk32k", 4, CLK_IS_CRITICAL),
H A Dclk-mt6795-topckgen.c453 0x40, 0, 3, 7, CLK_IS_CRITICAL),
455 0x40, 8, 1, 15, CLK_IS_CRITICAL),
457 0x40, 16, 1, 23, CLK_IS_CRITICAL),
493 0xa0, 16, 3, 23, CLK_IS_CRITICAL),
H A Dclk-mt8173-topckgen.c533 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
536 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
582 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
604 CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3588.c34 #define RK3588_LINKED_CLK CLK_IS_CRITICAL
817 CLK_IS_CRITICAL,
829 CLK_IS_CRITICAL,
1322 CLK_IS_CRITICAL,
1326 CLK_IS_CRITICAL,
1330 CLK_IS_CRITICAL,
1334 CLK_IS_CRITICAL,
1342 CLK_IS_CRITICAL,
1346 CLK_IS_CRITICAL,
2302 CLK_IS_CRITICAL,
[all …]
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx93.c58 { IMX93_CLK_A55_PERIPH, "a55_periph_root", 0x0000, FAST_SEL, CLK_IS_CRITICAL },
59 { IMX93_CLK_A55_MTR_BUS, "a55_mtr_bus_root", 0x0080, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
60 { IMX93_CLK_A55, "a55_alt_root", 0x0100, FAST_SEL, CLK_IS_CRITICAL },
61 { IMX93_CLK_M33, "m33_root", 0x0180, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
62 { IMX93_CLK_BUS_WAKEUP, "bus_wakeup_root", 0x0280, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
63 { IMX93_CLK_BUS_AON, "bus_aon_root", 0x0300, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
64 { IMX93_CLK_WAKEUP_AXI, "wakeup_axi_root", 0x0380, FAST_SEL, CLK_IS_CRITICAL },
118 { IMX93_CLK_HSIO, "hsio_root", 0x1e80, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL},
122 { IMX93_CLK_NIC_AXI, "nic_axi_root", 0x2080, FAST_SEL, CLK_IS_CRITICAL, },
161 { IMX93_CLK_CM33_GATE, "cm33", "m33_root", 0x8040, CLK_IS_CRITICAL },
[all …]
H A Dclk-imx5.c147 clk[IMX5_CLK_AHB_MAX] = imx_clk_gate2_flags("ahb_max", "ahb", MXC_CCM_CCGR0, 28, CLK_IS_CRITICAL); in mx5_clocks_common_init()
148 …k[IMX5_CLK_AIPS_TZ1] = imx_clk_gate2_flags("aips_tz1", "ahb", MXC_CCM_CCGR0, 24, CLK_IS_CRITICAL); in mx5_clocks_common_init()
149 …k[IMX5_CLK_AIPS_TZ2] = imx_clk_gate2_flags("aips_tz2", "ahb", MXC_CCM_CCGR0, 26, CLK_IS_CRITICAL); in mx5_clocks_common_init()
150 clk[IMX5_CLK_TMAX1] = imx_clk_gate2_flags("tmax1", "ahb", MXC_CCM_CCGR1, 0, CLK_IS_CRITICAL); in mx5_clocks_common_init()
151 clk[IMX5_CLK_TMAX2] = imx_clk_gate2_flags("tmax2", "ahb", MXC_CCM_CCGR1, 2, CLK_IS_CRITICAL); in mx5_clocks_common_init()
152 clk[IMX5_CLK_TMAX3] = imx_clk_gate2_flags("tmax3", "ahb", MXC_CCM_CCGR1, 4, CLK_IS_CRITICAL); in mx5_clocks_common_init()
153 clk[IMX5_CLK_SPBA] = imx_clk_gate2_flags("spba", "ipg", MXC_CCM_CCGR5, 0, CLK_IS_CRITICAL); in mx5_clocks_common_init()
218 …EMI_FAST_GATE] = imx_clk_gate2_flags("emi_fast_gate", "dummy", MXC_CCM_CCGR5, 14, CLK_IS_CRITICAL); in mx5_clocks_common_init()
233 …IMX5_CLK_GPC_DVFS] = imx_clk_gate2_flags("gpc_dvfs", "dummy", MXC_CCM_CCGR5, 24, CLK_IS_CRITICAL); in mx5_clocks_common_init()
419 …K_MIPI_ESC_GATE] = imx_clk_gate2_flags("mipi_esc_gate", "ipg", MXC_CCM_CCGR4, 10, CLK_IS_CRITICAL); in mx51_clocks_init()
[all …]
H A Dclk-imx6sx.c370 …6SX_CLK_AIPS_TZ1] = imx_clk_hw_gate2_flags("aips_tz1", "ahb", base + 0x68, 0, CLK_IS_CRITICAL); in imx6sx_clocks_init()
371 …6SX_CLK_AIPS_TZ2] = imx_clk_hw_gate2_flags("aips_tz2", "ahb", base + 0x68, 2, CLK_IS_CRITICAL); in imx6sx_clocks_init()
384 …SX_CLK_AIPS_TZ3] = imx_clk_hw_gate2_flags("aips_tz3", "ahb", base + 0x68, 30, CLK_IS_CRITICAL); in imx6sx_clocks_init()
397 …X6SX_CLK_WAKEUP] = imx_clk_hw_gate2_flags("wakeup", "ipg", base + 0x6c, 18, CLK_IS_CRITICAL); in imx6sx_clocks_init()
411 …X6SX_CLK_IPMUX1] = imx_clk_hw_gate2_flags("ipmux1", "ahb", base + 0x70, 16, CLK_IS_CRITICAL); in imx6sx_clocks_init()
412 …X6SX_CLK_IPMUX2] = imx_clk_hw_gate2_flags("ipmux2", "ahb", base + 0x70, 18, CLK_IS_CRITICAL); in imx6sx_clocks_init()
413 …X6SX_CLK_IPMUX3] = imx_clk_hw_gate2_flags("ipmux3", "ahb", base + 0x70, 20, CLK_IS_CRITICAL); in imx6sx_clocks_init()
429 …CLK_MMDC_P0_IPG] = imx_clk_hw_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL); in imx6sx_clocks_init()
430 …CLK_MMDC_P1_IPG] = imx_clk_hw_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL); in imx6sx_clocks_init()
437 …X_CLK_PER2_MAIN] = imx_clk_hw_gate2_flags("per2_main", "ahb", base + 0x78, 14, CLK_IS_CRITICAL); in imx6sx_clocks_init()
[all …]
H A Dclk-imx6sll.c161 …LK_USBPHY1_GATE] = imx_clk_hw_gate_flags("usbphy1_gate", "dummy", base + 0x10, 6, CLK_IS_CRITICAL); in imx6sll_clocks_init()
162 …LK_USBPHY2_GATE] = imx_clk_hw_gate_flags("usbphy2_gate", "dummy", base + 0x20, 6, CLK_IS_CRITICAL); in imx6sll_clocks_init()
260 …[IMX6SLL_CLK_AIPSTZ1] = imx_clk_hw_gate2_flags("aips_tz1", "ahb", base + 0x68, 0, CLK_IS_CRITICAL); in imx6sll_clocks_init()
261 …[IMX6SLL_CLK_AIPSTZ2] = imx_clk_hw_gate2_flags("aips_tz2", "ahb", base + 0x68, 2, CLK_IS_CRITICAL); in imx6sll_clocks_init()
302 …C_P0_FAST] = imx_clk_hw_gate_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL); in imx6sll_clocks_init()
303 …K_MMDC_P0_IPG] = imx_clk_hw_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL); in imx6sll_clocks_init()
304 …K_MMDC_P1_IPG] = imx_clk_hw_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL); in imx6sll_clocks_init()
305 …[IMX6SLL_CLK_OCRAM] = imx_clk_hw_gate_flags("ocram", "ahb", base + 0x74, 28, CLK_IS_CRITICAL); in imx6sll_clocks_init()
314 hws[IMX6SLL_CLK_ROM] = imx_clk_hw_gate2_flags("rom", "ahb", base + 0x7c, 0, CLK_IS_CRITICAL); in imx6sll_clocks_init()
/openbmc/linux/drivers/clk/bcm/
H A Dclk-bcm63xx-gate.c129 .flags = CLK_IS_CRITICAL,
142 .flags = CLK_IS_CRITICAL,
173 .flags = CLK_IS_CRITICAL,
177 .flags = CLK_IS_CRITICAL,
184 .flags = CLK_IS_CRITICAL,
221 .flags = CLK_IS_CRITICAL,
300 .flags = CLK_IS_CRITICAL,
424 .flags = CLK_IS_CRITICAL,
/openbmc/linux/drivers/clk/baikal-t1/
H A Dclk-ccu-pll.c67 CLK_IS_CRITICAL, CCU_PLL_BASIC),
69 CLK_IS_CRITICAL | CLK_SET_RATE_GATE, 0),
71 CLK_IS_CRITICAL | CLK_SET_RATE_GATE, 0),
73 CLK_IS_CRITICAL, CCU_PLL_BASIC),
75 CLK_IS_CRITICAL | CLK_SET_RATE_GATE, 0)
/openbmc/linux/drivers/clk/microchip/
H A Dclk-mpfs.c297 CLK_PERIPH(CLK_ENVM, "clk_periph_envm", PARENT_CLK(AHB), 0, CLK_IS_CRITICAL),
302 CLK_PERIPH(CLK_MMUART0, "clk_periph_mmuart0", PARENT_CLK(AHB), 5, CLK_IS_CRITICAL),
314 CLK_PERIPH(CLK_RTC, "clk_periph_rtc", PARENT_CLK(AHB), 18, CLK_IS_CRITICAL),
319 CLK_PERIPH(CLK_DDRC, "clk_periph_ddrc", PARENT_CLK(AHB), 23, CLK_IS_CRITICAL),
320 CLK_PERIPH(CLK_FIC0, "clk_periph_fic0", PARENT_CLK(AXI), 24, CLK_IS_CRITICAL),
321 CLK_PERIPH(CLK_FIC1, "clk_periph_fic1", PARENT_CLK(AXI), 25, CLK_IS_CRITICAL),
322 CLK_PERIPH(CLK_FIC2, "clk_periph_fic2", PARENT_CLK(AXI), 26, CLK_IS_CRITICAL),
323 CLK_PERIPH(CLK_FIC3, "clk_periph_fic3", PARENT_CLK(AXI), 27, CLK_IS_CRITICAL),
324 CLK_PERIPH(CLK_ATHENA, "clk_periph_athena", PARENT_CLK(AXI), 28, CLK_IS_CRITICAL),
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos7885.c636 CLK_CON_GAT_GOUT_CORE_CCI_550_ACLK, 21, CLK_IS_CRITICAL, 0),
639 CLK_CON_GAT_GOUT_CORE_GIC400_CLK, 21, CLK_IS_CRITICAL, 0),
645 CLK_CON_GAT_GOUT_CORE_TREX_D_CORE_ACLK, 21, CLK_IS_CRITICAL, 0),
647 CLK_CON_GAT_GOUT_CORE_TREX_D_CORE_GCLK, 21, CLK_IS_CRITICAL, 0),
649 CLK_CON_GAT_GOUT_CORE_TREX_D_CORE_PCLK, 21, CLK_IS_CRITICAL, 0),
652 CLK_IS_CRITICAL, 0),
655 CLK_IS_CRITICAL, 0),
657 CLK_CON_GAT_GOUT_CORE_TREX_P_CORE_PCLK, 21, CLK_IS_CRITICAL, 0),
660 CLK_IS_CRITICAL, 0),
/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra-super-gen4.c118 CLK_IS_CRITICAL, in tegra_sclk_init()
131 CLK_IS_CRITICAL, in tegra_sclk_init()
145 CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, in tegra_sclk_init()
160 CLK_IS_CRITICAL, clk_base + SYSTEM_CLK_RATE, in tegra_sclk_init()

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