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Searched refs:PRIx32 (Results 1 – 25 of 114) sorted by relevance

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/openbmc/qemu/hw/acpi/
H A Dtrace-events6 mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32
7 mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32
8 mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32
9 mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32
10 mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32
11 mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32
13 mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
14 mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
31 cpuhp_acpi_read_cmd_data(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32
32 cpuhp_acpi_read_cmd_data2(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32
[all …]
/openbmc/qemu/hw/ppc/
H A Dtrace-events42 spapr_iommu_ddw_remove(uint32_t liobn) "liobn=0x%"PRIx32
46 spapr_drc_set_isolation_state(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%"PRIx32
51 spapr_drc_set_configured(uint32_t index) "drc: 0x%"PRIx32
52 spapr_drc_attach(uint32_t index) "drc: 0x%"PRIx32
53 spapr_drc_unplug_request(uint32_t index) "drc: 0x%"PRIx32
54 spapr_drc_awaiting_quiesce(uint32_t index) "drc: 0x%"PRIx32
55 spapr_drc_reset(uint32_t index) "drc: 0x%"PRIx32
56 spapr_drc_realize(uint32_t index) "drc: 0x%"PRIx32
59 spapr_drc_unrealize(uint32_t index) "drc: 0x%"PRIx32
138 …ding, uint32_t request) "env [%p] irq 0x%05" PRIx32 " level %d => pending 0x%08" PRIx32 " req 0x%0…
[all …]
H A Dpnv_nest_pervasive.c59 "xscom read at 0x%" PRIx32 "\n", in pnv_chiplet_ctrl_read()
72 "xscom read at 0x%" PRIx32 "\n", in pnv_chiplet_ctrl_read()
81 "xscom read at 0x%" PRIx32 "\n", in pnv_chiplet_ctrl_read()
98 "read at 0x%" PRIx32 "\n", __func__, reg); in pnv_chiplet_ctrl_read()
157 "write at 0x%" PRIx32 "\n", in pnv_chiplet_ctrl_write()
H A Dpnv_n1_chiplet.c41 qemu_log_mask(LOG_UNIMP, "%s: Invalid xscom read at 0x%" PRIx32 "\n", in pnv_n1_chiplet_pb_scom_eq_read()
58 qemu_log_mask(LOG_UNIMP, "%s: Invalid xscom write at 0x%" PRIx32 "\n", in pnv_n1_chiplet_pb_scom_eq_write()
85 qemu_log_mask(LOG_UNIMP, "%s: Invalid xscom read at 0x%" PRIx32 "\n", in pnv_n1_chiplet_pb_scom_es_read()
102 qemu_log_mask(LOG_UNIMP, "%s: Invalid xscom write at 0x%" PRIx32 "\n", in pnv_n1_chiplet_pb_scom_es_write()
/openbmc/qemu/hw/dma/
H A Dtrace-events25 pl330_fault(void *ptr, uint32_t flags) "ch: %p, flags: 0x%"PRIx32
29 …2_t size, uint32_t num, char ch) "channel:%"PRId8" address:0x%08"PRIx32" size:0x%"PRIx32" num:%"PR…
36 …t32_t sz, uint32_t num, char ch) "channel:%"PRId8" address:0x%08"PRIx32" size:0x%"PRIx32" num:%"PR…
39 …_cycle(uint32_t addr, uint32_t size) "PL330 read from memory @0x%08"PRIx32" (size = 0x%08"PRIx32")"
40 pl330_hexdump(uint32_t offset, char *str) " 0x%04"PRIx32":%s"
44 pl330_iomem_write(uint32_t offset, uint32_t value) "addr: 0x%08"PRIx32" data: 0x%08"PRIx32
46 pl330_iomem_read(uint32_t addr, uint32_t data) "addr: 0x%08"PRIx32" data: 0x%08"PRIx32
/openbmc/qemu/hw/intc/
H A Dppc-uic.c60 LOG_UIC("%s: uicsr %08" PRIx32 " uicer %08" PRIx32 in ppcuic_trigger_irq()
61 " uiccr %08" PRIx32 "\n" in ppcuic_trigger_irq()
62 " %08" PRIx32 " ir %08" PRIx32 " cr %08" PRIx32 "\n", in ppcuic_trigger_irq()
95 "vector %08" PRIx32 "\n", uic->uicvr); in ppcuic_trigger_irq()
109 LOG_UIC("%s: irq %d level %d uicsr %08" PRIx32 in ppcuic_set_irq()
110 " mask %08" PRIx32 " => %08" PRIx32 " %08" PRIx32 "\n", in ppcuic_set_irq()
134 LOG_UIC("%s: irq %d level %d sr %" PRIx32 " => " in ppcuic_set_irq()
135 "%08" PRIx32 "\n", __func__, irq_num, level, uic->uicsr, sr); in ppcuic_set_irq()
/openbmc/qemu/hw/i386/
H A Dtrace-events16 …_iotlb_pasid(uint16_t domain, uint32_t pasid) "iotlb invalidate domain 0x%"PRIx16" pasid 0x%"PRIx32
17 …ait_sw(uint64_t addr, uint32_t data) "wait invalidate status write addr 0x%"PRIx64" data 0x%"PRIx32
20 …nularity, uint32_t index, uint32_t mask) "granularity 0x%"PRIx32" index 0x%"PRIx32" mask 0x%"PRIx32
51 vtd_reg_ir_root(uint64_t addr, uint32_t size) "addr 0x%"PRIx64" size 0x%"PRIx32
52 vtd_reg_write_gcmd(uint32_t status, uint32_t val) "status 0x%"PRIx32" value 0x%"PRIx32
53 vtd_reg_write_fectl(uint32_t value) "value 0x%"PRIx32
54 vtd_reg_write_iectl(uint32_t value) "value 0x%"PRIx32
73 …g_fail(uint64_t addr, uint32_t head) "error: fail to write at addr 0x%"PRIx64" + offset 0x%"PRIx32
80 …d_read_fail(uint64_t addr, uint32_t head) "error: fail to access memory at 0x%"PRIx64" + 0x%"PRIx32
81 …int32_t tail, uint64_t buf) "command buffer head at 0x%"PRIx32" command buffer tail at 0x%"PRIx32"…
[all …]
/openbmc/qemu/nbd/
H A Dtrace-events6 …32_t err, const char *type, const char *msg) "server reported error 0x%" PRIx32 " (%s) with additi…
7 …har *reply_name) "server failed request %" PRIu32 " (%s) with error 0x%" PRIx32 " (%s), attempting…
12 …m, uint32_t preferred, uint32_t maximum) "Block sizes are 0x%" PRIx32 ", 0x%" PRIx32 ", 0x%" PRIx32
21 nbd_receive_negotiate_server_flags(uint32_t globalflags) "Global flags are 0x%" PRIx32
37 …der(uint32_t magic, const char *mode) "Server sent unexpected magic 0x%" PRIx32 " for negotiated m…
51 …red, uint32_t maximum) "advertising minimum 0x%" PRIx32 ", preferred 0x%" PRIx32 ", maximum 0x%" P…
58 nbd_negotiate_options_flags(uint32_t flags) "Received client flags 0x%" PRIx32
64 …uint16_t type, uint64_t from, uint64_t len) "Got request: { magic = 0x%" PRIx32 ", .flags = 0x%" P…
77 …t sent non-compliant unaligned %s request: from=0x%" PRIx64 ", len=0x%" PRIx64 ", align=0x%" PRIx32
/openbmc/qemu/hw/sd/
H A Dtrace-events8 allwinner_sdhost_update_irq(uint32_t irq) "IRQ bits 0x%" PRIx32
31 sdhci_adma(const char *desc, uint32_t sysad) "%s: admasysaddr=0x%" PRIx32
48 sdcard_set_block_count(uint32_t cnt) "block cnt 0x%"PRIx32
51 sdcard_erase(uint32_t first, uint32_t last) "addr first 0x%" PRIx32" last 0x%" PRIx32
54 sdcard_req_addr(uint32_t req_arg, uint64_t addr) "req 0x%" PRIx32 " addr 0x%" PRIx64
68 pl181_command_send(uint8_t cmd, uint32_t arg) "sending CMD%02d arg 0x%08" PRIx32
72 pl181_fifo_push(uint32_t data) "FIFO push 0x%08" PRIx32
73 pl181_fifo_pop(uint32_t data) "FIFO pop 0x%08" PRIx32
/openbmc/qemu/hw/misc/
H A Dtrace-events4 allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIx32
114 …_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
233 imx6_analog_read(const char *reg, uint32_t value) "reg[%s] => 0x%" PRIx32
234 imx6_analog_write(const char *reg, uint32_t value) "reg[%s] <= 0x%" PRIx32
239 imx6_ccm_read(const char *reg, uint32_t value) "reg[%s] => 0x%" PRIx32
241 imx6_ccm_write(const char *reg, uint32_t value) "reg[%s] <= 0x%" PRIx32
247 ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
248 ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
251 imx7_src_read(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
252 imx7_src_write(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
[all …]
/openbmc/qemu/hw/scsi/
H A Dtrace-events55 …ate(uint32_t head, uint32_t tail, unsigned int busy) "head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %…
58 …head, uint32_t tail, int busy) "context 0x%" PRIx64 " head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %…
231 …uint32_t tag, uint32_t len, void *req) "SCSI xfer complete tag=0x%"PRIx32" len=0x%"PRIx32", req=%p"
232 …_t tag, uint32_t status, void *req) "SCSI cmd complete, tag=0x%"PRIx32" status=0x%"PRIx32", req=%p"
255 lsi_queue_command(uint32_t tag) "Queueing tag=0x%"PRIx32
260 lsi_queue_req(uint32_t tag) "Queueing IO tag=0x%"PRIx32
273 lsi_do_msgout_abort(uint32_t tag) "MSG: ABORT TAG tag=0x%"PRIx32
277 lsi_memcpy(uint32_t dest, uint32_t src, int count) "memcpy dest 0x%"PRIx32" src 0x%"PRIx32" count %…
279 …t32_t dsp, uint32_t insn, uint32_t addr) "SCRIPTS dsp=0x%"PRIx32" opcode 0x%"PRIx32" arg 0x%"PRIx32
293 lsi_execute_script_tc_jump(uint32_t addr) "Jump to 0x%"PRIx32
[all …]
/openbmc/qemu/hw/block/
H A Dtrace-events81 m25p80_flash_erase(void *s, int offset, uint32_t len) "[%p] offset = 0x%"PRIx32", len = %u"
82 …ddr, uint8_t prev, uint8_t data) "[%p] programming zero to one! addr=0x%"PRIx32" 0x%"PRIx8" -> 0x…
84 m25p80_command_decoded(void *s, uint32_t cmd) "[%p] new command:0x%"PRIx32
85 …uint8_t ear, uint32_t cur_addr) "[%p] decode cmd: 0x%"PRIx32" len %d ear 0x%"PRIx8" addr 0x%"PRIx32
89 m25p80_page_program(void *s, uint32_t addr, uint8_t tx) "[%p] page program cur_addr=0x%"PRIx32" dat…
90 …t8_t t) "[%p] Transfer state 0x%"PRIx8" len 0x%"PRIx32" needed 0x%"PRIx8" pos 0x%"PRIx32" addr 0x%…
91 m25p80_read_byte(void *s, uint32_t addr, uint8_t v) "[%p] Read byte 0x%"PRIx32"=0x%"PRIx8
92 m25p80_read_data(void *s, uint32_t pos, uint8_t v) "[%p] Read data 0x%"PRIx32"=0x%"PRIx8
93 m25p80_read_sfdp(void *s, uint32_t addr, uint8_t v) "[%p] Read SFDP 0x%"PRIx32"=0x%"PRIx8
/openbmc/qemu/hw/ide/
H A Dtrace-events5 …r *reg, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus …
6 …ar *reg, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus …
7 … void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Alt Status); val 0x%02"PRIx32"; …
8 …id *bus) "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32"…
10 …void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; …
11 … void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; …
12 …void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; …
13 … void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; …
/openbmc/qemu/hw/ufs/
H A Dtrace-events13 …cmdarg2, uint32_t ucmdarg3) "uiccmd 0x%"PRIx32", ucmdarg1 0x%"PRIx32", ucmdarg2 0x%"PRIx32", ucmda…
28 ufs_err_unsupport_register_offset(uint32_t offset) "Register offset 0x%"PRIx32" is not yet supporte…
29 ufs_err_invalid_register_offset(uint32_t offset) "Register offset 0x%"PRIx32" is invalid"
/openbmc/qemu/hw/nvram/
H A Dtrace-events14 …t16_t key_value, const char *key_name, uint32_t value) "key 0x%04" PRIx16 " '%s', value 0x%" PRIx32
18 macio_nvram_read(uint32_t addr, uint8_t val) "read addr=0x%04"PRIx32" val=0x%02x"
19 macio_nvram_write(uint32_t addr, uint8_t val) "write addr=0x%04"PRIx32" val=0x%02x"
/openbmc/qemu/hw/nvme/
H A Dtrace-events13 pci_nvme_flush_ns(uint32_t nsid) "nsid 0x%"PRIx32""
27 …_dif_prchk_disabled_crc16(uint16_t apptag, uint32_t reftag) "apptag 0x%"PRIx16" reftag 0x%"PRIx32""
32 …nvme_dif_prchk_reftag_crc16(uint32_t reftag, uint32_t elbrt) "reftag 0x%"PRIx32" elbrt 0x%"PRIx32""
42 pci_nvme_dsm(uint32_t nr, uint32_t attr) "nr %"PRIu32" attr 0x%"PRIx32""
68 …8_t sel, uint32_t cdw11) "cid %"PRIu16" nsid 0x%"PRIx32" fid 0x%"PRIx8" sel 0x%"PRIx8" cdw11 0x%"P…
69 …_t save, uint32_t cdw11) "cid %"PRIu16" nsid 0x%"PRIx32" fid 0x%"PRIx8" save 0x%"PRIx8" cdw11 0x%"…
81 pci_nvme_ns_attachment_attach(uint16_t cntlid, uint32_t nsid) "cntlid=0x%"PRIx16", nsid=0x%"PRIx32""
86 …32_t dw1, uint16_t status) "cid %"PRIu16" cqid %"PRIu16" dw0 0x%"PRIx32" dw1 0x%"PRIx32" status 0x…
144 …int8_t action, uint64_t slba, uint8_t attrs) "action=0x%"PRIx8", slba=%"PRIu64", attrs=0x%"PRIx32""
173 pci_nvme_err_invalid_getfeat(int dw10) "invalid get features, dw10=0x%"PRIx32""
[all …]
/openbmc/qemu/hw/adc/
H A Dtrace-events4 …d(const char *id, uint64_t offset, uint32_t value) " %s offset: 0x%04" PRIx64 " value 0x%04" PRIx32
5 …te(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value 0x%04" PRIx32
/openbmc/qemu/hw/pci/
H A Dmsi.c373 " address: 0x%"PRIx64" data: 0x%"PRIx32"\n", in msi_notify()
401 MSI_DEV_PRINTF(dev, "addr 0x%"PRIx32" val 0x%"PRIx32" len %d\n", in msi_write_config()
403 MSI_DEV_PRINTF(dev, "ctrl: 0x%"PRIx16" address: 0x%"PRIx32, in msi_write_config()
407 fprintf(stderr, " address-hi: 0x%"PRIx32, in msi_write_config()
413 fprintf(stderr, " mask 0x%"PRIx32" pending 0x%"PRIx32, in msi_write_config()
/openbmc/qemu/hw/pci-host/
H A Dtrace-events34 …2_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32
49 ppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32
50 …te(uint64_t addr, uint32_t val, uint32_t size) "addr 0x%" PRIx64 " = 0x%" PRIx32 " size 0x%" PRIx32
/openbmc/qemu/hw/char/
H A Dtrace-events85 exynos_uart_irq_raised(uint32_t channel, uint32_t reg) "UART%d: IRQ raised: 0x%08"PRIx32
92 exynos_uart_tx(uint32_t channel, uint8_t ch) "UART%d: Tx 0x%02"PRIx32
93 exynos_uart_intclr(uint32_t channel, uint32_t reg) "UART%d: interrupts cleared: 0x%08"PRIx32
94 …nel, const char *name, uint32_t reg) "UART%d: Trying to write into RO register: %s [0x%04"PRIx32"]"
95 exynos_uart_rx(uint32_t channel, uint8_t ch) "UART%d: Rx 0x%02"PRIx32
97 …nnel, const char *name, uint32_t reg) "UART%d: Trying to read from WO register: %s [0x%04"PRIx32"]"
110 stm32l4x5_usart_read(uint64_t addr, uint32_t data) "USART: Read <0x%" PRIx64 "> -> 0x%" PRIx32 ""
111 stm32l4x5_usart_write(uint64_t addr, uint32_t data) "USART: Write <0x%" PRIx64 "> <- 0x%" PRIx32 ""
115 stm32l4x5_usart_irq_raised(uint32_t reg) "USART: IRQ raised: 0x%08"PRIx32
/openbmc/qemu/hw/timer/
H A Dtrace-events32 aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32
33 aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32
39 …t addr, uint32_t value, unsigned size) "systick read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
40 … addr, uint32_t value, unsigned size) "systick write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
58 … addr, uint32_t value, unsigned size) "timer %u read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
59 …addr, uint32_t value, unsigned size) "timer %u write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
60 …_count(uint8_t timer_id, uint8_t counter_id, uint32_t value) "timer %u counter %u count 0x%" PRIx32
66 …35_systmr_write(uint64_t offset, uint32_t data) "timer write: offset 0x%" PRIx64 " data 0x%" PRIx32
/openbmc/openpower-hw-diags/analyzer/
H A Danalyzer_main.cpp123 trace::inf("Signature: %s 0x%0" PRIx32 " %s", in analyzeHardware()
149 trace::inf("Root cause attention: %s 0x%0" PRIx32 " %s", in analyzeHardware()
206 trace::inf("PEL created: PLID=0x%0" PRIx32, o_plid); in analyzeHardware()
/openbmc/qemu/hw/net/
H A Dtrace-events4 …8i_emac_mii_write_reg(uint32_t reg, uint32_t value) "MII write: reg=0x%" PRIx32 " value=0x%" PRIx32
5 …un8i_emac_mii_read_reg(uint32_t reg, uint32_t value) "MII read: reg=0x%" PRIx32 " value=0x%" PRIx32
6 …_t desc, uint32_t paddr, uint32_t bytes) "RX packet: desc=0x%" PRIx32 " paddr=0x%" PRIx32 " bytes=…
7 …_t desc, uint32_t paddr, uint32_t bytes) "TX packet: desc=0x%" PRIx32 " paddr=0x%" PRIx32 " bytes=…
269 …fig(uint32_t address, uint32_t val, int len) "CONFIG write 0x%"PRIx32", value: 0x%"PRIx32", len: %…
270 …fig(uint32_t address, uint32_t val, int len) "CONFIG write 0x%"PRIx32", value: 0x%"PRIx32", len: %…
334 …ac_check(uint32_t mac0, uint32_t mac1, uint32_t mac2) "Word MAC: 0x%"PRIx32" 0x%"PRIx32" 0x%"PRIx32
336 …uint32_t mac0, uint32_t mac1, uint32_t mac2) "Compare MAC to 0x%"PRIx32" 0x%"PRIx32" 0x%"PRIx32".."
392 …offset, uint32_t status, int len, int cr, int nr) "addr 0x%"PRIx32"(+0x%x) status 0x%"PRIx32 " len…
495 dp8393x_transmit_packet(int ttda) "Transmit packet at 0x%"PRIx32
[all …]
/openbmc/qemu/hw/display/
H A Dtrace-events134 …x%02x modeext=0x%02x w=%d h=%d dpitch=%d spitch=%d daddr=0x%08"PRIx32" saddr=0x%08"PRIx32" writema…
155 cg3_read(uint32_t addr, uint32_t val, unsigned size) "read addr:0x%06"PRIx32" val:0x%08"PRIx32" siz…
156 cg3_write(uint32_t addr, uint32_t val, unsigned size) "write addr:0x%06"PRIx32" val:0x%08"PRIx32" s…
159 dpcd_read(uint32_t addr, uint8_t val) "read addr:0x%"PRIx32" val:0x%02x"
160 dpcd_write(uint32_t addr, uint8_t val) "write addr:0x%"PRIx32" val:0x%02x"
177 macfb_sense_read(uint32_t value) "video sense: 0x%"PRIx32
178 macfb_sense_write(uint32_t value) "video sense: 0x%"PRIx32
189 dm163_activated_rows(int new_state) "Activated rows : 0x%" PRIx32 ""
/openbmc/qemu/hw/ssi/
H A Dtrace-events19 …read(const char *id, uint64_t addr, uint32_t data) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
20 …rite(const char *id, uint64_t addr, uint32_t data) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
32 …spi_host_transfer(uint32_t tx_data, uint32_t rx_data) "tx_data: 0x%" PRIx32 " rx_data: @0x%" PRIx32

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