trace-events - OpenGrok cross reference for /openbmc/qemu/hw/misc/trace-events

4 allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIx32
101 …_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
102 …d_scu_read(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
108 …on, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
109 …ion, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
117 …_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
118 …sreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
126 imx7_snvs_read(uint64_t offset, uint32_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx32
127 imx7_snvs_write(uint64_t offset, uint32_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx32
137 npcm7xx_clk_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
138 npcm7xx_clk_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
141 npcm7xx_gcr_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
142 npcm7xx_gcr_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
157 …d(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
158 …e(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
211 imx6_analog_read(const char *reg, uint32_t value) "reg[%s] => 0x%" PRIx32
212 imx6_analog_write(const char *reg, uint32_t value) "reg[%s] <= 0x%" PRIx32
217 imx6_ccm_read(const char *reg, uint32_t value) "reg[%s] => 0x%" PRIx32
219 imx6_ccm_write(const char *reg, uint32_t value) "reg[%s] <= 0x%" PRIx32
225 ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
226 ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
229 imx7_src_read(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
230 imx7_src_write(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
271 aspeed_peci_raise_interrupt(uint32_t ctrl, uint32_t status) "ctrl 0x%" PRIx32 " status 0x%" PRIx32