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/openbmc/linux/sound/pci/
H A Des1968.c35 * We only drive the APU/Wavecache as typical DACs and drive the
40 * Each APU can do a number of things, but we only really use
43 * is handed to the codec. One APU for mono, and a pair for stereo.
44 * When in stereo, the combination of smarts in the APU and Wavecache
49 * APU, through another rate converter APU, and then into memory via
72 * like the APU interface that is indirect registers gotten at through
296 /* APU Modes: reg 0x00, bit 4-7 */
319 /* APU Filtey Q Control */
397 /* APU Filter Control */
405 /* APU ATFP Type */
[all …]
/openbmc/openbmc/poky/meta/recipes-support/apr/apr-util/
H A Dconfigure_fixes.patch11 -sinclude(build/apu-conf.m4)
12 -sinclude(build/apu-iconv.m4)
13 -sinclude(build/apu-hints.m4)
20 +#sinclude(build/apu-conf.m4)
21 +#sinclude(build/apu-iconv.m4)
22 +#sinclude(build/apu-hints.m4)
H A Dconfigfix.patch3 Index: apr-util-1.3.4/apu-config.in
5 --- apr-util-1.3.4.orig/apu-config.in 2009-01-12 17:08:06.000000000 +0000
6 +++ apr-util-1.3.4/apu-config.in 2009-01-12 17:09:00.000000000 +0000
50 --apu-la-file)
/openbmc/linux/drivers/leds/
H A Dleds-apu.c2 * drivers/leds/leds-apu.c
80 { "apu:green:1", LED_ON, APU1_FCH_GPIO_BASE + 0 * APU1_IOSIZE },
81 { "apu:green:2", LED_OFF, APU1_FCH_GPIO_BASE + 1 * APU1_IOSIZE },
82 { "apu:green:3", LED_OFF, APU1_FCH_GPIO_BASE + 2 * APU1_IOSIZE },
86 /* PC Engines APU with factory bios "SageBios_PCEngines_APU-45" */
88 .ident = "apu",
91 DMI_MATCH(DMI_PRODUCT_NAME, "APU")
94 /* PC Engines APU with "Mainline" bios >= 4.6.8 */
96 .ident = "apu",
185 (dmi_match(DMI_PRODUCT_NAME, "APU") || dmi_match(DMI_PRODUCT_NAME, "apu1")))) { in apu_led_init()
/openbmc/linux/Documentation/networking/devlink/
H A Dsfc.rst40 - SmartNIC application co-processor (APU) first stage boot loader version.
43 - SmartNIC application co-processor (APU) co-operating system loader version.
46 - SmartNIC application co-processor (APU) main operating system version.
49 - SmartNIC application co-processor (APU) recovery operating system version.
/openbmc/qemu/hw/arm/
H A Dxlnx-versal.c40 object_initialize_child(OBJECT(s), "apu-cluster", &s->fpd.apu.cluster, in versal_create_apu_cpus()
42 qdev_prop_set_uint32(DEVICE(&s->fpd.apu.cluster), "cluster-id", 0); in versal_create_apu_cpus()
44 for (i = 0; i < ARRAY_SIZE(s->fpd.apu.cpu); i++) { in versal_create_apu_cpus()
47 object_initialize_child(OBJECT(&s->fpd.apu.cluster), in versal_create_apu_cpus()
48 "apu-cpu[*]", &s->fpd.apu.cpu[i], in versal_create_apu_cpus()
50 obj = OBJECT(&s->fpd.apu.cpu[i]); in versal_create_apu_cpus()
57 object_property_set_int(obj, "core-count", ARRAY_SIZE(s->fpd.apu.cpu), in versal_create_apu_cpus()
59 object_property_set_link(obj, "memory", OBJECT(&s->fpd.apu.mr), in versal_create_apu_cpus()
64 qdev_realize(DEVICE(&s->fpd.apu.cluster), NULL, &error_fatal); in versal_create_apu_cpus()
76 int nr_apu_cpus = ARRAY_SIZE(s->fpd.apu.cpu); in versal_create_apu_gic()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8365-clock.yaml16 - mediatek,mt8365-apu
38 apu: clock-controller@19020000 {
39 compatible = "mediatek,mt8365-apu", "syscon";
/openbmc/qemu/hw/intc/
H A Dxlnx-zynqmp-ipi.c61 FIELD(IPI_TRIG, APU, 0, 1)
73 FIELD(IPI_OBS, APU, 0, 1)
85 FIELD(IPI_ISR, APU, 0, 1)
97 FIELD(IPI_IMR, APU, 0, 1)
109 FIELD(IPI_IER, APU, 0, 1)
121 FIELD(IPI_IDR, APU, 0, 1)
123 /* APU
136 static const char *index_array_names[NUM_IPIS] = {"APU", "RPU_0", "RPU_1",
/openbmc/linux/drivers/platform/x86/
H A Dpcengines-apuv2.c78 { .name = "apu:green:1" },
79 { .name = "apu:green:2" },
80 { .name = "apu:green:3" },
133 /* Note: matching works on string prefix, so "apu2" must come before "apu" */
252 pr_err("failed to detect APU board via DMI\n"); in apu_board_init()
/openbmc/linux/arch/powerpc/xmon/
H A Dppc.h125 /* Opcode is supported by e500x2 Integer select APU. */
131 /* Opcode is supported by branch locking APU. */
134 /* Opcode is supported by performance monitor APU. */
137 /* Opcode is supported by cache locking APU. */
140 /* Opcode is supported by machine check APU. */
185 /* Opcode is supported by Thread management APU */
391 /* Xilinx APU and FSL related operands */
/openbmc/openbmc/poky/meta/recipes-support/serf/
H A Dserf_1.3.10.bb31 APU=`which apu-1-config` \
/openbmc/linux/drivers/media/pci/cx18/
H A Dcx18-mailbox.c20 static const char *rpu_str[] = { "APU", "CPU", "EPU", "HPU" };
74 API_ENTRY(APU, CX18_APU_START, 0),
75 API_ENTRY(APU, CX18_APU_STOP, 0),
76 API_ENTRY(APU, CX18_APU_RESETAI, 0),
354 case APU: in epu_cmd()
355 CX18_WARN("Unknown APU to EPU mailbox command %#0x\n", in epu_cmd()
389 case APU: in mb_ack_irq()
487 case APU: in epu_cmd_irq()
488 CX18_WARN("Unknown APU to EPU mailbox command %#0x\n", in epu_cmd_irq()
533 case APU: in cx18_api_epu_cmd_irq()
[all …]
H A Dcx18-scb.h86 /* Offset where to find the start of the APU code */
105 /* Offset to the mailbox used for sending commands from APU to CPU */
131 /* Fields for APU: */
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8365-apu.c39 .compatible = "mediatek,mt8365-apu",
51 .name = "clk-mt8365-apu",
H A Dclk-mt8195-apusys_pll.c24 * No tuner control in apu pll, so set "tuner_XXX" as zero to imply it.
25 * No rst or post divider enable in apu pll, so set "rst_bar_mask" and "en_mask"
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dkgd_pp_interface.h219 * APU power is managed to system-level requirements through the PPT
222 * maximize APU performance within the system power budget.
248 * moving average of APU power (default ~5000 ms).
249 * @PP_PWR_TYPE_FAST: manages the ~10 ms moving average of APU power,
702 uint16_t average_socket_power; // dGPU + APU power on A + A platform
752 uint16_t average_socket_power; // dGPU + APU power on A + A platform
802 uint16_t average_socket_power; // dGPU + APU power on A + A platform
855 uint16_t average_socket_power; // dGPU + APU power on A + A platform
/openbmc/linux/Documentation/ABI/stable/
H A Dsysfs-driver-firmware-zynqmp69 Only the APU along with all of its peripherals
101 application running in Linux, PMUFW will do APU only restart. If
129 the health of firmware not APU(Linux). Also, the external
186 of firmware not APU(Linux). Also, the external watchdog is
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsmuio_v11_0.c42 /* enable/disable ROM CG is not supported on APU */ in smuio_v11_0_update_rom_clock_gating()
66 /* CGTT_ROM_CLK_CTRL0 is not available for APU */ in smuio_v11_0_get_clock_gating_state()
H A Dsmuio_v11_0_6.c42 /* enable/disable ROM CG is not supported on APU */ in smuio_v11_0_6_update_rom_clock_gating()
63 /* CGTT_ROM_CLK_CTRL0 is not available for APU */ in smuio_v11_0_6_get_clock_gating_state()
H A Dsmuio_v13_0.c44 /* enable/disable ROM CG is not supported on APU */ in smuio_v13_0_update_rom_clock_gating()
65 /* CGTT_ROM_CLK_CTRL0 is not available for APU */ in smuio_v13_0_get_clock_gating_state()
/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dxlnx,versal-net-cdx.yaml30 with which APU (Application Processor Unit) interacts to find out
48 phandle to the remoteproc_r5 rproc node using which APU interacts
/openbmc/qemu/include/hw/misc/
H A Dxlnx-zynqmp-apu-ctrl.h2 * QEMU model of ZynqMP APU Control.
18 #define TYPE_XLNX_ZYNQMP_APU_CTRL "xlnx.apu-ctrl"
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-driver-ccp7 whether the CPU or APU has been fused to prevent tampering.
17 whether the AMD CPU or APU has been unlocked for debugging.
/openbmc/linux/Documentation/gpu/amdgpu/
H A Ddriver-misc.rst35 Accelerated Processing Units (APU) Info
41 :file: ./apu-asic-info-table.csv
/openbmc/openbmc/poky/meta/recipes-support/apr/
H A Dapr-util_1.6.3.bb30 MULTILIB_SCRIPTS = "${PN}-dev:${bindir}/apu-1-config"
65 -e 's,APU_BUILD_DIR=.*,APR_BUILD_DIR=,g' ${D}${bindir}/apu-1-config

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