| /openbmc/linux/drivers/media/i2c/ccs/ |
| H A D | ccs-quirk.h | 59 #define CCS_MK_QUIRK_REG_8(_reg, _val) \ argument
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| /openbmc/linux/drivers/clk/meson/ |
| H A D | g12a-aoclk.c | 46 #define AXG_AO_GATE(_name, _reg, _bit) \ argument
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| /openbmc/u-boot/drivers/clk/ |
| H A D | clk_meson.h | 18 #define MESON_GATE(id, _reg, _bit) \ argument
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| /openbmc/linux/tools/testing/selftests/powerpc/mm/ |
| H A D | large_vm_gpr_corruption.c | 54 #define CHECK_REG(_reg) \ argument
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt6797.c | 599 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
619 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| H A D | clk-mt8188-apmixedsys.c | 32 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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| H A D | clk-mt8186-apmixedsys.c | 19 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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| H A D | clk-mt6779.c | 1145 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1172 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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| /openbmc/linux/drivers/clk/sunxi-ng/ |
| H A D | ccu_nkmp.h | 35 #define SUNXI_CCU_NKMP_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ argument
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| H A D | ccu_mult.h | 45 #define SUNXI_CCU_N_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ argument
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| /openbmc/linux/drivers/media/tuners/ |
| H A D | mc44s803_priv.h | 179 #define MC44S803_REG_SM(_val, _reg) \ argument
183 #define MC44S803_REG_MS(_val, _reg) \ argument
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| /openbmc/linux/drivers/misc/ |
| H A D | ad525x_dpot.c | 500 #define DPOT_DEVICE_SHOW(_name, _reg) static ssize_t \ argument
507 #define DPOT_DEVICE_SET(_name, _reg) static ssize_t \ argument
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| /openbmc/linux/drivers/gpu/drm/msm/adreno/ |
| H A D | adreno_gpu.h | 503 #define PKT4(_reg, _cnt) \ argument
544 #define ADRENO_PROTECT_RW(_reg, _len) \ argument
553 #define ADRENO_PROTECT_RDONLY(_reg, _len) \ argument
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| H A D | a6xx_gpu_state.h | 55 #define CLUSTER(_id, _reg, _sel_reg, _sel_val) \ argument
129 #define CLUSTER_DBGAHB(_id, _base, _type, _reg) \ argument
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| /openbmc/linux/include/linux/soc/mediatek/ |
| H A D | mtk_wed.h | 227 #define mtk_wed_device_reg_read(_dev, _reg) \ argument
229 #define mtk_wed_device_reg_write(_dev, _reg, _val) \ argument
254 #define mtk_wed_device_reg_read(_dev, _reg) 0 argument
255 #define mtk_wed_device_reg_write(_dev, _reg, _val) do {} while (0) argument
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| /openbmc/linux/include/linux/mfd/ |
| H A D | max77650.h | 52 #define MAX77650_CID_BITS(_reg) (_reg & MAX77650_CID_MASK) argument
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| /openbmc/linux/arch/sh/kernel/cpu/sh2a/ |
| H A D | clock-sh7264.c | 77 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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| H A D | clock-sh7269.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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| /openbmc/linux/drivers/mfd/ |
| H A D | rc5t583.c | 30 #define DEEPSLEEP_INIT(_id, _reg, _pos) \ argument
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| /openbmc/linux/sound/soc/codecs/ |
| H A D | adau1373.c | 596 #define DECLARE_ADAU1373_OUTPUT_MIXER_CTRLS(_name, _reg) \ argument
641 #define DECLARE_ADAU1373_DSP_CHANNEL_MIXER_CTRLS(_name, _reg) \ argument
663 #define DECLARE_ADAU1373_DSP_OUTPUT_MIXER_CTRLS(_name, _reg) \ argument
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| /openbmc/linux/arch/sh/kernel/cpu/sh4a/ |
| H A D | clock-sh7723.c | 111 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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| H A D | clock-sh7722.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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| /openbmc/linux/drivers/regulator/ |
| H A D | max8998.c | 131 int *_reg, int *_shift, int *_mask) in max8998_get_voltage_register()
490 #define MAX8998_CURRENT_REG(_name, _ops, _table, _reg, _mask) \ argument
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| H A D | mc13783-regulator.c | 243 #define MC13783_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages) \ argument
245 #define MC13783_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages) \ argument
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| /openbmc/linux/drivers/clk/ |
| H A D | clk-k210.c | 49 #define K210_GATE(_reg, _bit) \ argument
53 #define K210_DIV(_reg, _shift, _width, _type) \ argument
59 #define K210_MUX(_reg, _bit) \ argument
|