/openbmc/qemu/target/arm/tcg/ |
H A D | gengvec64.c | 303 tcg_gen_movcond_i64(TCG_COND_LTU, tpos, tmp, a, max, tmp); in gen_usqadd_d() 307 tcg_gen_movcond_i64(TCG_COND_LTU, tneg, a, tneg, zero, tmp); in gen_usqadd_d() 310 tcg_gen_movcond_i64(TCG_COND_LT, res, b, zero, tneg, tpos); in gen_usqadd_d()
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H A D | gengvec.c | 1052 tcg_gen_movcond_i64(TCG_COND_LTU, dst, lsh, max, lval, zero); in gen_ushl_i64() 1053 tcg_gen_movcond_i64(TCG_COND_LTU, dst, rsh, max, rval, dst); in gen_ushl_i64() 1171 tcg_gen_movcond_i64(TCG_COND_LEU, lval, lsh, max, lval, zero); in gen_sshl_i64() 1172 tcg_gen_movcond_i64(TCG_COND_LT, dst, lsh, zero, rval, lval); in gen_sshl_i64() 1368 tcg_gen_movcond_i64(TCG_COND_LTU, res, t, a, in gen_uqadd_d() 1449 tcg_gen_movcond_i64(TCG_COND_LT, res, t1, tcg_constant_i64(0), t2, t0); in gen_sqadd_d() 1514 tcg_gen_movcond_i64(TCG_COND_LTU, res, a, b, tcg_constant_i64(0), t); in gen_uqsub_d() 1594 tcg_gen_movcond_i64(TCG_COND_LT, res, t1, tcg_constant_i64(0), t2, t0); in gen_sqsub_d() 1659 tcg_gen_movcond_i64(TCG_COND_LT, d, a, b, d, t); in gen_sabd_i64() 1716 tcg_gen_movcond_i64(TCG_COND_LTU, d, a, b, d, t); in gen_uabd_i64()
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H A D | translate-vfp.c | 359 tcg_gen_movcond_i64(TCG_COND_EQ, dest, zf, zero, frn, frm); in trans_VSEL() 362 tcg_gen_movcond_i64(TCG_COND_LT, dest, vf, zero, frn, frm); in trans_VSEL() 367 tcg_gen_movcond_i64(TCG_COND_GE, dest, tmp, zero, frn, frm); in trans_VSEL() 370 tcg_gen_movcond_i64(TCG_COND_NE, dest, zf, zero, frn, frm); in trans_VSEL() 373 tcg_gen_movcond_i64(TCG_COND_GE, dest, tmp, zero, dest, frm); in trans_VSEL()
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H A D | translate-sve.c | 1769 tcg_gen_movcond_i64(TCG_COND_LTU, reg, reg, val, t2, t0); in do_sat_addsub_64() 1773 tcg_gen_movcond_i64(TCG_COND_LTU, reg, t0, reg, t2, t0); in do_sat_addsub_64() 1787 tcg_gen_movcond_i64(TCG_COND_LT, reg, t0, t2, reg, t1); in do_sat_addsub_64() 1798 tcg_gen_movcond_i64(TCG_COND_LT, reg, t0, t2, t1, reg); in do_sat_addsub_64() 2575 tcg_gen_movcond_i64(TCG_COND_GE, reg_val, cmp, tcg_constant_i64(0), in TRANS_FEAT() 3165 tcg_gen_movcond_i64(TCG_COND_EQ, t0, op1, t1, tmax, t0); in trans_WHILE() 3173 tcg_gen_movcond_i64(cond, t0, op0, op1, t0, t1); in trans_WHILE() 3224 tcg_gen_movcond_i64(TCG_COND_GEU, diff, op0, op1, diff, t1); in trans_WHILE_ptr() 3228 tcg_gen_movcond_i64(TCG_COND_EQ, diff, op0, op1, tmax, diff); in trans_WHILE_ptr() 3235 tcg_gen_movcond_i64(TCG_COND_GEU, diff, op0, op1, tmax, diff); in trans_WHILE_ptr()
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H A D | translate-a64.c | 5904 tcg_gen_movcond_i64(TCG_COND_GE, d, n, m, t1, t2); in gen_sabd_i64() 5914 tcg_gen_movcond_i64(TCG_COND_GEU, d, n, m, t1, t2); in gen_uabd_i64() 6657 tcg_gen_movcond_i64(c.cond, t_true, c.value, tcg_constant_i64(0), in trans_FCSEL() 8125 tcg_gen_movcond_i64(c.cond, tcg_rd, c.value, zero, t_true, t_false); in disas_cond_select()
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/openbmc/qemu/target/alpha/ |
H A D | translate.c | 516 tcg_gen_movcond_i64(TCG_COND_EQ, tmp, in gen_fold_mzero() 538 tcg_gen_movcond_i64(cond, dest_fpr(ctx, rc), in gen_fcmov() 1675 tcg_gen_movcond_i64(TCG_COND_TSTNE, vc, va, tcg_constant_i64(1), in translate_one() 1680 tcg_gen_movcond_i64(TCG_COND_TSTEQ, vc, va, tcg_constant_i64(1), in translate_one() 1689 tcg_gen_movcond_i64(TCG_COND_EQ, vc, va, load_zero(ctx), in translate_one() 1694 tcg_gen_movcond_i64(TCG_COND_NE, vc, va, load_zero(ctx), in translate_one() 1707 tcg_gen_movcond_i64(TCG_COND_LT, vc, va, load_zero(ctx), in translate_one() 1712 tcg_gen_movcond_i64(TCG_COND_GE, vc, va, load_zero(ctx), in translate_one() 1726 tcg_gen_movcond_i64(TCG_COND_LE, vc, va, load_zero(ctx), in translate_one() 1731 tcg_gen_movcond_i64(TCG_COND_GT, vc, va, load_zero(ctx), in translate_one()
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/openbmc/qemu/target/mips/tcg/ |
H A D | tx79_translate.c | 258 tcg_gen_movcond_i64(cond, t2, t1, t0, c1, c0); in trans_parallel_compare() 267 tcg_gen_movcond_i64(cond, t2, t1, t0, c1, c0); in trans_parallel_compare()
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H A D | translate.c | 9249 tcg_gen_movcond_i64(TCG_COND_NE, fp0, fp0, t1, fp1, fp2); in gen_sel_d() 9253 tcg_gen_movcond_i64(TCG_COND_EQ, fp0, fp1, t1, fp2, t1); in gen_sel_d() 9257 tcg_gen_movcond_i64(TCG_COND_NE, fp0, fp1, t1, fp2, t1); in gen_sel_d()
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/openbmc/qemu/target/ppc/translate/ |
H A D | vmx-impl.c.inc | 898 tcg_gen_movcond_i64(TCG_COND_NE, lo, t0, zero, hi, lo); 905 tcg_gen_movcond_i64(TCG_COND_NE, hi, t0, zero, t1, hi); 907 tcg_gen_movcond_i64(TCG_COND_NE, hi, t0, zero, lo, hi); 908 tcg_gen_movcond_i64(TCG_COND_NE, lo, t0, zero, zero, lo); 957 tcg_gen_movcond_i64(TCG_COND_NE, t1, t0, zero, zero, ones); 968 tcg_gen_movcond_i64(TCG_COND_NE, t1, t0, zero, zero, ones); 986 tcg_gen_movcond_i64(TCG_COND_GT, t0, b, e, ones, zero); 1013 tcg_gen_movcond_i64(TCG_COND_NE, ah, t1, zero, al, ah); 1014 tcg_gen_movcond_i64(TCG_COND_NE, al, t1, zero, t0, al); 1298 tcg_gen_movcond_i64(TCG_COND_EQ, t2, t0, t1, t2, tcg_constant_i64(0)); [all …]
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H A D | vsx-impl.c.inc | 1967 tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, zr, zr, t0); 1968 tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0); 1998 tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, zr, zr, t0); 1999 tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0); 2165 tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, zr, zr, t0); 2166 tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0); 2172 tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, zr, zr, t0); 2173 tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0);
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/openbmc/qemu/target/hexagon/ |
H A D | genptr.c | 390 tcg_gen_movcond_i64(TCG_COND_EQ, tmp, tmp, hex_llsc_val_i64, in gen_store_conditional8() 1309 tcg_gen_movcond_i64(TCG_COND_NE, bits, word, zero, ones, zero); in vec_to_qvec() 1403 tcg_gen_movcond_i64(TCG_COND_GTU, tmp, source, max_val, max_val, source); in gen_satu_i64() 1404 tcg_gen_movcond_i64(TCG_COND_LT, tmp, source, zero, zero, tmp); in gen_satu_i64() 1456 tcg_gen_movcond_i64(TCG_COND_NE, ret, cond3, zero, max_pos, max_neg); in gen_add_sat_i64()
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/openbmc/qemu/tcg/ |
H A D | tcg-op-ldst.c | 969 tcg_gen_movcond_i64(TCG_COND_EQ, t2, t1, t2, newv, t1); in tcg_gen_nonatomic_cmpxchg_i64_int() 1089 tcg_gen_movcond_i64(TCG_COND_EQ, TCGV128_LOW(tmpv), t0, z, in tcg_gen_nonatomic_cmpxchg_i128_int() 1091 tcg_gen_movcond_i64(TCG_COND_EQ, TCGV128_HIGH(tmpv), t0, z, in tcg_gen_nonatomic_cmpxchg_i128_int()
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H A D | tcg-op.c | 2493 tcg_gen_movcond_i64(TCG_COND_EQ, ret, arg1, z, arg2, t); in tcg_gen_ctz_i64() 2988 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1, in tcg_gen_movcond_i64() function 3124 tcg_gen_movcond_i64(TCG_COND_LT, ret, a, b, a, b); in tcg_gen_smin_i64() 3129 tcg_gen_movcond_i64(TCG_COND_LTU, ret, a, b, a, b); in tcg_gen_umin_i64() 3134 tcg_gen_movcond_i64(TCG_COND_LT, ret, a, b, b, a); in tcg_gen_smax_i64() 3139 tcg_gen_movcond_i64(TCG_COND_LTU, ret, a, b, b, a); in tcg_gen_umax_i64()
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H A D | tcg-op-gvec.c | 2275 tcg_gen_movcond_i64(TCG_COND_LTU, d, d, a, max, d); in tcg_gen_usadd_i64() 2317 tcg_gen_movcond_i64(TCG_COND_LTU, d, a, b, min, d); in tcg_gen_ussub_i64()
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/openbmc/qemu/include/tcg/ |
H A D | tcg-op.h | 252 #define tcg_gen_movcond_tl tcg_gen_movcond_i64
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H A D | tcg-op-common.h | 235 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
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/openbmc/qemu/target/riscv/ |
H A D | translate.c | 203 tcg_gen_movcond_i64(TCG_COND_GEU, out, in, t_max, in, t_nan); in gen_check_nanbox_h() 211 tcg_gen_movcond_i64(TCG_COND_GEU, out, in, t_max, in, t_nan); in gen_check_nanbox_s()
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/openbmc/qemu/target/hppa/ |
H A D | translate.c | 414 tcg_gen_movcond_i64(ctx->null_cond.c, dest, ctx->null_cond.a0, in save_or_nullify() 879 tcg_gen_movcond_i64(sign_cond, tmp, in do_cond() 889 tcg_gen_movcond_i64(TCG_COND_EQ, tmp, uv, ctx->zero, ctx->zero, res); in do_cond() 1121 tcg_gen_movcond_i64(TCG_COND_NE, sv, tmp, ctx->zero, in do_add_sv()
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/openbmc/qemu/target/ppc/ |
H A D | translate.c | 1807 tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); in gen_op_arith_divd() 1812 tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); in gen_op_arith_divd() 1876 tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); in gen_op_arith_modd() 1881 tcg_gen_movcond_i64(TCG_COND_EQ, t1, t1, t3, t2, t1); in gen_op_arith_modd()
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/openbmc/qemu/target/sparc/ |
H A D | translate.c | 2404 tcg_gen_movcond_i64(cmp->cond, dst, cmp->c1, tcg_constant_tl(cmp->c2), in gen_fmovd() 2420 tcg_gen_movcond_i64(cmp->cond, h, cmp->c1, c2, in gen_fmovq() 2423 tcg_gen_movcond_i64(cmp->cond, l, cmp->c1, c2, in gen_fmovq()
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/openbmc/qemu/target/s390x/tcg/ |
H A D | translate.c | 2842 tcg_gen_movcond_i64(c.cond, o->out, c.u.s64.a, c.u.s64.b, in op_loc() 2854 tcg_gen_movcond_i64(TCG_COND_NE, o->out, t, z, o->in2, o->in1); in op_loc() 3420 tcg_gen_movcond_i64(TCG_COND_GE, o->out, o->in2, z, n, o->in2); in op_nabs()
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/openbmc/qemu/target/xtensa/ |
H A D | translate.c | 6496 tcg_gen_movcond_i64(par[0], arg[0].out, in translate_movcond_d() 6524 tcg_gen_movcond_i64(par[0], in translate_movp_d()
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/openbmc/qemu/target/m68k/ |
H A D | translate.c | 3446 tcg_gen_movcond_i64(TCG_COND_GT, s64, s64, tt, tt, s64); in shift_reg()
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/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvv.c.inc | 3232 tcg_gen_movcond_i64(TCG_COND_LTU, dest, t_idx,
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