Revision tags: v8.0.0 |
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8cab4157 |
| 01-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/mips: Tidy helpers for translation
Move most includes from *translate*.c to translate.h, ensuring that we get the ordering correct. Ensure cpu.h is first. Use disas/disas.h instead of exec/l
target/mips: Tidy helpers for translation
Move most includes from *translate*.c to translate.h, ensuring that we get the ordering correct. Ensure cpu.h is first. Use disas/disas.h instead of exec/log.h. Drop otherwise unused includes.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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c29e79af |
| 25-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/mips: Avoid tcg_const_* throughout
All remaining uses are strictly read-only.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@lina
target/mips: Avoid tcg_const_* throughout
All remaining uses are strictly read-only.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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e9f27b36 |
| 24-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/mips: Drop tcg_temp_free from tx79_translate.c
Translators are no longer required to free tcg temporaries.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Hend
target/mips: Drop tcg_temp_free from tx79_translate.c
Translators are no longer required to free tcg temporaries.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v7.2.0, v7.0.0 |
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fc313c64 |
| 06-Jan-2022 |
Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr> |
exec/memop: Adding signedness to quad definitions
Renaming defines for quad in their various forms so that their signedness is now explicit. Done using git grep as suggested by Philippe, with a bit
exec/memop: Adding signedness to quad definitions
Renaming defines for quad in their various forms so that their signedness is now explicit. Done using git grep as suggested by Philippe, with a bit of hand edition to keep assignments aligned.
Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220106210108.138226-2-frederic.petrot@univ-grenoble-alpes.fr Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Revision tags: v6.2.0, v6.1.0 |
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34fe9fa3 |
| 27-Jul-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips: Rename 'rtype' as 'r'
We'll soon have more opcode and decoded arguments, and 'rtype' is not very helpful. Naming it simply 'r' ease reviewing the .decode files when we have many opcodes
target/mips: Rename 'rtype' as 'r'
We'll soon have more opcode and decoded arguments, and 'rtype' is not very helpful. Naming it simply 'r' ease reviewing the .decode files when we have many opcodes.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210801234202.3167676-5-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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1f966c7c |
| 14-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2021-07-13-tag' into staging qemu-ga patch queue for soft-freeze * add support for Windows Server 2022 in get-osinfo comma
Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2021-07-13-tag' into staging qemu-ga patch queue for soft-freeze * add support for Windows Server 2022 in get-osinfo command # gpg: Signature made Tue 13 Jul 2021 19:10:05 BST # gpg: using RSA key CEACC9E15534EBABB82D3FA03353C9CEF108B584 # gpg: Good signature from "Michael Roth <flukshun@gmail.com>" [full] # gpg: aka "Michael Roth <mdroth@utexas.edu>" [full] # gpg: aka "Michael Roth <mdroth@linux.vnet.ibm.com>" [full] # Primary key fingerprint: CEAC C9E1 5534 EBAB B82D 3FA0 3353 C9CE F108 B584 * remotes/mdroth/tags/qga-pull-2021-07-13-tag: qga-win: Add support of Windows Server 2022 in get-osinfo command Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2a54fc45 |
| 13-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging Linux-user pull request 20210713 Update headers to linux v5.13 cleanup errno tar
Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging Linux-user pull request 20210713 Update headers to linux v5.13 cleanup errno target headers Fix race condition on fd translation table # gpg: Signature made Tue 13 Jul 2021 14:41:25 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-6.1-pull-request: linux-user: update syscall.tbl to Linux v5.13 linux-user, mips: update syscall-args-o32.c.inc to Linux v5.13 linux-user: update syscall_nr.h to Linux v5.13 fd-trans: Fix race condition on reallocation of the translation table. linux-user/syscall: Remove ERRNO_TABLE_SIZE check linux-user: Simplify host <-> target errno conversion using macros linux-user/mips: Move errno definitions to 'target_errno_defs.h' linux-user/hppa: Move errno definitions to 'target_errno_defs.h' linux-user/alpha: Move errno definitions to 'target_errno_defs.h' linux-user: Extract target errno to 'target_errno_defs.h' linux-user/sparc: Rename target_errno.h -> target_errno_defs.h linux-user/syscall: Fix RF-kill errno (typo in ERFKILL) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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708f5019 |
| 13-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2021-07-09-v2' into staging nbd patches for 2021-07-09 - enhance 'qemu-img map --output=json' to make it easier to duplicat
Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2021-07-09-v2' into staging nbd patches for 2021-07-09 - enhance 'qemu-img map --output=json' to make it easier to duplicate backing chain allocation patterns - fix a race in the 'yank' QMP command in relation to NBD requests # gpg: Signature made Mon 12 Jul 2021 18:43:37 BST # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full] # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full] # gpg: aka "[jpeg image of size 6874]" [full] # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * remotes/ericb/tags/pull-nbd-2021-07-09-v2: nbd: register yank function earlier qemu-img: Reword 'qemu-img map --output=json' docs qemu-img: Make unallocated part of backing chain obvious in map iotests: Improve and rename test 309 to nbd-qemu-allocation Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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5e05c40c |
| 13-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/tracing-pull-request' into staging Pull request # gpg: Signature made Mon 12 Jul 2021 17:49:46 BST # gpg:
Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/tracing-pull-request' into staging Pull request # gpg: Signature made Mon 12 Jul 2021 17:49:46 BST # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha-gitlab/tags/tracing-pull-request: trace, lttng: require .pc files trace/simple: add st_init_group trace/simple: pass iter to st_write_event_mapping trace: add trace_event_iter_init_group trace: iter init tweaks qemu-trace-stap: changing SYSTEMTAP_TAPSET considered harmful. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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eca73713 |
| 12-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/philmd/tags/sdmmc-20210712' into staging SD/MMC patches queue - sdcard: Check for valid address range in SEND_WRITE_PROT (CMD30) # gpg
Merge remote-tracking branch 'remotes/philmd/tags/sdmmc-20210712' into staging SD/MMC patches queue - sdcard: Check for valid address range in SEND_WRITE_PROT (CMD30) # gpg: Signature made Mon 12 Jul 2021 11:28:13 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/sdmmc-20210712: hw/sd/sdcard: Check for valid address range in SEND_WRITE_PROT (CMD30) hw/sd/sdcard: Extract address_in_range() helper, log invalid accesses hw/sd/sdcard: When card is in wrong state, log which state it is Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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57e28d34 |
| 12-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210708' into staging s390x updates: - add gen16 cpumodels - refactor/cleanup some code - bugfixes # gpg:
Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210708' into staging s390x updates: - add gen16 cpumodels - refactor/cleanup some code - bugfixes # gpg: Signature made Thu 08 Jul 2021 12:26:21 BST # gpg: using EDDSA key 69A3B536F5CBFC65208026C1DE88BB5641DE66C1 # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown] # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full] # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full] # gpg: aka "Cornelia Huck <cohuck@kernel.org>" [unknown] # gpg: aka "Cornelia Huck <cohuck@redhat.com>" [unknown] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF # Subkey fingerprint: 69A3 B536 F5CB FC65 2080 26C1 DE88 BB56 41DE 66C1 * remotes/cohuck-gitlab/tags/s390x-20210708: target/s390x: split sysemu part of cpu models target/s390x: move kvm files into kvm/ target/s390x: remove kvm-stub.c target/s390x: use kvm_enabled() to wrap call to kvm_s390_get_hpage_1m target/s390x: make helper.c sysemu-only target/s390x: split cpu-dump from helper.c target/s390x: move sysemu-only code out to cpu-sysemu.c target/s390x: start moving TCG-only code to tcg/ target/s390x: rename internal.h to s390x-internal.h target/s390x: remove tcg-stub.c hw/s390x: only build tod-tcg from the CONFIG_TCG build hw/s390x: tod: make explicit checks for accelerators when initializing hw/s390x: rename tod-qemu.c to tod-tcg.c target/s390x: meson: add target_user_arch s390x/tcg: Fix m5 vs. m4 field for VECTOR MULTIPLY SUM LOGICAL target/s390x: Fix CC set by CONVERT TO FIXED/LOGICAL s390x/cpumodel: add 3931 and 3932 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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552fda48 |
| 12-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210711' into staging MIPS patches queue - Rename Raven ASIC PCI bridge, add PCI_IO_BASE_ADDR definition - Various Toshib
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210711' into staging MIPS patches queue - Rename Raven ASIC PCI bridge, add PCI_IO_BASE_ADDR definition - Various Toshiba TX79 opcodes implemented - Rewrite UHI errno_mips() using switch statement - Few fixes and improvements in the SONIC model (dp8393x) # gpg: Signature made Sun 11 Jul 2021 22:12:49 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/mips-20210711: dp8393x: don't force 32-bit register access dp8393x: Rewrite dp8393x_get() / dp8393x_put() dp8393x: Store CAM registers as 16-bit dp8393x: Replace 0x40 magic value by SONIC_REG_COUNT definition dp8393x: Replace address_space_rw(is_write=1) by address_space_write() dp8393x: fix CAM descriptor entry index target/mips: Rewrite UHI errno_mips() using switch statement target/mips/tx79: Introduce SQ opcode (Store Quadword) target/mips/tx79: Introduce LQ opcode (Load Quadword) target/mips/tx79: Introduce PROT3W opcode (Parallel Rotate 3 Words) target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word) target/mips/tx79: Introduce PCGT* (Parallel Compare for Greater Than) target/mips/tx79: Introduce PCEQ* opcodes (Parallel Compare for Equal) target/mips/tx79: Introduce PEXTL[BHW] opcodes (Parallel Extend Lower) target/mips/tx79: Introduce PEXTUW (Parallel Extend Upper from Word) target/mips/tx79: Introduce PSUB* opcodes (Parallel Subtract) target/mips/tx79: Introduce PAND/POR/PXOR/PNOR opcodes (parallel logic) hw/pci-host/raven: Add PCI_IO_BASE_ADDR definition hw/pci-host: Rename Raven ASIC PCI bridge as raven.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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80ad6303 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce SQ opcode (Store Quadword) Introduce the SQ opcode (Store Quadword). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Hen
target/mips/tx79: Introduce SQ opcode (Store Quadword) Introduce the SQ opcode (Store Quadword). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-27-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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aaaa82a9 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce LQ opcode (Load Quadword) Introduce the LQ opcode (Load Quadword) and remove unreachable code. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
target/mips/tx79: Introduce LQ opcode (Load Quadword) Introduce the LQ opcode (Load Quadword) and remove unreachable code. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-26-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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dce4808f |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PROT3W opcode (Parallel Rotate 3 Words) Introduce the PROT3W opcode (Parallel Rotate 3 Words). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
target/mips/tx79: Introduce PROT3W opcode (Parallel Rotate 3 Words) Introduce the PROT3W opcode (Parallel Rotate 3 Words). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-25-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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71c49f39 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word) Introduce the PPACW opcode (Parallel Pack to Word). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Revi
target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word) Introduce the PPACW opcode (Parallel Pack to Word). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-22-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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8bd42c00 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PCGT* (Parallel Compare for Greater Than) Introduce the 'Parallel Compare for Greater Than' opcodes: - PCGTB (Parallel Compare for Greater Than Byte)
target/mips/tx79: Introduce PCGT* (Parallel Compare for Greater Than) Introduce the 'Parallel Compare for Greater Than' opcodes: - PCGTB (Parallel Compare for Greater Than Byte) - PCGTH (Parallel Compare for Greater Than Halfword) - PCGTW (Parallel Compare for Greater Than Word) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210309145653.743937-15-f4bug@amsat.org>
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82fbf9fc |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PCEQ* opcodes (Parallel Compare for Equal) Introduce the 'Parallel Compare for Equal' opcodes: - PCEQB (Parallel Compare for Equal Byte) - PCEQH (P
target/mips/tx79: Introduce PCEQ* opcodes (Parallel Compare for Equal) Introduce the 'Parallel Compare for Equal' opcodes: - PCEQB (Parallel Compare for Equal Byte) - PCEQH (Parallel Compare for Equal Halfword) - PCEQW (Parallel Compare for Equal Word) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210309145653.743937-14-f4bug@amsat.org>
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a9ea77f2 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PEXTL[BHW] opcodes (Parallel Extend Lower) Introduce the 'Parallel Extend Lower' opcodes: - PEXTLB (Parallel Extend Upper from Byte) - PEXTLH (Para
target/mips/tx79: Introduce PEXTL[BHW] opcodes (Parallel Extend Lower) Introduce the 'Parallel Extend Lower' opcodes: - PEXTLB (Parallel Extend Upper from Byte) - PEXTLH (Parallel Extend Upper from Halfword) - PEXTLW (Parallel Extend Upper from Word) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210309145653.743937-13-f4bug@amsat.org>
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0bc69372 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PEXTUW (Parallel Extend Upper from Word) Introduce the PEXTUW opcode (Parallel Extend Upper from Word). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsa
target/mips/tx79: Introduce PEXTUW (Parallel Extend Upper from Word) Introduce the PEXTUW opcode (Parallel Extend Upper from Word). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210309145653.743937-12-f4bug@amsat.org>
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709324dc |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PSUB* opcodes (Parallel Subtract) Introduce the 'Parallel Subtract' opcodes: - PSUBB (Parallel Subtract Byte) - PSUBH (Parallel Subtract Halfword)
target/mips/tx79: Introduce PSUB* opcodes (Parallel Subtract) Introduce the 'Parallel Subtract' opcodes: - PSUBB (Parallel Subtract Byte) - PSUBH (Parallel Subtract Halfword) - PSUBW (Parallel Subtract Word) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <820210309145653.743937-11-f4bug@amsat.org>
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2d4ab117 |
| 13-Feb-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/mips/tx79: Introduce PAND/POR/PXOR/PNOR opcodes (parallel logic) Introduce the parallel logic opcodes: - PAND (Parallel AND) - POR (Parallel OR) - PXOR (Parallel
target/mips/tx79: Introduce PAND/POR/PXOR/PNOR opcodes (parallel logic) Introduce the parallel logic opcodes: - PAND (Parallel AND) - POR (Parallel OR) - PXOR (Parallel XOR) - PNOR (Parallel NOR) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-16-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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6c769690 |
| 21-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vsementsov/tags/pull-simplebench-2021-05-04' into staging scripts/simplebench improvements for 2021-05-04 # gpg: Signature made Tue 04 May 2021
Merge remote-tracking branch 'remotes/vsementsov/tags/pull-simplebench-2021-05-04' into staging scripts/simplebench improvements for 2021-05-04 # gpg: Signature made Tue 04 May 2021 09:45:15 BST # gpg: using RSA key 8B9C26CDB2FD147C880E86A1561F24C1F19F79FB # gpg: Good signature from "Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8B9C 26CD B2FD 147C 880E 86A1 561F 24C1 F19F 79FB * remotes/vsementsov/tags/pull-simplebench-2021-05-04: MAINTAINERS: update Benchmark util: add git tree simplebench/bench-backup: add --drop-caches argument simplebench/bench-backup: add --count and --no-initial-run simplebench/bench-backup: support qcow2 source files simplebench/bench_block_job: handle error in BLOCK_JOB_COMPLETED simplebench/bench-backup: add target-cache argument simplebench/bench-backup: add --compressed option simplebench: bench_one(): support count=1 simplebench: bench_one(): add slow_limit argument Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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6005ee07 |
| 16-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,pci,virtio: bugfixes, improvements Fixes all over the place. Faster boot for virtio. ioeventfd support f
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,pci,virtio: bugfixes, improvements Fixes all over the place. Faster boot for virtio. ioeventfd support for mmio. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 14 May 2021 15:27:13 BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: Fix build with 64 bits time_t vhost-vdpa: Make vhost_vdpa_get_device_id() static hw/virtio: enable ioeventfd configuring for mmio hw/smbios: support for type 41 (onboard devices extended information) checkpatch: Fix use of uninitialized value virtio-scsi: Configure all host notifiers in a single MR transaction virtio-scsi: Set host notifiers and callbacks separately virtio-blk: Configure all host notifiers in a single MR transaction virtio-blk: Fix rollback path in virtio_blk_data_plane_start() pc-dimm: remove unnecessary get_vmstate_memory_region() method amd_iommu: fix wrong MMIO operations virtio-net: Constify VirtIOFeature feature_sizes[] virtio-blk: Constify VirtIOFeature feature_sizes[] hw/virtio: Pass virtio_feature_get_config_size() a const argument x86: acpi: use offset instead of pointer when using build_header() amd_iommu: Fix pte_override_page_mask() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/arm/virt.c
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499063d0 |
| 14-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-v1' into staging Add a bus multiplexer device This patch set adds a bus multiplexer and the necessary infrastructure
Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-v1' into staging Add a bus multiplexer device This patch set adds a bus multiplexer and the necessary infrastructure in the I2C code to allow it to work. These are common on systems with lots of I2C devices, like an IPMI BMC. # gpg: Signature made Thu 13 May 2021 22:48:07 BST # gpg: using RSA key FD0D5CE67CE0F59A6688268661F38C90919BFF81 # gpg: Good signature from "Corey Minyard <cminyard@mvista.com>" [unknown] # gpg: aka "Corey Minyard <minyard@acm.org>" [unknown] # gpg: aka "Corey Minyard <corey@minyard.net>" [unknown] # gpg: aka "Corey Minyard <minyard@mvista.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81 * remotes/cminyard/tags/for-qemu-6.1-v1: hw/i2c: add pca954x i2c-mux switch hw/i2c: move search to i2c_scan_bus method hw/i2c: add match method for device search hw/i2c: name I2CNode list in I2CBus Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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