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Searched refs:spi_parents (Results 1 – 23 of 23) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7986-topckgen.c76 static const char *const spi_parents[] __initconst = { variable
179 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x000,
181 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPIM_MST_SEL, "spim_mst_sel", spi_parents,
H A Dclk-mt7981-topckgen.c123 static const char * const spi_parents[] __initconst = { variable
296 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents,
298 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPIM_MST_SEL, "spim_mst_sel", spi_parents,
H A Dclk-mt6795-topckgen.c296 static const char * const spi_parents[] = { variable
467 TOP_MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x60, 16, 3, 23, 0),
H A Dclk-mt2701.c220 static const char * const spi_parents[] = { variable
507 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi_parents,
578 MUX_GATE(CLK_TOP_SPI1_SEL, "spi2_sel", spi_parents,
580 MUX_GATE(CLK_TOP_SPI2_SEL, "spi1_sel", spi_parents,
H A Dclk-mt8186-topckgen.c122 static const char * const spi_parents[] = { variable
532 spi_parents, 0x0060, 0x0064, 0x0068, 24, 3, 31, 0x0004, 11),
H A Dclk-mt8173-topckgen.c132 static const char * const spi_parents[] = { variable
546 MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x0060, 16, 3, 23),
H A Dclk-mt8135.c218 static const char * const spi_parents[] = { variable
374 MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x0150, 16, 3, 23),
H A Dclk-mt8516.c315 static const char * const spi_parents[] __initconst = { variable
423 MUX(CLK_TOP_SPI_SEL, "spi_sel", spi_parents,
H A Dclk-mt8167.c474 static const char * const spi_parents[] = { variable
612 MUX(CLK_TOP_SPI_SEL, "spi_sel", spi_parents,
H A Dclk-mt6797.c161 static const char * const spi_parents[] = { variable
339 MUX_GATE(CLK_TOP_MUX_SPI, "spi_sel", spi_parents, 0x0060, 16, 2, 23),
H A Dclk-mt8188-topckgen.c390 static const char * const spi_parents[] = { variable
1017 spi_parents, 0x068, 0x06C, 0x070, 8, 4, 15, 0x04, 25),
H A Dclk-mt8183.c259 static const char * const spi_parents[] = { variable
494 spi_parents, 0x70, 0x74, 0x78, 24, 2, 31, 0x004, 15),
H A Dclk-mt2712.c224 static const char * const spi_parents[] = { variable
657 MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x060, 16, 3, 23),
H A Dclk-mt8365.c157 static const char * const spi_parents[] = { variable
431 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x060,
H A Dclk-mt8192.c267 static const char * const spi_parents[] = { variable
601 spi_parents, 0x070, 0x074, 0x078, 16, 2, 23, 0x004, 26),
H A Dclk-mt8195-topckgen.c327 static const char * const spi_parents[] = { variable
929 spi_parents, 0x068, 0x06C, 0x070, 24, 3, 31, 0x04, 27),
H A Dclk-mt6779.c359 static const char * const spi_parents[] = { variable
686 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI, "spi_sel", spi_parents,
H A Dclk-mt6765.c226 static const char * const spi_parents[] = { variable
405 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, CLK_CFG_2,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c263 static const int spi_parents[] = { variable
521 MUX_GATE(CLK_TOP_SPI0_SEL, spi_parents, 0x60, 8, 3, 15),
562 MUX_GATE(CLK_TOP_SPI1_SEL, spi_parents, 0xE0, 24, 3, 31),
563 MUX_GATE(CLK_TOP_SPI2_SEL, spi_parents, 0xF0, 0, 3, 7),
/openbmc/linux/drivers/clk/sprd/
H A Dsc9863a-clk.c934 static const struct clk_parent_data spi_parents[] = { variable
940 static SPRD_COMP_CLK_DATA(ap_spi0, "ap-spi0", spi_parents, 0x74,
942 static SPRD_COMP_CLK_DATA(ap_spi1, "ap-spi1", spi_parents, 0x78,
944 static SPRD_COMP_CLK_DATA(ap_spi2, "ap-spi2", spi_parents, 0x7c,
946 static SPRD_COMP_CLK_DATA(ap_spi3, "ap-spi3", spi_parents, 0x80,
H A Dsc9860-clk.c415 static const char * const spi_parents[] = { "ext-26m", "twpll-128m", variable
417 static SPRD_COMP_CLK(spi0_clk, "spi0", spi_parents, 0x5c,
419 static SPRD_COMP_CLK(spi1_clk, "spi1", spi_parents, 0x60,
421 static SPRD_COMP_CLK(spi2_clk, "spi2", spi_parents, 0x64,
423 static SPRD_COMP_CLK(spi3_clk, "spi3", spi_parents, 0x68,
H A Dums512-clk.c508 static const struct clk_parent_data spi_parents[] = { variable
514 static SPRD_COMP_CLK_DATA(ap_spi0_clk, "ap-spi0-clk", spi_parents,
516 static SPRD_COMP_CLK_DATA(ap_spi1_clk, "ap-spi1-clk", spi_parents,
518 static SPRD_COMP_CLK_DATA(ap_spi2_clk, "ap-spi2-clk", spi_parents,
520 static SPRD_COMP_CLK_DATA(ap_spi3_clk, "ap-spi3-clk", spi_parents,
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun20i-d1.c477 static const struct clk_parent_data spi_parents[] = { variable
484 static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(spi0_clk, "spi0", spi_parents, 0x940,
491 static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(spi1_clk, "spi1", spi_parents, 0x944,