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Searched refs:regs_base (Results 1 – 25 of 33) sorted by relevance

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/openbmc/u-boot/drivers/pci/
H A Dpcie_dw_mvebu.c119 static int pcie_dw_get_link_speed(const void *regs_base) in pcie_dw_get_link_speed() argument
121 return (readl(regs_base + PCIE_LINK_STATUS_REG) & in pcie_dw_get_link_speed()
125 static int pcie_dw_get_link_width(const void *regs_base) in pcie_dw_get_link_width() argument
127 return (readl(regs_base + PCIE_LINK_STATUS_REG) & in pcie_dw_get_link_width()
327 static void pcie_dw_configure(const void *regs_base, u32 cap_speed) in pcie_dw_configure() argument
336 clrsetbits_le32(regs_base + PCIE_LINK_CTL_2, in pcie_dw_configure()
338 clrsetbits_le32(regs_base + PCIE_LINK_CAPABILITY, in pcie_dw_configure()
340 setbits_le32(regs_base + PCIE_GEN3_EQU_CTRL, GEN3_EQU_EVAL_2MS_DISABLE); in pcie_dw_configure()
350 static int is_link_up(const void *regs_base) in is_link_up() argument
355 reg = readl(regs_base + PCIE_GLOBAL_STATUS); in is_link_up()
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/openbmc/linux/drivers/phy/samsung/
H A Dphy-exynos5-usbdrd.c749 void __iomem *regs_base = phy_drd->reg_phy; in exynos850_usbdrd_utmi_init() local
757 reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL); in exynos850_usbdrd_utmi_init()
759 writel(reg, regs_base + EXYNOS850_DRD_LINKCTRL); in exynos850_usbdrd_utmi_init()
762 reg = readl(regs_base + EXYNOS850_DRD_CLKRST); in exynos850_usbdrd_utmi_init()
764 writel(reg, regs_base + EXYNOS850_DRD_CLKRST); in exynos850_usbdrd_utmi_init()
767 reg = readl(regs_base + EXYNOS850_DRD_UTMI); in exynos850_usbdrd_utmi_init()
770 writel(reg, regs_base + EXYNOS850_DRD_UTMI); in exynos850_usbdrd_utmi_init()
773 reg = readl(regs_base + EXYNOS850_DRD_HSP); in exynos850_usbdrd_utmi_init()
775 writel(reg, regs_base + EXYNOS850_DRD_HSP); in exynos850_usbdrd_utmi_init()
778 reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL); in exynos850_usbdrd_utmi_init()
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/openbmc/linux/drivers/video/fbdev/
H A Dtgafb.c637 void __iomem *regs_base; local
662 regs_base = par->tga_regs_base;
681 __raw_writel(fgcolor, regs_base + TGA_FOREGROUND_REG);
682 __raw_writel(bgcolor, regs_base + TGA_BACKGROUND_REG);
703 regs_base + TGA_MODE_REG);
714 __raw_writel(pixelmask, regs_base + TGA_PIXELMASK_REG);
733 __raw_writel(0xffffffff, regs_base + TGA_PIXELMASK_REG);
765 __raw_writel(pixelmask, regs_base + TGA_PIXELMASK_REG);
781 __raw_writel(0xffffffff, regs_base + TGA_PIXELMASK_REG);
795 __raw_writel(pixelmask, regs_base + TGA_PIXELMASK_REG);
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/openbmc/linux/drivers/spi/
H A Dspi-xilinx.c165 void __iomem *regs_base = xspi->regs; in xspi_init_hw() local
169 regs_base + XIPIF_V123B_RESETR_OFFSET); in xspi_init_hw()
174 regs_base + XIPIF_V123B_IIER_OFFSET); in xspi_init_hw()
176 xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET); in xspi_init_hw()
178 xspi->write_fn(0xffff, regs_base + XSPI_SSR_OFFSET); in xspi_init_hw()
183 regs_base + XSPI_CR_OFFSET); in xspi_init_hw()
510 void __iomem *regs_base = xspi->regs; in xilinx_spi_remove() local
515 xspi->write_fn(0, regs_base + XIPIF_V123B_IIER_OFFSET); in xilinx_spi_remove()
517 xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET); in xilinx_spi_remove()
/openbmc/linux/drivers/net/ethernet/ezchip/
H A Dnps_enet.h161 void __iomem *regs_base; member
178 iowrite32be(value, priv->regs_base + reg); in nps_enet_reg_set()
190 return ioread32be(priv->regs_base + reg); in nps_enet_reg_get()
H A Dnps_enet.c44 ioread32_rep(priv->regs_base + NPS_ENET_REG_RX_BUF, reg, len); in nps_enet_read_rx_fifo()
57 ioread32_rep(priv->regs_base + NPS_ENET_REG_RX_BUF, &buf, 1); in nps_enet_read_rx_fifo()
388 iowrite32_rep(priv->regs_base + NPS_ENET_REG_TX_BUF, src, len); in nps_enet_send_frame()
595 priv->regs_base = devm_platform_ioremap_resource(pdev, 0); in nps_enet_probe()
596 if (IS_ERR(priv->regs_base)) { in nps_enet_probe()
597 err = PTR_ERR(priv->regs_base); in nps_enet_probe()
600 dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base); in nps_enet_probe()
/openbmc/linux/drivers/net/wireless/quantenna/qtnfmac/
H A Dqtn_hw_ids.h28 static inline unsigned int qtnf_chip_id_get(const void __iomem *regs_base) in qtnf_chip_id_get() argument
30 u32 board_rev = readl(regs_base + QTN_REG_SYS_CTRL_CSR); in qtnf_chip_id_get()
/openbmc/linux/drivers/clk/st/
H A Dclkgen.h44 #define CLKGEN_READ(pll, field) clkgen_read(pll->regs_base, \
47 #define CLKGEN_WRITE(pll, field, val) clkgen_write(pll->regs_base, \
H A Dclkgen-fsyn.c244 void __iomem *regs_base; member
469 pll->regs_base = reg; in st_clk_register_quadfs_pll()
508 void __iomem *regs_base; member
907 fs->regs_base = reg; in st_clk_register_quadfs_fsynth()
H A Dclkgen-pll.c208 void __iomem *regs_base; member
246 void __iomem *base = pll->regs_base; in __clkgen_pll_enable()
665 pll->regs_base = reg; in clkgen_pll_register()
/openbmc/linux/drivers/dma/bestcomm/
H A Dbestcomm.c421 bcom_eng->regs_base = res_bcom.start; in mpc52xx_bcom_probe()
437 (long)bcom_eng->regs_base); in mpc52xx_bcom_probe()
468 release_mem_region(bcom_eng->regs_base, sizeof(struct mpc52xx_sdma)); in mpc52xx_bcom_remove()
H A Dfec.c123 var->enable = bcom_eng->regs_base + in bcom_fec_rx_reset()
224 var->enable = bcom_eng->regs_base + in bcom_fec_tx_reset()
H A Dgen_bd.c130 var->enable = bcom_eng->regs_base + in bcom_gen_bd_rx_reset()
214 var->enable = bcom_eng->regs_base + in bcom_gen_bd_tx_reset()
H A Data.c79 var->enable = bcom_eng->regs_base + in bcom_ata_init()
/openbmc/linux/arch/arm/include/asm/
H A Dkexec.h51 : [regs_base] "r" (&newregs->ARM_r0) in crash_setup_regs()
/openbmc/linux/drivers/media/platform/amphion/
H A Dvpu_windsor.h14 u32 regs_base, void __iomem *regs, u32 core_id);
H A Dvpu_rpc.h57 u32 regs_base, void __iomem *regs, u32 index);
226 static inline int vpu_iface_config_system(struct vpu_core *core, u32 regs_base, void __iomem *regs) in vpu_iface_config_system() argument
233 ops->set_system_cfg(core->iface, regs_base, regs, core->id); in vpu_iface_config_system()
H A Dvpu_malone.h15 u32 regs_base, void __iomem *regs, u32 core_id);
/openbmc/linux/drivers/media/platform/samsung/s5p-mfc/
H A Ds5p_mfc_common.h101 #define mfc_read(dev, offset) readl(dev->regs_base + (offset))
102 #define mfc_write(dev, data, offset) writel((data), dev->regs_base + \
308 void __iomem *regs_base; member
/openbmc/qemu/hw/pci-host/
H A Dmv64361.c143 uint32_t regs_base; member
348 (s->regs_base & 0xfffff) << 16, mr); in set_mem_windows()
496 ret = s->regs_base; in mv64361_read()
758 s->regs_base = val & 0xfffffULL; in mv64361_write()
896 s->regs_base = 0x100f100; in mv64361_reset()
/openbmc/linux/drivers/media/i2c/ccs/
H A Dccs-data.c218 struct ccs_reg *regs_base = NULL, *regs = NULL; in ccs_data_parse_regs() local
223 regs = regs_base = bin_alloc(bin, sizeof(*regs) * *__num_regs); in ccs_data_parse_regs()
313 if (!regs_base) in ccs_data_parse_regs()
316 *__regs = regs_base; in ccs_data_parse_regs()
/openbmc/linux/drivers/media/platform/rockchip/rkisp1/
H A Drkisp1-resizer.c111 return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset); in rkisp1_rsz_read()
117 rkisp1_write(rsz->rkisp1, rsz->regs_base + offset, value); in rkisp1_rsz_write()
757 rsz->regs_base = RKISP1_CIF_SRSZ_BASE; in rkisp1_rsz_register()
760 rsz->regs_base = RKISP1_CIF_MRSZ_BASE; in rkisp1_rsz_register()
/openbmc/linux/drivers/crypto/
H A Dsahara.c193 void __iomem *regs_base; member
232 writel(data, dev->regs_base + reg); in sahara_write()
237 return readl(dev->regs_base + reg); in sahara_read()
1343 dev->regs_base = devm_platform_ioremap_resource(pdev, 0); in sahara_probe()
1344 if (IS_ERR(dev->regs_base)) in sahara_probe()
1345 return PTR_ERR(dev->regs_base); in sahara_probe()
/openbmc/linux/sound/soc/samsung/
H A Di2s.c1401 u32 regs_base, idma_addr = 0; in samsung_i2s_probe() local
1470 regs_base = res->start; in samsung_i2s_probe()
1483 pri_dai->dma_playback.addr = regs_base + I2STXD; in samsung_i2s_probe()
1484 pri_dai->dma_capture.addr = regs_base + I2SRXD; in samsung_i2s_probe()
1502 sec_dai->dma_playback.addr = regs_base + I2STXDS; in samsung_i2s_probe()
/openbmc/linux/include/linux/fsl/bestcomm/
H A Dbestcomm_priv.h71 phys_addr_t regs_base; member

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