1*d8297779SMing Qian /* SPDX-License-Identifier: GPL-2.0 */ 2*d8297779SMing Qian /* 3*d8297779SMing Qian * Copyright 2020-2021 NXP 4*d8297779SMing Qian */ 5*d8297779SMing Qian 6*d8297779SMing Qian #ifndef _AMPHION_VPU_WINDSOR_H 7*d8297779SMing Qian #define _AMPHION_VPU_WINDSOR_H 8*d8297779SMing Qian 9*d8297779SMing Qian u32 vpu_windsor_get_data_size(void); 10*d8297779SMing Qian void vpu_windsor_init_rpc(struct vpu_shared_addr *shared, 11*d8297779SMing Qian struct vpu_buffer *rpc, dma_addr_t boot_addr); 12*d8297779SMing Qian void vpu_windsor_set_log_buf(struct vpu_shared_addr *shared, struct vpu_buffer *log); 13*d8297779SMing Qian void vpu_windsor_set_system_cfg(struct vpu_shared_addr *shared, 14*d8297779SMing Qian u32 regs_base, void __iomem *regs, u32 core_id); 15*d8297779SMing Qian int vpu_windsor_get_stream_buffer_size(struct vpu_shared_addr *shared); 16*d8297779SMing Qian int vpu_windsor_pack_cmd(struct vpu_rpc_event *pkt, u32 index, u32 id, void *data); 17*d8297779SMing Qian int vpu_windsor_convert_msg_id(u32 msg_id); 18*d8297779SMing Qian int vpu_windsor_unpack_msg_data(struct vpu_rpc_event *pkt, void *data); 19*d8297779SMing Qian int vpu_windsor_config_memory_resource(struct vpu_shared_addr *shared, 20*d8297779SMing Qian u32 instance, u32 type, u32 index, 21*d8297779SMing Qian struct vpu_buffer *buf); 22*d8297779SMing Qian int vpu_windsor_config_stream_buffer(struct vpu_shared_addr *shared, 23*d8297779SMing Qian u32 instance, struct vpu_buffer *buf); 24*d8297779SMing Qian int vpu_windsor_update_stream_buffer(struct vpu_shared_addr *shared, 25*d8297779SMing Qian u32 instance, u32 ptr, bool write); 26*d8297779SMing Qian int vpu_windsor_get_stream_buffer_desc(struct vpu_shared_addr *shared, 27*d8297779SMing Qian u32 instance, struct vpu_rpc_buffer_desc *desc); 28*d8297779SMing Qian u32 vpu_windsor_get_version(struct vpu_shared_addr *shared); 29*d8297779SMing Qian int vpu_windsor_set_encode_params(struct vpu_shared_addr *shared, 30*d8297779SMing Qian u32 instance, 31*d8297779SMing Qian struct vpu_encode_params *params, 32*d8297779SMing Qian u32 update); 33*d8297779SMing Qian int vpu_windsor_input_frame(struct vpu_shared_addr *shared, 34*d8297779SMing Qian struct vpu_inst *inst, struct vb2_buffer *vb); 35*d8297779SMing Qian u32 vpu_windsor_get_max_instance_count(struct vpu_shared_addr *shared); 36*d8297779SMing Qian 37*d8297779SMing Qian #endif 38