/openbmc/u-boot/arch/arc/lib/ |
H A D | cache.c | 187 mmu4.word = read_aux_reg(ARC_AUX_MMU_BCR); in pae_exists() 200 ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD); in icache_exists() 216 dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD); in dcache_exists() 233 sbcr.word = read_aux_reg(ARC_BCR_SLC); in slc_exists() 254 cbcr.word = read_aux_reg(ARC_BCR_CLUSTER); in ioc_exists() 280 ctrl = read_aux_reg(ARC_AUX_SLC_CTRL); in __slc_entire_op() 295 read_aux_reg(ARC_AUX_SLC_CTRL); in __slc_entire_op() 335 ctrl = read_aux_reg(ARC_AUX_SLC_CTRL); in __slc_rgn_op() 366 read_aux_reg(ARC_AUX_SLC_CTRL); in __slc_rgn_op() 442 ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD); in read_decode_cache_bcr() [all …]
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H A D | cpu.c | 146 bool mmu = !!read_aux_reg(ARC_AUX_MMU_BCR); in arc_hs_version() 189 int arcver = read_aux_reg(ARC_AUX_IDENTITY) & 0xff; in decode_identity() 204 int subsys_type = read_aux_reg(ARC_AUX_SUBSYS_BUILD) & GENMASK(3, 0); in decode_subsystem()
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H A D | interrupts.c | 24 int status = read_aux_reg(ARC_AUX_STATUS32); in disable_interrupts() 35 unsigned int status = read_aux_reg(ARC_AUX_STATUS32); in enable_interrupts()
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/openbmc/linux/arch/arc/mm/ |
H A D | cache.c | 381 unsigned int val = read_aux_reg(ctl); in __before_dc_op() 445 write_aux_reg(r, read_aux_reg(r) | DC_CTRL_DIS); in __dc_disable() 493 read_aux_reg(ARC_REG_IC_CTRL); /* blocks */ in __ic_entire_inv() 570 ctrl = read_aux_reg(ARC_REG_SLC_CTRL); in slc_op_rgn() 602 read_aux_reg(ARC_REG_SLC_CTRL); in slc_op_rgn() 629 ctrl = read_aux_reg(ARC_REG_SLC_CTRL); in slc_op_line() 652 read_aux_reg(ARC_REG_SLC_CTRL); in slc_op_line() 666 ctrl = read_aux_reg(r); in slc_entire_op() 681 read_aux_reg(r); in slc_entire_op() 684 while (read_aux_reg(r) & SLC_CTRL_BUSY); in slc_entire_op() [all …]
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H A D | tlb.c | 54 idx = read_aux_reg(ARC_REG_TLBINDEX); in tlb_entry_lkup() 438 asid_or_sasid = read_aux_reg(ARC_REG_PID) & 0xff; in create_tlb() 578 bcr = read_aux_reg(ARC_REG_MMU_BCR); in arc_mmu_mumbojumbo() 723 pd0[way] = read_aux_reg(ARC_REG_TLBPD0); in do_tlb_overlap_fault()
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/openbmc/linux/include/soc/arc/ |
H A D | aux.h | 11 #define read_aux_reg(r) __builtin_arc_lr(r) macro 18 static inline int read_aux_reg(u32 r) in read_aux_reg() function 37 tmp = read_aux_reg(reg); \
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H A D | mcip.h | 130 return read_aux_reg(ARC_REG_MCIP_READBACK); in __mcip_cmd_read()
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/openbmc/linux/drivers/clocksource/ |
H A D | arc_timer.c | 80 l = read_aux_reg(ARC_REG_MCIP_READBACK); in arc_read_gfrc() 83 h = read_aux_reg(ARC_REG_MCIP_READBACK); in arc_read_gfrc() 140 l = read_aux_reg(AUX_RTC_LOW); in arc_read_rtc() 141 h = read_aux_reg(AUX_RTC_HIGH); in arc_read_rtc() 142 status = read_aux_reg(AUX_RTC_CTRL); in arc_read_rtc() 198 return (u64) read_aux_reg(ARC_REG_TIMER1_CNT); in arc_read_timer1()
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/openbmc/linux/arch/arc/kernel/ |
H A D | intc-compact.c | 47 ienb = read_aux_reg(AUX_IENABLE); in arc_init_IRQ() 68 ienb = read_aux_reg(AUX_IENABLE); in arc_irq_mask() 77 ienb = read_aux_reg(AUX_IENABLE); in arc_irq_unmask()
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H A D | perf_event.c | 272 tmp = read_aux_reg(ARC_REG_PCT_CONTROL); in arc_pmu_read_counter() 274 result = (u64) (read_aux_reg(ARC_REG_PCT_SNAPH)) << 32; in arc_pmu_read_counter() 275 result |= read_aux_reg(ARC_REG_PCT_SNAPL); in arc_pmu_read_counter() 393 tmp = read_aux_reg(ARC_REG_PCT_CONTROL); in arc_pmu_enable() 401 tmp = read_aux_reg(ARC_REG_PCT_CONTROL); in arc_pmu_disable() 469 read_aux_reg(ARC_REG_PCT_INT_CTRL) | BIT(idx)); in arc_pmu_start() 489 read_aux_reg(ARC_REG_PCT_INT_CTRL) & ~BIT(idx)); in arc_pmu_stop() 572 active_ints = read_aux_reg(ARC_REG_PCT_INT_ACT); in arc_pmu_intr() 593 read_aux_reg(ARC_REG_PCT_INT_CTRL) | BIT(idx)); in arc_pmu_intr() 779 cc_name.indiv.word0 = le32_to_cpu(read_aux_reg(ARC_REG_CC_NAME0)); in arc_pmu_device_probe() [all …]
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H A D | fpu.c | 75 save->ctrl = read_aux_reg(ARC_REG_FPU_CTRL); in fpu_save_restore() 76 save->status = read_aux_reg(ARC_REG_FPU_STATUS); in fpu_save_restore()
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H A D | mcip.c | 44 gfrc_halt_mask = read_aux_reg(ARC_REG_MCIP_READBACK); in mcip_update_gfrc_halt_mask() 64 mcip_mask = read_aux_reg(ARC_REG_MCIP_READBACK); in mcip_update_debug_halt_mask() 117 ipi_was_pending = read_aux_reg(ARC_REG_MCIP_READBACK); in mcip_ipi_send() 139 cpu = read_aux_reg(ARC_REG_MCIP_READBACK); /* 1,2,4,8... */ in mcip_ipi_clear()
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H A D | setup.c | 140 base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD); in arcompact_mumbojumbo() 235 ctl = read_aux_reg(ARC_REG_LPB_CTRL); in arcv2_mumbojumbo() 254 base = read_aux_reg(ARC_REG_AUX_ICCM); in arcv2_mumbojumbo() 264 base = read_aux_reg(ARC_REG_AUX_DCCM); in arcv2_mumbojumbo() 322 vec_base = read_aux_reg(AUX_INTR_VEC_BASE); in arc_cpu_mumbojumbo()
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H A D | intc-arcv2.c | 93 tmp = read_aux_reg(ARC_REG_STATUS32); in arc_init_IRQ()
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/openbmc/u-boot/arch/arc/include/asm/ |
H A D | arcregs.h | 109 #define read_aux_reg(reg) __builtin_arc_lr(reg) macro 116 #define CPU_ID_GET() ((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF00) >> 8)
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/openbmc/u-boot/drivers/timer/ |
H A D | arc_timer.c | 36 val = read_aux_reg(ARC_AUX_TIMER0_CNT); in arc_timer_get_count() 39 val = read_aux_reg(ARC_AUX_TIMER1_CNT); in arc_timer_get_count()
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/openbmc/linux/arch/arc/include/asm/ |
H A D | irqflags-arcv2.h | 80 unsigned int irqact = read_aux_reg(AUX_IRQ_ACT); in arch_local_irq_enable()
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/openbmc/u-boot/board/synopsys/axs10x/ |
H A D | axs10x.c | 100 int core_family = read_aux_reg(ARC_AUX_IDENTITY) & 0xff; in smp_kick_all_cpus()
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/openbmc/linux/arch/arc/plat-axs10x/ |
H A D | axs10x.c | 312 unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F; in axs103_early_init()
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