Lines Matching refs:read_aux_reg
372 write_aux_reg(ctl, read_aux_reg(ctl) | DC_CTRL_INV_MODE_FLUSH); in __before_dc_op()
381 unsigned int val = read_aux_reg(ctl); in __before_dc_op()
409 while ((reg = read_aux_reg(ctl)) & DC_CTRL_FLUSH_STATUS) in __after_dc_op()
445 write_aux_reg(r, read_aux_reg(r) | DC_CTRL_DIS); in __dc_disable()
452 write_aux_reg(r, read_aux_reg(r) & ~DC_CTRL_DIS); in __dc_enable()
493 read_aux_reg(ARC_REG_IC_CTRL); /* blocks */ in __ic_entire_inv()
570 ctrl = read_aux_reg(ARC_REG_SLC_CTRL); in slc_op_rgn()
602 read_aux_reg(ARC_REG_SLC_CTRL); in slc_op_rgn()
604 while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY); in slc_op_rgn()
629 ctrl = read_aux_reg(ARC_REG_SLC_CTRL); in slc_op_line()
652 read_aux_reg(ARC_REG_SLC_CTRL); in slc_op_line()
654 while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY); in slc_op_line()
666 ctrl = read_aux_reg(r); in slc_entire_op()
681 read_aux_reg(r); in slc_entire_op()
684 while (read_aux_reg(r) & SLC_CTRL_BUSY); in slc_entire_op()
692 write_aux_reg(r, read_aux_reg(r) | SLC_CTRL_DIS); in arc_slc_disable()
699 write_aux_reg(r, read_aux_reg(r) & ~SLC_CTRL_DIS); in arc_slc_enable()
1060 if (read_aux_reg(ARC_REG_IO_COH_ENABLE) & ARC_IO_COH_ENABLE_BIT) in arc_ioc_setup()
1070 if (read_aux_reg(ARC_REG_SLC_BCR)) in arc_ioc_setup()