Merge branch 'master' of git://git.denx.de/u-boot-samsung

Merge branch 'master' of git://git.denx.de/u-boot-sunxi

Merge branch 'master' of git://git.denx.de/u-boot-sh

Merge branch 'master' of git://git.denx.de/u-boot-mips

Merge tag 'xilinx-for-v2018.07-2' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.07 second pull

zynqmp:
- Show reset reason
- Remove emulation platform

Merge tag 'xilinx-for-v2018.07-2' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.07 second pull

zynqmp:
- Show reset reason
- Remove emulation platform
- Update pmufw version
- Simplify mmc bootmode
- Remove dc2 useless configuration file
- Cleanup mini config
- Defconfig syncup
- zcu100, zcu104 and zcu111 dts fixes

xilinx:
- Use live-tree functions in some drivers
- Add support for Avnet Minized and Antminer S9

fpga:
- Add secure bitstream loading support

mmc:
- Add hs200 mode support

usb xhci:
- Header fix

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Merge branch 'master' of git://git.denx.de/u-boot-usb

Merge tag 'arc-updates-for-2018.07-rc1' of git://git.denx.de/u-boot-arc

Here we do a couple of minor fixes like:
- Move .ivt section to the very beginning of the image
by default

Merge tag 'arc-updates-for-2018.07-rc1' of git://git.denx.de/u-boot-arc

Here we do a couple of minor fixes like:
- Move .ivt section to the very beginning of the image
by default which allows us to use that image put right
at reset vector (usually 0x0)

- Improve relocation fix-up which became required once
we moved .ivt and understood a problem with existing implementation
where we relied on a particular placement of sections.
Now we don't care about placement because we just explicitly
check for .text and in case of ARCompact .ivt sections

- Re-implemnt do_reset() such that it calls reset_cpu() which
could implmented for a particular board

And hte most important part we introduce support for yet another
devboard from Synopsys - EMDK.

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ARC: Cache: Don't compare I$ and D$ line lengths

We don't care much about I$ line length really as there're
no per-line ops on I$ instead we only do full invalidation of it
on occasi

ARC: Cache: Don't compare I$ and D$ line lengths

We don't care much about I$ line length really as there're
no per-line ops on I$ instead we only do full invalidation of it
on occasion of relocation and right before jumping to the OS.

Also as compared to Linux kernel where we don't support different
lengths of I$ and D$ lines in U-Boot we have to deal with such an
exotic configs if the target board is not supposed to run Linux kernel.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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Merge git://git.denx.de/u-boot-sunxi

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borro

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Merge git://git.denx.de/u-boot-imx

Signed-off-by: Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-sunxi

Signed-off-by: Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-spi

Merge git://git.denx.de/u-boot-i2c

Merge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.05

- Fix mkimage recognition
- Update all my fragments

ZynqMP:
- Use

Merge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.05

- Fix mkimage recognition
- Update all my fragments

ZynqMP:
- Use clk driver
- Support loading elfs in el1
- Various DTS and defconfig changes
- Enable newer pmufw versions
- Support more clocks
- Remove ep108
- Secure image support
- Fix memtest setup

Zynq:
- Enabling watchdog driver
- Support more clocks
- defconfig changes

fpga:
- Simplify error path

net:
- GMII case update

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Merge git://git.denx.de/u-boot-arc

Alexey:
1. Significantly rework cache-related functionality.
In particular that fixes coherency problems in some corner-cases,
allows

Merge git://git.denx.de/u-boot-arc

Alexey:
1. Significantly rework cache-related functionality.
In particular that fixes coherency problems in some corner-cases,
allows us to enable and disable caches in run-time and still
have properly running system, finally support execution from
real flash (before we used to run from DDR from the very beginning).

2. Remove string routines implemented in assembly.
That allows us to build and run U-Boot on wide range of ARC cores
with different configurations. I.e. whatever tuning is used on GCC's
command-line we'll get code for desired flavor of ARC.
Otherwise for each and every corner-case we would need to add ifdefs
in assembly code to accommodate missing instructions etc.

3. Get use of GCC's garbage collector which helps to slim-down resulting image
quite a bit.

4. Also now we may disable U-Boot self-relocation for ARC if needed either
by platform or for debugging purposes.

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ARC: Cache: Refactor arc_ioc_setup()

Move all checks before cache flush and IOC setup.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodki

ARC: Cache: Refactor arc_ioc_setup()

Move all checks before cache flush and IOC setup.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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ARC: Cache: Add missing cache cleanup before cache disable

Add missing cache cleanup before cache disable:
* Flush and invalidate L1 D$ before disabling. Flush and invalidate
SLC

ARC: Cache: Add missing cache cleanup before cache disable

Add missing cache cleanup before cache disable:
* Flush and invalidate L1 D$ before disabling. Flush and invalidate
SLC before L1 D$ disabling (as it will be bypassed for data)
Otherwise we can lose some data when we disable L1 D$ if this data
isn't flushed to next level cache. Or we can get wrong data if L1 D$
has some entries after enable which we modified when the L1 D$ was
disabled.
* Invalidate L1 I$ before disabling. Otherwise we can execute wrong
instructions after L1 I$ enable if we modified any code when
L1 I$ was disabled.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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ARC: Cache: Add more HW configuration checks

Add additional cache configuration checks and note about
supported configurations.

It is unlikely to face some configuration in real

ARC: Cache: Add more HW configuration checks

Add additional cache configuration checks and note about
supported configurations.

It is unlikely to face some configuration in real life but
it's better to be prepared and refuse to work on those.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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ARC: Implement a function to sync and cleanup caches

Implement specialized function to clenup caches (and therefore
sync instruction and data caches) which can be used for cleanup before

ARC: Implement a function to sync and cleanup caches

Implement specialized function to clenup caches (and therefore
sync instruction and data caches) which can be used for cleanup before linux
launch or to sync caches during U-Boot self-relocation.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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ARC: Cache: Fix SLC operations when SLC is bypassed for data

If L1 D$ is disabled SLC is bypassed for data and all
load/store requests are sent directly to main memory.

If L1 I$

ARC: Cache: Fix SLC operations when SLC is bypassed for data

If L1 D$ is disabled SLC is bypassed for data and all
load/store requests are sent directly to main memory.

If L1 I$ is disabled SLC is NOT bypassed for instructions
and all instruction requests are fetched through SLC.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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ARC: Cache: Implement [i,d]cache_enabled() as separate functions

Implement icache_enabled() and dcache_enabled() as separate functions
which can be used with "inline" attribute. This is

ARC: Cache: Implement [i,d]cache_enabled() as separate functions

Implement icache_enabled() and dcache_enabled() as separate functions
which can be used with "inline" attribute. This is a preparation to
make them always_inline.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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ARC: Move IOC enabling to compile-time options

Use CONFIG_ARC_DBG_IOC_ENABLE Kconfig option instead of
ioc_enable global variable.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltse

ARC: Move IOC enabling to compile-time options

Use CONFIG_ARC_DBG_IOC_ENABLE Kconfig option instead of
ioc_enable global variable.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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ARC: Cache: Move PAE exists check into slc_upper_region_init()

Move check for PAE existence into slc_upper_region_init()
instead of its caller as more appropriate place.

Signed-

ARC: Cache: Move PAE exists check into slc_upper_region_init()

Move check for PAE existence into slc_upper_region_init()
instead of its caller as more appropriate place.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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ARC: Move cache global variables to arch_global_data

There is a problem with current implementation if we start U-Boot
from ROM, as we use global variables before ther initialization,

ARC: Move cache global variables to arch_global_data

There is a problem with current implementation if we start U-Boot
from ROM, as we use global variables before ther initialization,
so these variables get overwritten when we copy .data section
from ROM.

Instead we move these global variables into our "global data"
structure so that we may really start from ROM.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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