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Searched refs:pstate (Results 1 – 25 of 200) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dbase.c42 u8 pstate, u8 domain, u32 input) in nvkm_clk_adjust() argument
49 data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE); in nvkm_clk_adjust()
112 nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate, in nvkm_cstate_find_best() argument
119 if (!pstate || !cstate) in nvkm_cstate_find_best()
136 list_for_each_entry_from_reverse(cstate, &pstate->list, head) { in nvkm_cstate_find_best()
145 nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) in nvkm_cstate_get() argument
149 return list_last_entry(&pstate->list, typeof(*cstate), head); in nvkm_cstate_get()
151 list_for_each_entry(cstate, &pstate->list, head) { in nvkm_cstate_get()
160 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) in nvkm_cstate_prog() argument
169 if (!list_empty(&pstate->list)) { in nvkm_cstate_prog()
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/openbmc/linux/arch/arm64/kernel/
H A Dprocess.c160 u64 pstate = regs->pstate; in print_pstate() local
164 pstate, in print_pstate()
165 pstate & PSR_AA32_N_BIT ? 'N' : 'n', in print_pstate()
166 pstate & PSR_AA32_Z_BIT ? 'Z' : 'z', in print_pstate()
167 pstate & PSR_AA32_C_BIT ? 'C' : 'c', in print_pstate()
168 pstate & PSR_AA32_V_BIT ? 'V' : 'v', in print_pstate()
169 pstate & PSR_AA32_Q_BIT ? 'Q' : 'q', in print_pstate()
170 pstate & PSR_AA32_T_BIT ? "T32" : "A32", in print_pstate()
171 pstate & PSR_AA32_E_BIT ? "BE" : "LE", in print_pstate()
172 pstate & PSR_AA32_A_BIT ? 'A' : 'a', in print_pstate()
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H A Dtraps.c52 static bool __kprobes __check_eq(unsigned long pstate) in __check_eq() argument
54 return (pstate & PSR_Z_BIT) != 0; in __check_eq()
57 static bool __kprobes __check_ne(unsigned long pstate) in __check_ne() argument
59 return (pstate & PSR_Z_BIT) == 0; in __check_ne()
62 static bool __kprobes __check_cs(unsigned long pstate) in __check_cs() argument
64 return (pstate & PSR_C_BIT) != 0; in __check_cs()
67 static bool __kprobes __check_cc(unsigned long pstate) in __check_cc() argument
69 return (pstate & PSR_C_BIT) == 0; in __check_cc()
72 static bool __kprobes __check_mi(unsigned long pstate) in __check_mi() argument
74 return (pstate & PSR_N_BIT) != 0; in __check_mi()
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/openbmc/phosphor-fan-presence/presence/test/
H A Dfallbacktest.cpp10 int pstate = -1; variable
22 pstate = 1; in setPresence()
26 pstate = 0; in setPresence()
70 pstate = -1; in TEST()
78 ASSERT_EQ(pstate, 1); in TEST()
84 ASSERT_EQ(pstate, 0); in TEST()
90 ASSERT_EQ(pstate, 1); in TEST()
101 pstate = -1; in TEST()
111 ASSERT_EQ(pstate, 1); in TEST()
122 ASSERT_EQ(pstate, 0); in TEST()
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/openbmc/linux/tools/power/cpupower/utils/helpers/
H A Damd.c33 } pstate; member
57 static int get_did(union core_pstate pstate) in get_did() argument
66 t = pstate.pstatedef.did; in get_did()
68 t = pstate.val & 0xf; in get_did()
70 t = pstate.pstate.did; in get_did()
75 static int get_cof(union core_pstate pstate) in get_cof() argument
80 did = get_did(pstate); in get_cof()
83 fid = pstate.pstatedef2.fid; in get_cof()
87 fid = pstate.pstatedef.fid; in get_cof()
92 fid = pstate.pstate.fid; in get_cof()
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/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_plane.c576 static void _dpu_plane_color_fill_pipe(struct dpu_plane_state *pstate, in _dpu_plane_color_fill_pipe() argument
606 _dpu_plane_setup_scaler(pipe, fmt, true, &pipe_cfg, pstate->rotation); in _dpu_plane_color_fill_pipe()
620 struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state); in _dpu_plane_color_fill() local
635 _dpu_plane_color_fill_pipe(pstate, &pstate->pipe, &pstate->pipe_cfg.dst_rect, in _dpu_plane_color_fill()
638 if (pstate->r_pipe.sspp) in _dpu_plane_color_fill()
639 _dpu_plane_color_fill_pipe(pstate, &pstate->r_pipe, &pstate->r_pipe_cfg.dst_rect, in _dpu_plane_color_fill()
648 struct dpu_plane_state *pstate = to_dpu_plane_state(new_state); in dpu_plane_prepare_fb() local
659 pstate->aspace = kms->base.aspace; in dpu_plane_prepare_fb()
668 if (pstate->aspace) { in dpu_plane_prepare_fb()
670 pstate->aspace, pstate->needs_dirtyfb); in dpu_plane_prepare_fb()
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H A Ddpu_crtc.c334 struct dpu_plane_state *pstate, struct dpu_format *format) in _dpu_crtc_setup_blend_cfg() argument
340 fg_alpha = pstate->base.alpha >> 8; in _dpu_crtc_setup_blend_cfg()
344 if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE || in _dpu_crtc_setup_blend_cfg()
348 } else if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) { in _dpu_crtc_setup_blend_cfg()
373 lm->ops.setup_blend_config(lm, pstate->stage, in _dpu_crtc_setup_blend_cfg()
453 struct dpu_plane_state *pstate = NULL; in _dpu_crtc_blend_setup_mixer() local
470 pstate = to_dpu_plane_state(state); in _dpu_crtc_blend_setup_mixer()
473 format = to_dpu_format(msm_framebuffer_format(pstate->base.fb)); in _dpu_crtc_blend_setup_mixer()
475 if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable) in _dpu_crtc_blend_setup_mixer()
478 set_bit(pstate->pipe.sspp->idx, fetch_active); in _dpu_crtc_blend_setup_mixer()
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/openbmc/linux/arch/arm64/include/asm/
H A Dptrace.h151 unsigned long pstate; in compat_psr_to_pstate() local
153 pstate = psr & ~COMPAT_PSR_DIT_BIT; in compat_psr_to_pstate()
156 pstate |= PSR_AA32_DIT_BIT; in compat_psr_to_pstate()
158 return pstate; in compat_psr_to_pstate()
161 static inline unsigned long pstate_to_compat_psr(const unsigned long pstate) in pstate_to_compat_psr() argument
165 psr = pstate & ~PSR_AA32_DIT_BIT; in pstate_to_compat_psr()
167 if (pstate & PSR_AA32_DIT_BIT) in pstate_to_compat_psr()
185 u64 pstate; member
216 #define MAX_REG_OFFSET offsetof(struct pt_regs, pstate)
222 (((regs)->pstate & PSR_AA32_T_BIT))
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/openbmc/linux/drivers/cpufreq/
H A Dintel_pstate.c235 struct pstate_data pstate; member
291 u64 (*get_val)(struct cpudata*, int pstate);
531 if (freq == cpu->pstate.turbo_freq) in intel_pstate_freq_to_hwp_rel()
532 return cpu->pstate.turbo_pstate; in intel_pstate_freq_to_hwp_rel()
534 if (freq == cpu->pstate.max_freq) in intel_pstate_freq_to_hwp_rel()
535 return cpu->pstate.max_pstate; in intel_pstate_freq_to_hwp_rel()
539 return freq / cpu->pstate.scaling; in intel_pstate_freq_to_hwp_rel()
541 return DIV_ROUND_CLOSEST(freq, cpu->pstate.scaling); in intel_pstate_freq_to_hwp_rel()
544 return DIV_ROUND_UP(freq, cpu->pstate.scaling); in intel_pstate_freq_to_hwp_rel()
565 int perf_ctl_max_phys = cpu->pstate.max_pstate_physical; in intel_pstate_hybrid_hwp_adjust()
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H A Dapple-soc-cpufreq.c109 unsigned int pstate; in apple_soc_cpufreq_get_rate() local
114 pstate = (reg & priv->info->cur_pstate_mask) >> priv->info->cur_pstate_shift; in apple_soc_cpufreq_get_rate()
122 pstate = FIELD_GET(APPLE_DVFS_CMD_PS1, reg); in apple_soc_cpufreq_get_rate()
126 if (p->driver_data == pstate) in apple_soc_cpufreq_get_rate()
130 pstate); in apple_soc_cpufreq_get_rate()
138 unsigned int pstate = policy->freq_table[index].driver_data; in apple_soc_cpufreq_set_target() local
152 reg |= FIELD_PREP(APPLE_DVFS_CMD_PS1, pstate); in apple_soc_cpufreq_set_target()
153 reg |= FIELD_PREP(APPLE_DVFS_CMD_PS2, pstate); in apple_soc_cpufreq_set_target()
H A Dbrcmstb-avs-cpufreq.c388 static int brcm_avs_get_pstate(struct private_data *priv, unsigned int *pstate) in brcm_avs_get_pstate() argument
396 *pstate = args[0]; in brcm_avs_get_pstate()
401 static int brcm_avs_set_pstate(struct private_data *priv, unsigned int pstate) in brcm_avs_set_pstate() argument
405 args[0] = pstate; in brcm_avs_set_pstate()
429 unsigned int pstate; in brcm_avs_get_freq_table() local
433 ret = brcm_avs_get_pstate(priv, &pstate); in brcm_avs_get_freq_table()
456 ret = brcm_avs_set_pstate(priv, pstate); in brcm_avs_get_freq_table()
646 unsigned int pstate; in brcm_avs_cpufreq_init() local
648 ret = brcm_avs_get_pstate(priv, &pstate); in brcm_avs_cpufreq_init()
650 policy->cur = freq_table[pstate].frequency; in brcm_avs_cpufreq_init()
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/openbmc/linux/drivers/gpu/drm/arm/
H A Dmalidp_crtc.c259 const struct drm_plane_state *pstate; in malidp_crtc_atomic_check_scaling() local
274 drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { in malidp_crtc_atomic_check_scaling()
285 h_upscale_factor = div_u64((u64)pstate->crtc_w << 32, in malidp_crtc_atomic_check_scaling()
286 pstate->src_w); in malidp_crtc_atomic_check_scaling()
287 v_upscale_factor = div_u64((u64)pstate->crtc_h << 32, in malidp_crtc_atomic_check_scaling()
288 pstate->src_h); in malidp_crtc_atomic_check_scaling()
293 if (pstate->rotation & MALIDP_ROTATED_MASK) { in malidp_crtc_atomic_check_scaling()
294 s->input_w = pstate->src_h >> 16; in malidp_crtc_atomic_check_scaling()
295 s->input_h = pstate->src_w >> 16; in malidp_crtc_atomic_check_scaling()
297 s->input_w = pstate->src_w >> 16; in malidp_crtc_atomic_check_scaling()
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/openbmc/linux/samples/bpf/
H A Dcpustat_kern.c106 u64 *cts, *pts, *cstate, *pstate, prev_state, cur_ts, delta; in bpf_prog1() local
131 pstate = bpf_map_lookup_elem(&my_map, &key); in bpf_prog1()
132 if (!pstate) in bpf_prog1()
171 pstate_idx = find_cpu_pstate_idx(*pstate); in bpf_prog1()
214 u64 *pts, *cstate, *pstate, prev_state, cur_ts, delta; in bpf_prog2() local
226 pstate = bpf_map_lookup_elem(&my_map, &key); in bpf_prog2()
227 if (!pstate) in bpf_prog2()
235 prev_state = *pstate; in bpf_prog2()
236 *pstate = ctx->state; in bpf_prog2()
268 pstate_idx = find_cpu_pstate_idx(*pstate); in bpf_prog2()
/openbmc/linux/Documentation/admin-guide/pm/
H A Damd-pstate.rst5 ``amd-pstate`` CPU Performance Scaling Driver
16 ``amd-pstate`` is the AMD CPU performance scaling driver that introduces a
26 ``amd-pstate`` leverages the Linux kernel governors such as ``schedutil``,
30 Volume 2: System Programming [1]_). Currently, ``amd-pstate`` supports basic
45 interpreter for performance adjustments. ``amd-pstate`` will initialize a
117 effectively conveys the most efficient performance level to ``amd-pstate``.
130 ``amd-pstate`` passes performance goals through these registers. The
136 ``amd-pstate`` specifies the minimum allowed performance level.
141 ``amd-pstate`` specifies a limit the maximum performance that is expected
147 ``amd-pstate`` specifies a desired target in the CPPC performance scale as
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dctrl.c55 args->v0.pstate = clk->pstate; in nvkm_control_mthd_pstate_info()
61 args->v0.pstate = NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN; in nvkm_control_mthd_pstate_info()
75 struct nvkm_pstate *pstate; in nvkm_control_mthd_pstate_attr() local
106 list_for_each_entry(pstate, &clk->states, head) { in nvkm_control_mthd_pstate_attr()
111 lo = pstate->base.domain[domain->name]; in nvkm_control_mthd_pstate_attr()
113 list_for_each_entry(cstate, &pstate->list, head) { in nvkm_control_mthd_pstate_attr()
118 args->v0.state = pstate->pstate; in nvkm_control_mthd_pstate_attr()
/openbmc/linux/drivers/regulator/
H A Dpwm-regulator.c86 struct pwm_state pstate; in pwm_regulator_set_voltage_sel() local
89 pwm_init_state(drvdata->pwm, &pstate); in pwm_regulator_set_voltage_sel()
90 pwm_set_relative_duty_cycle(&pstate, in pwm_regulator_set_voltage_sel()
93 ret = pwm_apply_might_sleep(drvdata->pwm, &pstate); in pwm_regulator_set_voltage_sel()
154 struct pwm_state pstate; in pwm_regulator_get_voltage() local
158 pwm_get_state(drvdata->pwm, &pstate); in pwm_regulator_get_voltage()
160 voltage = pwm_get_relative_duty_cycle(&pstate, duty_unit); in pwm_regulator_get_voltage()
194 struct pwm_state pstate; in pwm_regulator_set_voltage() local
199 pwm_init_state(drvdata->pwm, &pstate); in pwm_regulator_set_voltage()
220 pwm_set_relative_duty_cycle(&pstate, dutycycle, duty_unit); in pwm_regulator_set_voltage()
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/openbmc/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_plane.c79 struct mdp5_plane_state *pstate = to_mdp5_plane_state(state); in mdp5_plane_atomic_print_state() local
82 drm_printf(p, "\thwpipe=%s\n", pstate->hwpipe ? in mdp5_plane_atomic_print_state()
83 pstate->hwpipe->name : "(null)"); in mdp5_plane_atomic_print_state()
86 pstate->r_hwpipe ? pstate->r_hwpipe->name : in mdp5_plane_atomic_print_state()
88 drm_printf(p, "\tblend_mode=%u\n", pstate->base.pixel_blend_mode); in mdp5_plane_atomic_print_state()
89 drm_printf(p, "\tzpos=%u\n", pstate->base.zpos); in mdp5_plane_atomic_print_state()
90 drm_printf(p, "\tnormalized_zpos=%u\n", pstate->base.normalized_zpos); in mdp5_plane_atomic_print_state()
91 drm_printf(p, "\talpha=%u\n", pstate->base.alpha); in mdp5_plane_atomic_print_state()
92 drm_printf(p, "\tstage=%s\n", stage2name(pstate->stage)); in mdp5_plane_atomic_print_state()
131 struct mdp5_plane_state *pstate = to_mdp5_plane_state(state); in mdp5_plane_destroy_state() local
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/openbmc/linux/drivers/net/wwan/
H A Dwwan_hwsim.c62 } pstate; member
106 port->pstate = AT_PARSER_WAIT_A; in wwan_hwsim_port_start()
143 if (port->pstate == AT_PARSER_WAIT_A) { in wwan_hwsim_port_tx()
145 port->pstate = AT_PARSER_WAIT_T; in wwan_hwsim_port_tx()
147 port->pstate = AT_PARSER_SKIP_LINE; in wwan_hwsim_port_tx()
148 } else if (port->pstate == AT_PARSER_WAIT_T) { in wwan_hwsim_port_tx()
150 port->pstate = AT_PARSER_WAIT_TERM; in wwan_hwsim_port_tx()
152 port->pstate = AT_PARSER_SKIP_LINE; in wwan_hwsim_port_tx()
153 } else if (port->pstate == AT_PARSER_WAIT_TERM) { in wwan_hwsim_port_tx()
163 port->pstate = AT_PARSER_WAIT_A; in wwan_hwsim_port_tx()
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/openbmc/linux/arch/sparc/kernel/
H A Drtrap_64.S28 661: wrpr %g0, RTRAP_PSTATE, %pstate
36 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
39 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
44 661: wrpr %g0, RTRAP_PSTATE, %pstate
52 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
55 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
70 661: wrpr %g0, RTRAP_PSTATE, %pstate
78 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
80 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
159 to_user: wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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H A Dspiterrs.S159 rdpr %pstate, %g4
160 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
187 rdpr %pstate, %g4
188 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
207 rdpr %pstate, %g4
208 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
226 rdpr %pstate, %g4
227 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
/openbmc/linux/tools/testing/selftests/amd-pstate/
H A Dbasic.sh27 if ! /sbin/modprobe -q -n amd-pstate-ut; then
31 if /sbin/modprobe -q amd-pstate-ut; then
32 /sbin/modprobe -q -r amd-pstate-ut
/openbmc/linux/drivers/gpu/drm/tve200/
H A Dtve200_display.c72 struct drm_plane_state *pstate, in tve200_display_check() argument
77 struct drm_framebuffer *fb = pstate->fb; in tve200_display_check()
93 u32 offset = drm_fb_dma_get_gem_addr(fb, pstate, 0); in tve200_display_check()
265 struct drm_plane_state *pstate = plane->state; in tve200_display_update() local
266 struct drm_framebuffer *fb = pstate->fb; in tve200_display_update()
270 writel(drm_fb_dma_get_gem_addr(fb, pstate, 0), in tve200_display_update()
275 writel(drm_fb_dma_get_gem_addr(fb, pstate, 1), in tve200_display_update()
277 writel(drm_fb_dma_get_gem_addr(fb, pstate, 2), in tve200_display_update()
/openbmc/linux/arch/arm64/kvm/
H A Dreset.c212 u32 pstate; in kvm_reset_vcpu() local
252 pstate = VCPU_RESET_PSTATE_SVC; in kvm_reset_vcpu()
254 pstate = VCPU_RESET_PSTATE_EL2; in kvm_reset_vcpu()
256 pstate = VCPU_RESET_PSTATE_EL1; in kvm_reset_vcpu()
270 vcpu_gp_regs(vcpu)->pstate = pstate; in kvm_reset_vcpu()
/openbmc/qemu/qga/
H A Dmain.c122 GAPersistentState pstate; member
852 static void set_persistent_state_defaults(GAPersistentState *pstate) in set_persistent_state_defaults() argument
854 g_assert(pstate); in set_persistent_state_defaults()
855 pstate->fd_counter = QGA_PSTATE_DEFAULT_FD_COUNTER; in set_persistent_state_defaults()
858 static void persistent_state_from_keyfile(GAPersistentState *pstate, in persistent_state_from_keyfile() argument
861 g_assert(pstate); in persistent_state_from_keyfile()
869 set_persistent_state_defaults(pstate); in persistent_state_from_keyfile()
872 pstate->fd_counter = in persistent_state_from_keyfile()
877 static void persistent_state_to_keyfile(const GAPersistentState *pstate, in persistent_state_to_keyfile() argument
880 g_assert(pstate); in persistent_state_to_keyfile()
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/openbmc/linux/arch/arm64/kvm/hyp/include/hyp/
H A Dsysreg-sr.h83 ctxt->regs.pstate = read_sysreg_el2(SYS_SPSR); in __sysreg_save_el2_return_state()
172 u64 mode = ctxt->regs.pstate & (PSR_MODE_MASK | PSR_MODE32_BIT); in to_hw_pstate()
183 return (ctxt->regs.pstate & ~(PSR_MODE_MASK | PSR_MODE32_BIT)) | mode; in to_hw_pstate()
188 u64 pstate = to_hw_pstate(ctxt); in __sysreg_restore_el2_return_state() local
189 u64 mode = pstate & PSR_AA32_MODE_MASK; in __sysreg_restore_el2_return_state()
203 pstate = PSR_MODE_EL2h | PSR_IL_BIT; in __sysreg_restore_el2_return_state()
206 write_sysreg_el2(pstate, SYS_SPSR); in __sysreg_restore_el2_return_state()

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