1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2f4672752SMarc Zyngier /*
3f4672752SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd
4f4672752SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com>
5f4672752SMarc Zyngier *
6f4672752SMarc Zyngier * Derived from arch/arm/kvm/reset.c
7f4672752SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University
8f4672752SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com>
9f4672752SMarc Zyngier */
10f4672752SMarc Zyngier
11f4672752SMarc Zyngier #include <linux/errno.h>
129a3cdf26SDave Martin #include <linux/kernel.h>
13f4672752SMarc Zyngier #include <linux/kvm_host.h>
14f4672752SMarc Zyngier #include <linux/kvm.h>
15834bf887SAlex Bennée #include <linux/hw_breakpoint.h>
169033bba4SDave Martin #include <linux/slab.h>
179a3cdf26SDave Martin #include <linux/string.h>
189033bba4SDave Martin #include <linux/types.h>
19f4672752SMarc Zyngier
20003300deSMarc Zyngier #include <kvm/arm_arch_timer.h>
21003300deSMarc Zyngier
227665f3a8SSuzuki K Poulose #include <asm/cpufeature.h>
23f4672752SMarc Zyngier #include <asm/cputype.h>
249033bba4SDave Martin #include <asm/fpsimd.h>
25f4672752SMarc Zyngier #include <asm/ptrace.h>
26f4672752SMarc Zyngier #include <asm/kvm_arm.h>
2767f69197SAKASHI Takahiro #include <asm/kvm_asm.h>
28358b28f0SMarc Zyngier #include <asm/kvm_emulate.h>
2967f69197SAKASHI Takahiro #include <asm/kvm_mmu.h>
302fb32357SChristoffer Dall #include <asm/kvm_nested.h>
319a3cdf26SDave Martin #include <asm/virt.h>
32f4672752SMarc Zyngier
330f62f0e9SSuzuki K Poulose /* Maximum phys_shift supported for any VM on this host */
348d20bd63SSean Christopherson static u32 __ro_after_init kvm_ipa_limit;
350f62f0e9SSuzuki K Poulose
36f4672752SMarc Zyngier /*
37f4672752SMarc Zyngier * ARMv8 Reset Values
38f4672752SMarc Zyngier */
39349c330cSMarc Zyngier #define VCPU_RESET_PSTATE_EL1 (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT | \
40349c330cSMarc Zyngier PSR_F_BIT | PSR_D_BIT)
41f4672752SMarc Zyngier
422fb32357SChristoffer Dall #define VCPU_RESET_PSTATE_EL2 (PSR_MODE_EL2h | PSR_A_BIT | PSR_I_BIT | \
432fb32357SChristoffer Dall PSR_F_BIT | PSR_D_BIT)
442fb32357SChristoffer Dall
45349c330cSMarc Zyngier #define VCPU_RESET_PSTATE_SVC (PSR_AA32_MODE_SVC | PSR_AA32_A_BIT | \
46349c330cSMarc Zyngier PSR_AA32_I_BIT | PSR_AA32_F_BIT)
470d854a60SMarc Zyngier
488d20bd63SSean Christopherson unsigned int __ro_after_init kvm_sve_max_vl;
499033bba4SDave Martin
kvm_arm_init_sve(void)508d20bd63SSean Christopherson int __init kvm_arm_init_sve(void)
519033bba4SDave Martin {
529033bba4SDave Martin if (system_supports_sve()) {
53b5bc00ffSMark Brown kvm_sve_max_vl = sve_max_virtualisable_vl();
549033bba4SDave Martin
559033bba4SDave Martin /*
569033bba4SDave Martin * The get_sve_reg()/set_sve_reg() ioctl interface will need
579033bba4SDave Martin * to be extended with multiple register slice support in
589033bba4SDave Martin * order to support vector lengths greater than
5930c43e73SMark Brown * VL_ARCH_MAX:
609033bba4SDave Martin */
6130c43e73SMark Brown if (WARN_ON(kvm_sve_max_vl > VL_ARCH_MAX))
6230c43e73SMark Brown kvm_sve_max_vl = VL_ARCH_MAX;
639033bba4SDave Martin
649033bba4SDave Martin /*
659033bba4SDave Martin * Don't even try to make use of vector lengths that
669033bba4SDave Martin * aren't available on all CPUs, for now:
679033bba4SDave Martin */
68b5bc00ffSMark Brown if (kvm_sve_max_vl < sve_max_vl())
699033bba4SDave Martin pr_warn("KVM: SVE vector length for guests limited to %u bytes\n",
709033bba4SDave Martin kvm_sve_max_vl);
719033bba4SDave Martin }
729033bba4SDave Martin
739033bba4SDave Martin return 0;
749033bba4SDave Martin }
759033bba4SDave Martin
kvm_vcpu_enable_sve(struct kvm_vcpu * vcpu)769a3cdf26SDave Martin static int kvm_vcpu_enable_sve(struct kvm_vcpu *vcpu)
779a3cdf26SDave Martin {
789a3cdf26SDave Martin if (!system_supports_sve())
799a3cdf26SDave Martin return -EINVAL;
809a3cdf26SDave Martin
819a3cdf26SDave Martin vcpu->arch.sve_max_vl = kvm_sve_max_vl;
829a3cdf26SDave Martin
839a3cdf26SDave Martin /*
849a3cdf26SDave Martin * Userspace can still customize the vector lengths by writing
859a3cdf26SDave Martin * KVM_REG_ARM64_SVE_VLS. Allocation is deferred until
869a3cdf26SDave Martin * kvm_arm_vcpu_finalize(), which freezes the configuration.
879a3cdf26SDave Martin */
884c0680d3SMarc Zyngier vcpu_set_flag(vcpu, GUEST_HAS_SVE);
899a3cdf26SDave Martin
909a3cdf26SDave Martin return 0;
919a3cdf26SDave Martin }
929a3cdf26SDave Martin
939033bba4SDave Martin /*
949033bba4SDave Martin * Finalize vcpu's maximum SVE vector length, allocating
959033bba4SDave Martin * vcpu->arch.sve_state as necessary.
969033bba4SDave Martin */
kvm_vcpu_finalize_sve(struct kvm_vcpu * vcpu)979033bba4SDave Martin static int kvm_vcpu_finalize_sve(struct kvm_vcpu *vcpu)
989033bba4SDave Martin {
999033bba4SDave Martin void *buf;
1009033bba4SDave Martin unsigned int vl;
101bff01a61SMarc Zyngier size_t reg_sz;
102bff01a61SMarc Zyngier int ret;
1039033bba4SDave Martin
1049033bba4SDave Martin vl = vcpu->arch.sve_max_vl;
1059033bba4SDave Martin
1069033bba4SDave Martin /*
107656012c7SFuad Tabba * Responsibility for these properties is shared between
108e938eddbSZenghui Yu * kvm_arm_init_sve(), kvm_vcpu_enable_sve() and
1099033bba4SDave Martin * set_sve_vls(). Double-check here just to be sure:
1109033bba4SDave Martin */
111b5bc00ffSMark Brown if (WARN_ON(!sve_vl_valid(vl) || vl > sve_max_virtualisable_vl() ||
11230c43e73SMark Brown vl > VL_ARCH_MAX))
1139033bba4SDave Martin return -EIO;
1149033bba4SDave Martin
115bff01a61SMarc Zyngier reg_sz = vcpu_sve_state_size(vcpu);
116bff01a61SMarc Zyngier buf = kzalloc(reg_sz, GFP_KERNEL_ACCOUNT);
1179033bba4SDave Martin if (!buf)
1189033bba4SDave Martin return -ENOMEM;
1199033bba4SDave Martin
1203f868e14SQuentin Perret ret = kvm_share_hyp(buf, buf + reg_sz);
121bff01a61SMarc Zyngier if (ret) {
122bff01a61SMarc Zyngier kfree(buf);
123bff01a61SMarc Zyngier return ret;
124bff01a61SMarc Zyngier }
125bff01a61SMarc Zyngier
1269033bba4SDave Martin vcpu->arch.sve_state = buf;
1274c0680d3SMarc Zyngier vcpu_set_flag(vcpu, VCPU_SVE_FINALIZED);
1289033bba4SDave Martin return 0;
1299033bba4SDave Martin }
1309033bba4SDave Martin
kvm_arm_vcpu_finalize(struct kvm_vcpu * vcpu,int feature)13192e68b2bSDave Martin int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature)
1329033bba4SDave Martin {
13392e68b2bSDave Martin switch (feature) {
1349033bba4SDave Martin case KVM_ARM_VCPU_SVE:
1359033bba4SDave Martin if (!vcpu_has_sve(vcpu))
1369033bba4SDave Martin return -EINVAL;
1379033bba4SDave Martin
1389033bba4SDave Martin if (kvm_arm_vcpu_sve_finalized(vcpu))
1399033bba4SDave Martin return -EPERM;
1409033bba4SDave Martin
1419033bba4SDave Martin return kvm_vcpu_finalize_sve(vcpu);
1429033bba4SDave Martin }
1439033bba4SDave Martin
1449033bba4SDave Martin return -EINVAL;
1459033bba4SDave Martin }
1469033bba4SDave Martin
kvm_arm_vcpu_is_finalized(struct kvm_vcpu * vcpu)1479033bba4SDave Martin bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu)
1489033bba4SDave Martin {
1499033bba4SDave Martin if (vcpu_has_sve(vcpu) && !kvm_arm_vcpu_sve_finalized(vcpu))
1509033bba4SDave Martin return false;
1519033bba4SDave Martin
1529033bba4SDave Martin return true;
1539033bba4SDave Martin }
1549033bba4SDave Martin
kvm_arm_vcpu_destroy(struct kvm_vcpu * vcpu)15519bcc89eSSean Christopherson void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu)
15619bcc89eSSean Christopherson {
15752b28657SQuentin Perret void *sve_state = vcpu->arch.sve_state;
15852b28657SQuentin Perret
15952b28657SQuentin Perret kvm_vcpu_unshare_task_fp(vcpu);
16052b28657SQuentin Perret kvm_unshare_hyp(vcpu, vcpu + 1);
16152b28657SQuentin Perret if (sve_state)
16252b28657SQuentin Perret kvm_unshare_hyp(sve_state, sve_state + vcpu_sve_state_size(vcpu));
16352b28657SQuentin Perret kfree(sve_state);
1647af0c253SAkihiko Odaki kfree(vcpu->arch.ccsidr);
1659033bba4SDave Martin }
1669033bba4SDave Martin
kvm_vcpu_reset_sve(struct kvm_vcpu * vcpu)1679a3cdf26SDave Martin static void kvm_vcpu_reset_sve(struct kvm_vcpu *vcpu)
1689a3cdf26SDave Martin {
1699a3cdf26SDave Martin if (vcpu_has_sve(vcpu))
1709a3cdf26SDave Martin memset(vcpu->arch.sve_state, 0, vcpu_sve_state_size(vcpu));
1719a3cdf26SDave Martin }
1729a3cdf26SDave Martin
kvm_vcpu_enable_ptrauth(struct kvm_vcpu * vcpu)173a22fa321SAmit Daniel Kachhap static int kvm_vcpu_enable_ptrauth(struct kvm_vcpu *vcpu)
174a22fa321SAmit Daniel Kachhap {
175a22fa321SAmit Daniel Kachhap /*
176a22fa321SAmit Daniel Kachhap * For now make sure that both address/generic pointer authentication
177aff7cce0SMarc Zyngier * features are requested by the userspace together and the system
178aff7cce0SMarc Zyngier * supports these capabilities.
179a22fa321SAmit Daniel Kachhap */
180a22fa321SAmit Daniel Kachhap if (!test_bit(KVM_ARM_VCPU_PTRAUTH_ADDRESS, vcpu->arch.features) ||
181aff7cce0SMarc Zyngier !test_bit(KVM_ARM_VCPU_PTRAUTH_GENERIC, vcpu->arch.features) ||
182aff7cce0SMarc Zyngier !system_has_full_ptr_auth())
183a22fa321SAmit Daniel Kachhap return -EINVAL;
184a22fa321SAmit Daniel Kachhap
1854c0680d3SMarc Zyngier vcpu_set_flag(vcpu, GUEST_HAS_PTRAUTH);
186a22fa321SAmit Daniel Kachhap return 0;
187a22fa321SAmit Daniel Kachhap }
188a22fa321SAmit Daniel Kachhap
18926bf74bdSReiji Watanabe /**
190f4672752SMarc Zyngier * kvm_reset_vcpu - sets core registers and sys_regs to reset value
191f4672752SMarc Zyngier * @vcpu: The VCPU pointer
192f4672752SMarc Zyngier *
193a080e323SFuad Tabba * This function sets the registers on the virtual CPU struct to their
194a080e323SFuad Tabba * architecturally defined reset values, except for registers whose reset is
195a080e323SFuad Tabba * deferred until kvm_arm_vcpu_finalize().
196e761a927SChristoffer Dall *
197e761a927SChristoffer Dall * Note: This function can be called from two paths: The KVM_ARM_VCPU_INIT
198e761a927SChristoffer Dall * ioctl or as part of handling a request issued by another VCPU in the PSCI
199e761a927SChristoffer Dall * handling code. In the first case, the VCPU will not be loaded, and in the
200e761a927SChristoffer Dall * second case the VCPU will be loaded. Because this function operates purely
201656012c7SFuad Tabba * on the memory-backed values of system registers, we want to do a full put if
202e761a927SChristoffer Dall * we were loaded (handling a request) and load the values back at the end of
203e761a927SChristoffer Dall * the function. Otherwise we leave the state alone. In both cases, we
204e761a927SChristoffer Dall * disable preemption around the vcpu reset as we would otherwise race with
205e761a927SChristoffer Dall * preempt notifiers which also call put/load.
206f4672752SMarc Zyngier */
kvm_reset_vcpu(struct kvm_vcpu * vcpu)207f4672752SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
208f4672752SMarc Zyngier {
2096654f9dfSOliver Upton struct vcpu_reset_state reset_state;
21066b7e05dSSteven Price int ret;
211e761a927SChristoffer Dall bool loaded;
212349c330cSMarc Zyngier u32 pstate;
213e761a927SChristoffer Dall
2140acc7239SOliver Upton spin_lock(&vcpu->arch.mp_state_lock);
2150acc7239SOliver Upton reset_state = vcpu->arch.reset_state;
2160acc7239SOliver Upton vcpu->arch.reset_state.reset = false;
2170acc7239SOliver Upton spin_unlock(&vcpu->arch.mp_state_lock);
2180acc7239SOliver Upton
219ebff0b0eSMarc Zyngier /* Reset PMU outside of the non-preemptible section */
220ebff0b0eSMarc Zyngier kvm_pmu_vcpu_reset(vcpu);
221ebff0b0eSMarc Zyngier
222e761a927SChristoffer Dall preempt_disable();
223e761a927SChristoffer Dall loaded = (vcpu->cpu != -1);
224e761a927SChristoffer Dall if (loaded)
225e761a927SChristoffer Dall kvm_arch_vcpu_put(vcpu);
226f4672752SMarc Zyngier
2272fb32357SChristoffer Dall /* Disallow NV+SVE for the time being */
2282fb32357SChristoffer Dall if (vcpu_has_nv(vcpu) && vcpu_has_feature(vcpu, KVM_ARM_VCPU_SVE)) {
2292fb32357SChristoffer Dall ret = -EINVAL;
2302fb32357SChristoffer Dall goto out;
2312fb32357SChristoffer Dall }
2322fb32357SChristoffer Dall
2339a3cdf26SDave Martin if (!kvm_arm_vcpu_sve_finalized(vcpu)) {
2349a3cdf26SDave Martin if (test_bit(KVM_ARM_VCPU_SVE, vcpu->arch.features)) {
2359a3cdf26SDave Martin ret = kvm_vcpu_enable_sve(vcpu);
2369a3cdf26SDave Martin if (ret)
2379a3cdf26SDave Martin goto out;
2389a3cdf26SDave Martin }
2399a3cdf26SDave Martin } else {
2409a3cdf26SDave Martin kvm_vcpu_reset_sve(vcpu);
2419a3cdf26SDave Martin }
2429a3cdf26SDave Martin
243a22fa321SAmit Daniel Kachhap if (test_bit(KVM_ARM_VCPU_PTRAUTH_ADDRESS, vcpu->arch.features) ||
244a22fa321SAmit Daniel Kachhap test_bit(KVM_ARM_VCPU_PTRAUTH_GENERIC, vcpu->arch.features)) {
24566b7e05dSSteven Price if (kvm_vcpu_enable_ptrauth(vcpu)) {
24666b7e05dSSteven Price ret = -EINVAL;
247a22fa321SAmit Daniel Kachhap goto out;
248a22fa321SAmit Daniel Kachhap }
24966b7e05dSSteven Price }
250a22fa321SAmit Daniel Kachhap
251*ea55d5a2SOliver Upton if (vcpu_el1_is_32bit(vcpu))
252349c330cSMarc Zyngier pstate = VCPU_RESET_PSTATE_SVC;
253*ea55d5a2SOliver Upton else if (vcpu_has_nv(vcpu))
2542fb32357SChristoffer Dall pstate = VCPU_RESET_PSTATE_EL2;
255*ea55d5a2SOliver Upton else
256349c330cSMarc Zyngier pstate = VCPU_RESET_PSTATE_EL1;
2570d854a60SMarc Zyngier
25877da4303SMarc Zyngier if (kvm_vcpu_has_pmu(vcpu) && !kvm_arm_support_pmu_v3()) {
25977da4303SMarc Zyngier ret = -EINVAL;
26077da4303SMarc Zyngier goto out;
26177da4303SMarc Zyngier }
262f4672752SMarc Zyngier
263f4672752SMarc Zyngier /* Reset core registers */
264349c330cSMarc Zyngier memset(vcpu_gp_regs(vcpu), 0, sizeof(*vcpu_gp_regs(vcpu)));
26585d70374SMarc Zyngier memset(&vcpu->arch.ctxt.fp_regs, 0, sizeof(vcpu->arch.ctxt.fp_regs));
26685d70374SMarc Zyngier vcpu->arch.ctxt.spsr_abt = 0;
26785d70374SMarc Zyngier vcpu->arch.ctxt.spsr_und = 0;
26885d70374SMarc Zyngier vcpu->arch.ctxt.spsr_irq = 0;
26985d70374SMarc Zyngier vcpu->arch.ctxt.spsr_fiq = 0;
270e47c2055SMarc Zyngier vcpu_gp_regs(vcpu)->pstate = pstate;
271f4672752SMarc Zyngier
272f4672752SMarc Zyngier /* Reset system registers */
273f4672752SMarc Zyngier kvm_reset_sys_regs(vcpu);
274f4672752SMarc Zyngier
275358b28f0SMarc Zyngier /*
276358b28f0SMarc Zyngier * Additional reset state handling that PSCI may have imposed on us.
277358b28f0SMarc Zyngier * Must be done after all the sys_reg reset.
278358b28f0SMarc Zyngier */
2796654f9dfSOliver Upton if (reset_state.reset) {
2806654f9dfSOliver Upton unsigned long target_pc = reset_state.pc;
281358b28f0SMarc Zyngier
282358b28f0SMarc Zyngier /* Gracefully handle Thumb2 entry point */
283358b28f0SMarc Zyngier if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
284358b28f0SMarc Zyngier target_pc &= ~1UL;
285358b28f0SMarc Zyngier vcpu_set_thumb(vcpu);
286358b28f0SMarc Zyngier }
287358b28f0SMarc Zyngier
288358b28f0SMarc Zyngier /* Propagate caller endianness */
2896654f9dfSOliver Upton if (reset_state.be)
290358b28f0SMarc Zyngier kvm_vcpu_set_be(vcpu);
291358b28f0SMarc Zyngier
292358b28f0SMarc Zyngier *vcpu_pc(vcpu) = target_pc;
2936654f9dfSOliver Upton vcpu_set_reg(vcpu, 0, reset_state.r0);
294358b28f0SMarc Zyngier }
295358b28f0SMarc Zyngier
296003300deSMarc Zyngier /* Reset timer */
297e761a927SChristoffer Dall ret = kvm_timer_vcpu_reset(vcpu);
298e761a927SChristoffer Dall out:
299e761a927SChristoffer Dall if (loaded)
300e761a927SChristoffer Dall kvm_arch_vcpu_load(vcpu, smp_processor_id());
301e761a927SChristoffer Dall preempt_enable();
302e761a927SChristoffer Dall return ret;
303f4672752SMarc Zyngier }
3045b6c6742SSuzuki K Poulose
get_kvm_ipa_limit(void)305c73433fcSAnshuman Khandual u32 get_kvm_ipa_limit(void)
306c73433fcSAnshuman Khandual {
307c73433fcSAnshuman Khandual return kvm_ipa_limit;
308c73433fcSAnshuman Khandual }
309c73433fcSAnshuman Khandual
kvm_set_ipa_limit(void)3108d20bd63SSean Christopherson int __init kvm_set_ipa_limit(void)
3110f62f0e9SSuzuki K Poulose {
312b31578f6SAnshuman Khandual unsigned int parange;
313f73531f0SAnshuman Khandual u64 mmfr0;
3140f62f0e9SSuzuki K Poulose
315f73531f0SAnshuman Khandual mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
316f73531f0SAnshuman Khandual parange = cpuid_feature_extract_unsigned_field(mmfr0,
3172d987e64SMark Brown ID_AA64MMFR0_EL1_PARANGE_SHIFT);
3185e5df957SAnshuman Khandual /*
3195e5df957SAnshuman Khandual * IPA size beyond 48 bits could not be supported
3205e5df957SAnshuman Khandual * on either 4K or 16K page size. Hence let's cap
3215e5df957SAnshuman Khandual * it to 48 bits, in case it's reported as larger
3225e5df957SAnshuman Khandual * on the system.
3235e5df957SAnshuman Khandual */
3245e5df957SAnshuman Khandual if (PAGE_SIZE != SZ_64K)
3252d987e64SMark Brown parange = min(parange, (unsigned int)ID_AA64MMFR0_EL1_PARANGE_48);
326b130a8f7SMarc Zyngier
327b130a8f7SMarc Zyngier /*
328b130a8f7SMarc Zyngier * Check with ARMv8.5-GTG that our PAGE_SIZE is supported at
329b130a8f7SMarc Zyngier * Stage-2. If not, things will stop very quickly.
330b130a8f7SMarc Zyngier */
3312d987e64SMark Brown switch (cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_EL1_TGRAN_2_SHIFT)) {
3322d987e64SMark Brown case ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_NONE:
333b130a8f7SMarc Zyngier kvm_err("PAGE_SIZE not supported at Stage-2, giving up\n");
334b130a8f7SMarc Zyngier return -EINVAL;
3352d987e64SMark Brown case ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_DEFAULT:
336b130a8f7SMarc Zyngier kvm_debug("PAGE_SIZE supported at Stage-2 (default)\n");
337b130a8f7SMarc Zyngier break;
3382d987e64SMark Brown case ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_MIN ... ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_MAX:
339b130a8f7SMarc Zyngier kvm_debug("PAGE_SIZE supported at Stage-2 (advertised)\n");
340b130a8f7SMarc Zyngier break;
34126f55386SJames Morse default:
34226f55386SJames Morse kvm_err("Unsupported value for TGRAN_2, giving up\n");
34326f55386SJames Morse return -EINVAL;
344b130a8f7SMarc Zyngier }
345b130a8f7SMarc Zyngier
346c9b69a0cSWill Deacon kvm_ipa_limit = id_aa64mmfr0_parange_to_phys_shift(parange);
3477d717558SMarc Zyngier kvm_info("IPA Size Limit: %d bits%s\n", kvm_ipa_limit,
3487d717558SMarc Zyngier ((kvm_ipa_limit < KVM_PHYS_SHIFT) ?
3497d717558SMarc Zyngier " (Reduced IPA size, limited VM/VMM compatibility)" : ""));
350b130a8f7SMarc Zyngier
351b130a8f7SMarc Zyngier return 0;
3520f62f0e9SSuzuki K Poulose }
353