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Searched refs:pll4 (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun9i-a80-pll4-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-pll4-clk.yaml#
20 const: allwinner,sun9i-a80-pll4-clk
44 compatible = "allwinner,sun9i-a80-pll4-clk";
47 clock-output-names = "pll4";
H A Dallwinner,sun9i-a80-apb0-clk.yaml50 clocks = <&osc24M>, <&pll4>;
59 clocks = <&osc24M>, <&pll4>;
H A Dqcom,gcc-ipq8064.yaml41 - const: pll4
65 clock-names = "pxo", "cxo", "pll4";
H A Dallwinner,sun4i-a10-ve-clk.yaml51 clocks = <&pll4>;
H A Dallwinner,sun9i-a80-gt-clk.yaml48 clocks = <&osc24M>, <&pll4>, <&pll12>, <&pll12>;
H A Dallwinner,sun9i-a80-cpus-clk.yaml48 clocks = <&osc32k>, <&osc24M>, <&pll4>, <&pll3>;
H A Dallwinner,sun9i-a80-ahb-clk.yaml48 clocks = <&gt_clk>, <&pll4>, <&pll12>, <&pll12>;
H A Dallwinner,sun4i-a10-mmc-clk.yaml82 clocks = <&osc24M>, <&pll4>;
H A Dqcom,gcc-apq8064.yaml48 - const: pll4
/openbmc/linux/drivers/clk/qcom/
H A Dlcc-ipq806x.c26 static struct clk_pll pll4 = { variable
401 [PLL4] = &pll4.clkr,
453 clk_pll_configure_sr(&pll4, regmap, &pll4_config, true); in lcc_ipq806x_probe()
H A Dlcc-msm8960.c29 static struct clk_pll pll4 = { variable
397 [PLL4] = &pll4.clkr,
H A Dclk-rpm.c418 DEFINE_CLK_RPM_FIXED(pll4, QCOM_RPM_PLL_4, 540672000);
/openbmc/u-boot/arch/arm/dts/
H A Dstm32mp157c-ed1-u-boot.dtsi162 pll4: st,pll@3 { label
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8960.dtsi138 clock-names = "cxo", "pxo", "pll4";
H A Dqcom-ipq8064.dtsi518 clock-names = "pxo", "cxo", "pll4";
H A Dqcom-apq8064.dtsi810 clock-names = "cxo", "pxo", "pll4";