1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller on IPQ8064
8
9maintainers:
10  - Ansuel Smith <ansuelsmth@gmail.com>
11
12description: |
13  Qualcomm global clock control module provides the clocks, resets and power
14  domains on IPQ8064.
15
16  See also::
17    include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
18    include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
19
20allOf:
21  - $ref: qcom,gcc.yaml#
22
23properties:
24  compatible:
25    items:
26      - const: qcom,gcc-ipq8064
27      - const: syscon
28
29  clocks:
30    minItems: 2
31    items:
32      - description: PXO source
33      - description: CXO source
34      - description: PLL4 from LCC
35
36  clock-names:
37    minItems: 2
38    items:
39      - const: pxo
40      - const: cxo
41      - const: pll4
42
43  thermal-sensor:
44    type: object
45
46    allOf:
47      - $ref: /schemas/thermal/qcom-tsens.yaml#
48
49required:
50  - compatible
51  - clocks
52  - clock-names
53
54unevaluatedProperties: false
55
56examples:
57  - |
58    #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
59    #include <dt-bindings/interrupt-controller/arm-gic.h>
60
61    gcc: clock-controller@900000 {
62      compatible = "qcom,gcc-ipq8064", "syscon";
63      reg = <0x00900000 0x4000>;
64      clocks = <&pxo_board>, <&cxo_board>, <&lcc PLL4>;
65      clock-names = "pxo", "cxo", "pll4";
66      #clock-cells = <1>;
67      #reset-cells = <1>;
68      #power-domain-cells = <1>;
69
70      tsens: thermal-sensor {
71        compatible = "qcom,ipq8064-tsens";
72
73        nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
74        nvmem-cell-names = "calib", "calib_backup";
75        interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
76        interrupt-names = "uplow";
77
78        #qcom,sensors = <11>;
79        #thermal-sensor-cells = <1>;
80      };
81    };
82