1f95cad74SMaxime Ripard# SPDX-License-Identifier: GPL-2.0
2f95cad74SMaxime Ripard%YAML 1.2
3f95cad74SMaxime Ripard---
4f95cad74SMaxime Ripard$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-apb0-clk.yaml#
5f95cad74SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml#
6f95cad74SMaxime Ripard
7*dd3cb467SAndrew Lunntitle: Allwinner A80 APB0 Bus Clock
8f95cad74SMaxime Ripard
9f95cad74SMaxime Ripardmaintainers:
10f95cad74SMaxime Ripard  - Chen-Yu Tsai <wens@csie.org>
11f95cad74SMaxime Ripard  - Maxime Ripard <mripard@kernel.org>
12f95cad74SMaxime Ripard
13f95cad74SMaxime Riparddeprecated: true
14f95cad74SMaxime Ripard
15f95cad74SMaxime Ripardproperties:
16f95cad74SMaxime Ripard  "#clock-cells":
17f95cad74SMaxime Ripard    const: 0
18f95cad74SMaxime Ripard
19f95cad74SMaxime Ripard  compatible:
20f95cad74SMaxime Ripard    enum:
21f95cad74SMaxime Ripard      - allwinner,sun9i-a80-apb0-clk
22f95cad74SMaxime Ripard      - allwinner,sun9i-a80-apb1-clk
23f95cad74SMaxime Ripard
24f95cad74SMaxime Ripard  reg:
25f95cad74SMaxime Ripard    maxItems: 1
26f95cad74SMaxime Ripard
27f95cad74SMaxime Ripard  clocks:
28f95cad74SMaxime Ripard    maxItems: 2
29f95cad74SMaxime Ripard    description: >
30f95cad74SMaxime Ripard      The parent order must match the hardware programming order.
31f95cad74SMaxime Ripard
32f95cad74SMaxime Ripard  clock-output-names:
33f95cad74SMaxime Ripard    maxItems: 1
34f95cad74SMaxime Ripard
35f95cad74SMaxime Ripardrequired:
36f95cad74SMaxime Ripard  - "#clock-cells"
37f95cad74SMaxime Ripard  - compatible
38f95cad74SMaxime Ripard  - reg
39f95cad74SMaxime Ripard  - clocks
40f95cad74SMaxime Ripard  - clock-output-names
41f95cad74SMaxime Ripard
42f95cad74SMaxime RipardadditionalProperties: false
43f95cad74SMaxime Ripard
44f95cad74SMaxime Ripardexamples:
45f95cad74SMaxime Ripard  - |
46f95cad74SMaxime Ripard    clk@6000070 {
47f95cad74SMaxime Ripard        #clock-cells = <0>;
48f95cad74SMaxime Ripard        compatible = "allwinner,sun9i-a80-apb0-clk";
49f95cad74SMaxime Ripard        reg = <0x06000070 0x4>;
50f95cad74SMaxime Ripard        clocks = <&osc24M>, <&pll4>;
51f95cad74SMaxime Ripard        clock-output-names = "apb0";
52f95cad74SMaxime Ripard    };
53f95cad74SMaxime Ripard
54f95cad74SMaxime Ripard  - |
55f95cad74SMaxime Ripard    clk@6000074 {
56f95cad74SMaxime Ripard        #clock-cells = <0>;
57f95cad74SMaxime Ripard        compatible = "allwinner,sun9i-a80-apb1-clk";
58f95cad74SMaxime Ripard        reg = <0x06000074 0x4>;
59f95cad74SMaxime Ripard        clocks = <&osc24M>, <&pll4>;
60f95cad74SMaxime Ripard        clock-output-names = "apb1";
61f95cad74SMaxime Ripard    };
62f95cad74SMaxime Ripard
63f95cad74SMaxime Ripard...
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