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Searched refs:plane_id (Results 1 – 25 of 31) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/kmb/
H A Dkmb_plane.c72 int plane_id = kmb_plane->id; in check_pixel_format() local
98 int plane_id = kmb_plane->id; in kmb_plane_atomic_check() local
145 int plane_id = kmb_plane->id; in kmb_plane_atomic_disable() local
150 if (WARN_ON(plane_id >= KMB_MAX_PLANES)) in kmb_plane_atomic_disable()
153 switch (plane_id) { in kmb_plane_atomic_disable()
162 kmb->plane_status[plane_id].disable = true; in kmb_plane_atomic_disable()
305 unsigned char plane_id, in kmb_plane_set_alpha() argument
357 unsigned char plane_id; in kmb_plane_atomic_update() local
373 plane_id = kmb_plane->id; in kmb_plane_atomic_update()
464 config_csc(kmb, plane_id); in kmb_plane_atomic_update()
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H A Dkmb_drv.c206 int plane_id, dma0_state, dma1_state; in handle_lcd_irq() local
222 for (plane_id = LAYER_0; in handle_lcd_irq()
223 plane_id < KMB_MAX_PLANES; plane_id++) { in handle_lcd_irq()
224 if (kmb->plane_status[plane_id].disable) { in handle_lcd_irq()
227 (plane_id), in handle_lcd_irq()
231 kmb->plane_status[plane_id].ctrl); in handle_lcd_irq()
246 kmb->plane_status[plane_id].disable = false; in handle_lcd_irq()
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dskl_universal_plane.c245 enum plane_id plane_id) in icl_is_nv12_y_plane() argument
521 enum plane_id plane_id = plane->id; in icl_program_input_csc() local
623 enum plane_id plane_id = plane->id; in skl_plane_disable_arm() local
637 enum plane_id plane_id = plane->id; in icl_plane_disable_arm() local
656 enum plane_id plane_id = plane->id; in skl_plane_get_hw_state() local
1083 enum plane_id plane_id = plane->id; in icl_plane_csc_load_black() local
1119 enum plane_id plane_id = plane->id; in skl_plane_update_noarm() local
1149 enum plane_id plane_id = plane->id; in skl_plane_update_arm() local
1205 enum plane_id plane_id = plane->id; in icl_plane_update_noarm() local
1280 enum plane_id plane_id = plane->id; in icl_plane_update_arm() local
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H A Dskl_universal_plane.h17 enum plane_id;
21 enum pipe pipe, enum plane_id plane_id);
32 enum plane_id plane_id);
34 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id);
H A Dskl_watermark.c342 enum plane_id plane_id; in skl_crtc_can_enable_sagv() local
394 enum plane_id plane_id; in tgl_crtc_can_enable_sagv() local
808 enum plane_id plane_id; in skl_pipe_ddb_get_hw_state() local
1366 enum plane_id plane_id; in skl_total_relative_data_rate() local
1384 enum plane_id plane_id, in skl_plane_wm_level() argument
1499 enum plane_id plane_id; in skl_crtc_allocate_plane_ddb() local
2225 enum plane_id plane_id; in skl_max_wm0_lines() local
2286 enum plane_id plane_id; in skl_wm_check_vblank() local
2305 enum plane_id plane_id; in skl_wm_check_vblank() local
2949 enum plane_id plane_id; in skl_pipe_wm_get_hw_state() local
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H A Dintel_sprite.c66 enum plane_id plane_id = plane->id; in chv_sprite_update_csc() local
104 intel_de_write_fw(dev_priv, SPCSCC01(plane_id), in chv_sprite_update_csc()
106 intel_de_write_fw(dev_priv, SPCSCC23(plane_id), in chv_sprite_update_csc()
108 intel_de_write_fw(dev_priv, SPCSCC45(plane_id), in chv_sprite_update_csc()
110 intel_de_write_fw(dev_priv, SPCSCC67(plane_id), in chv_sprite_update_csc()
139 enum plane_id plane_id = plane->id; in vlv_sprite_update_clrc() local
342 enum plane_id plane_id = plane->id; in vlv_sprite_update_gamma() local
366 enum plane_id plane_id = plane->id; in vlv_sprite_update_noarm() local
387 enum plane_id plane_id = plane->id; in vlv_sprite_update_arm() local
435 enum plane_id plane_id = plane->id; in vlv_sprite_disable_arm() local
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H A Di9xx_wm.c973 enum plane_id plane_id = plane->id; in g4x_raw_plane_wm_compute() local
1067 enum plane_id plane_id; in g4x_invalidate_wms() local
1111 enum plane_id plane_id; in _g4x_compute_pipe_wm() local
1204 enum plane_id plane_id; in g4x_compute_intermediate_wm() local
1456 enum plane_id plane_id; in vlv_compute_fifo() local
1533 enum plane_id plane_id; in vlv_invalidate_wms() local
1576 enum plane_id plane_id = plane->id; in vlv_raw_plane_wm_compute() local
1640 enum plane_id plane_id; in _vlv_compute_pipe_wm() local
1874 enum plane_id plane_id; in vlv_compute_intermediate_wm() local
3628 enum plane_id plane_id; in g4x_wm_get_hw_state() local
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H A Dintel_bw.c696 enum plane_id plane_id; in intel_bw_crtc_data_rate() local
698 for_each_plane_id_on_crtc(crtc, plane_id) { in intel_bw_crtc_data_rate()
703 if (plane_id == PLANE_CURSOR) in intel_bw_crtc_data_rate()
706 data_rate += crtc_state->data_rate[plane_id]; in intel_bw_crtc_data_rate()
1038 enum plane_id plane_id, in skl_plane_calc_dbuf_bw() argument
1053 crtc_bw->active_planes[slice] |= BIT(plane_id); in skl_plane_calc_dbuf_bw()
1063 enum plane_id plane_id; in skl_crtc_calc_dbuf_bw() local
1070 for_each_plane_id_on_crtc(crtc, plane_id) { in skl_crtc_calc_dbuf_bw()
1075 if (plane_id == PLANE_CURSOR) in skl_crtc_calc_dbuf_bw()
1080 crtc_state->data_rate[plane_id]); in skl_crtc_calc_dbuf_bw()
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H A Dintel_atomic_plane.c667 intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id) in intel_crtc_get_plane() argument
673 if (plane->id == plane_id) in intel_crtc_get_plane()
738 enum plane_id plane_id = plane->id; in skl_next_plane_to_commit() local
741 !(*update_mask & BIT(plane_id))) in skl_next_plane_to_commit()
744 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb[plane_id], in skl_next_plane_to_commit()
745 ddb, I915_MAX_PLANES, plane_id) || in skl_next_plane_to_commit()
746 skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id], in skl_next_plane_to_commit()
747 ddb_y, I915_MAX_PLANES, plane_id)) in skl_next_plane_to_commit()
750 *update_mask &= ~BIT(plane_id); in skl_next_plane_to_commit()
751 ddb[plane_id] = crtc_state->wm.skl.plane_ddb[plane_id]; in skl_next_plane_to_commit()
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H A Dintel_dpt.c327 enum plane_id plane_id; in intel_dpt_configure() local
329 for_each_plane_id_on_crtc(crtc, plane_id) { in intel_dpt_configure()
330 if (plane_id == PLANE_CURSOR) in intel_dpt_configure()
333 intel_de_rmw(i915, PLANE_CHICKEN(pipe, plane_id), in intel_dpt_configure()
H A Dintel_frontbuffer.h60 #define INTEL_FRONTBUFFER(pipe, plane_id) \ argument
61 BIT((plane_id) + INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe));
H A Dintel_display_limits.h62 enum plane_id { enum
H A Dintel_atomic_plane.h19 enum plane_id;
H A Dintel_sprite_uapi.c67 plane = drm_plane_find(dev, file_priv, set->plane_id); in intel_sprite_set_colorkey_ioctl()
H A Dintel_display_debugfs.c713 enum plane_id plane_id; in i915_ddb_info() local
717 for_each_plane_id_on_crtc(crtc, plane_id) { in i915_ddb_info()
718 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; in i915_ddb_info()
719 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, in i915_ddb_info()
/openbmc/linux/drivers/gpu/drm/sti/
H A Dsti_mixer.c239 int plane_id, depth = plane->drm_plane.state->normalized_zpos; in sti_mixer_set_plane_depth() local
245 plane_id = GAM_DEPTH_GDP0_ID; in sti_mixer_set_plane_depth()
248 plane_id = GAM_DEPTH_GDP1_ID; in sti_mixer_set_plane_depth()
251 plane_id = GAM_DEPTH_GDP2_ID; in sti_mixer_set_plane_depth()
254 plane_id = GAM_DEPTH_GDP3_ID; in sti_mixer_set_plane_depth()
257 plane_id = GAM_DEPTH_VID0_ID; in sti_mixer_set_plane_depth()
271 if ((val & mask) == plane_id << (3 * i)) in sti_mixer_set_plane_depth()
276 plane_id = plane_id << (3 * depth); in sti_mixer_set_plane_depth()
281 plane_id, mask); in sti_mixer_set_plane_depth()
284 val |= plane_id; in sti_mixer_set_plane_depth()
/openbmc/linux/drivers/gpu/drm/i915/
H A Di915_reg.h3555 #define SPCSCYGOFF(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d900) argument
3556 #define SPCSCCBOFF(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d904) argument
3557 #define SPCSCCROFF(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d908) argument
3563 #define SPCSCC01(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d90c) argument
3564 #define SPCSCC23(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d910) argument
3565 #define SPCSCC45(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d914) argument
3566 #define SPCSCC67(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d918) argument
3567 #define SPCSCC8(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d91c) argument
3573 #define SPCSCYGICLAMP(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d920) argument
3574 #define SPCSCCBICLAMP(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d924) argument
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/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Ddmabuf.c256 int plane_id) in vgpu_get_plane_info() argument
264 if (plane_id == DRM_PLANE_TYPE_PRIMARY) { in vgpu_get_plane_info()
294 } else if (plane_id == DRM_PLANE_TYPE_CURSOR) { in vgpu_get_plane_info()
316 gvt_vgpu_err("invalid plane id:%d\n", plane_id); in vgpu_get_plane_info()
/openbmc/linux/drivers/media/platform/nvidia/tegra-vde/
H A Dh264.c679 unsigned int plane_id, in tegra_vde_validate_vb_size() argument
682 u64 offset = vb->planes[plane_id].data_offset; in tegra_vde_validate_vb_size()
685 if (offset + min_size > vb2_plane_size(vb, plane_id)) { in tegra_vde_validate_vb_size()
687 plane_id, vb2_plane_size(vb, plane_id), offset, min_size); in tegra_vde_validate_vb_size()
/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_trace.h611 TP_PROTO(uint32_t crtc_id, uint32_t plane_id,
615 TP_ARGS(crtc_id, plane_id, state, pstate, stage_idx,
619 __field( uint32_t, plane_id )
633 __entry->plane_id = plane_id;
649 __entry->crtc_id, __entry->plane_id, __entry->fb_id,
/openbmc/linux/include/uapi/drm/
H A Ddrm_mode.h297 __u32 plane_id; member
334 __u32 plane_id; member
/openbmc/linux/drivers/gpu/drm/
H A Ddrm_plane.c716 plane = drm_plane_find(dev, file_priv, plane_resp->plane_id); in drm_mode_getplane()
736 plane_resp->plane_id = plane->base.id; in drm_mode_getplane()
996 plane = drm_plane_find(dev, file_priv, plane_req->plane_id); in drm_mode_setplane()
999 plane_req->plane_id); in drm_mode_setplane()
/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_trace.h228 __field(uint32_t, plane_id)
257 __entry->plane_id = state->plane->base.id;
292 __entry->plane_id, __entry->plane_type, __entry->plane_state,
/openbmc/linux/drivers/gpu/drm/ingenic/
H A Dingenic-drm-drv.c662 unsigned int width, height, cpp, next_id, plane_id; in ingenic_drm_plane_atomic_update() local
674 plane_id = !!(priv->soc_info->has_osd && plane != &priv->f0); in ingenic_drm_plane_atomic_update()
682 next_id = (priv_state && priv_state->use_palette) ? HWDESC_PALETTE : plane_id; in ingenic_drm_plane_atomic_update()
684 hwdesc = &priv->dma_hwdescs->hwdesc[plane_id]; in ingenic_drm_plane_atomic_update()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c732 int plane_id) in power_on_plane_resources() argument
737 hws->funcs.dpp_root_clock_control(hws, plane_id, true); in power_on_plane_resources()
744 hws->funcs.dpp_pg_control(hws, plane_id, true); in power_on_plane_resources()
747 hws->funcs.hubp_pg_control(hws, plane_id, true); in power_on_plane_resources()
752 "Un-gated front end for pipe %d\n", plane_id); in power_on_plane_resources()

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