10cf5eb76SDavid Francis /* 20cf5eb76SDavid Francis * Copyright 2018 Advanced Micro Devices, Inc. 30cf5eb76SDavid Francis * 40cf5eb76SDavid Francis * Permission is hereby granted, free of charge, to any person obtaining a 50cf5eb76SDavid Francis * copy of this software and associated documentation files (the "Software"), 60cf5eb76SDavid Francis * to deal in the Software without restriction, including without limitation 70cf5eb76SDavid Francis * the rights to use, copy, modify, merge, publish, distribute, sublicense, 80cf5eb76SDavid Francis * and/or sell copies of the Software, and to permit persons to whom the 90cf5eb76SDavid Francis * Software is furnished to do so, subject to the following conditions: 100cf5eb76SDavid Francis * 110cf5eb76SDavid Francis * The above copyright notice and this permission notice shall be included in 120cf5eb76SDavid Francis * all copies or substantial portions of the Software. 130cf5eb76SDavid Francis * 140cf5eb76SDavid Francis * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 150cf5eb76SDavid Francis * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 160cf5eb76SDavid Francis * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 170cf5eb76SDavid Francis * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 180cf5eb76SDavid Francis * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 190cf5eb76SDavid Francis * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 200cf5eb76SDavid Francis * OTHER DEALINGS IN THE SOFTWARE. 210cf5eb76SDavid Francis * 220cf5eb76SDavid Francis * Authors: AMD 230cf5eb76SDavid Francis * 240cf5eb76SDavid Francis */ 250cf5eb76SDavid Francis 260cf5eb76SDavid Francis #undef TRACE_SYSTEM 270cf5eb76SDavid Francis #define TRACE_SYSTEM amdgpu_dm 280cf5eb76SDavid Francis 299d83722dSRodrigo Siqueira #if !defined(_AMDGPU_DM_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) 300cf5eb76SDavid Francis #define _AMDGPU_DM_TRACE_H_ 310cf5eb76SDavid Francis 320cf5eb76SDavid Francis #include <linux/tracepoint.h> 33e8a98235SRodrigo Siqueira #include <drm/drm_connector.h> 34e8a98235SRodrigo Siqueira #include <drm/drm_crtc.h> 35e8a98235SRodrigo Siqueira #include <drm/drm_plane.h> 36e8a98235SRodrigo Siqueira #include <drm/drm_fourcc.h> 37720cf96dSVille Syrjälä #include <drm/drm_framebuffer.h> 38e8a98235SRodrigo Siqueira #include <drm/drm_encoder.h> 39e8a98235SRodrigo Siqueira #include <drm/drm_atomic.h> 40*f1943a51SRodrigo Siqueira #include "dcn10/dcn10_optc.h" 410cf5eb76SDavid Francis 428b198f6eSRodrigo Siqueira #include "dc/inc/core_types.h" 438b198f6eSRodrigo Siqueira 4421c41445SRodrigo Siqueira DECLARE_EVENT_CLASS(amdgpu_dc_reg_template, 4521c41445SRodrigo Siqueira TP_PROTO(unsigned long *count, uint32_t reg, uint32_t value), 4621c41445SRodrigo Siqueira TP_ARGS(count, reg, value), 4721c41445SRodrigo Siqueira 480cf5eb76SDavid Francis TP_STRUCT__entry( 490cf5eb76SDavid Francis __field(uint32_t, reg) 500cf5eb76SDavid Francis __field(uint32_t, value) 510cf5eb76SDavid Francis ), 5221c41445SRodrigo Siqueira 530cf5eb76SDavid Francis TP_fast_assign( 540cf5eb76SDavid Francis __entry->reg = reg; 550cf5eb76SDavid Francis __entry->value = value; 5621c41445SRodrigo Siqueira *count = *count + 1; 570cf5eb76SDavid Francis ), 5821c41445SRodrigo Siqueira 590cf5eb76SDavid Francis TP_printk("reg=0x%08lx, value=0x%08lx", 600cf5eb76SDavid Francis (unsigned long)__entry->reg, 610cf5eb76SDavid Francis (unsigned long)__entry->value) 620cf5eb76SDavid Francis ); 630cf5eb76SDavid Francis 6421c41445SRodrigo Siqueira DEFINE_EVENT(amdgpu_dc_reg_template, amdgpu_dc_rreg, 6521c41445SRodrigo Siqueira TP_PROTO(unsigned long *count, uint32_t reg, uint32_t value), 6621c41445SRodrigo Siqueira TP_ARGS(count, reg, value)); 670cf5eb76SDavid Francis 6821c41445SRodrigo Siqueira DEFINE_EVENT(amdgpu_dc_reg_template, amdgpu_dc_wreg, 6921c41445SRodrigo Siqueira TP_PROTO(unsigned long *count, uint32_t reg, uint32_t value), 7021c41445SRodrigo Siqueira TP_ARGS(count, reg, value)); 710cf5eb76SDavid Francis 720cf5eb76SDavid Francis TRACE_EVENT(amdgpu_dc_performance, 730cf5eb76SDavid Francis TP_PROTO(unsigned long read_count, unsigned long write_count, 740cf5eb76SDavid Francis unsigned long *last_read, unsigned long *last_write, 750cf5eb76SDavid Francis const char *func, unsigned int line), 760cf5eb76SDavid Francis TP_ARGS(read_count, write_count, last_read, last_write, func, line), 770cf5eb76SDavid Francis TP_STRUCT__entry( 780cf5eb76SDavid Francis __field(uint32_t, reads) 790cf5eb76SDavid Francis __field(uint32_t, writes) 800cf5eb76SDavid Francis __field(uint32_t, read_delta) 810cf5eb76SDavid Francis __field(uint32_t, write_delta) 820cf5eb76SDavid Francis __string(func, func) 830cf5eb76SDavid Francis __field(uint32_t, line) 840cf5eb76SDavid Francis ), 850cf5eb76SDavid Francis TP_fast_assign( 860cf5eb76SDavid Francis __entry->reads = read_count; 870cf5eb76SDavid Francis __entry->writes = write_count; 880cf5eb76SDavid Francis __entry->read_delta = read_count - *last_read; 890cf5eb76SDavid Francis __entry->write_delta = write_count - *last_write; 900cf5eb76SDavid Francis __assign_str(func, func); 910cf5eb76SDavid Francis __entry->line = line; 920cf5eb76SDavid Francis *last_read = read_count; 930cf5eb76SDavid Francis *last_write = write_count; 940cf5eb76SDavid Francis ), 950cf5eb76SDavid Francis TP_printk("%s:%d reads=%08ld (%08ld total), writes=%08ld (%08ld total)", 960cf5eb76SDavid Francis __get_str(func), __entry->line, 970cf5eb76SDavid Francis (unsigned long)__entry->read_delta, 980cf5eb76SDavid Francis (unsigned long)__entry->reads, 990cf5eb76SDavid Francis (unsigned long)__entry->write_delta, 1000cf5eb76SDavid Francis (unsigned long)__entry->writes) 1010cf5eb76SDavid Francis ); 102e8a98235SRodrigo Siqueira 103e8a98235SRodrigo Siqueira TRACE_EVENT(amdgpu_dm_connector_atomic_check, 104e8a98235SRodrigo Siqueira TP_PROTO(const struct drm_connector_state *state), 105e8a98235SRodrigo Siqueira TP_ARGS(state), 106e8a98235SRodrigo Siqueira 107e8a98235SRodrigo Siqueira TP_STRUCT__entry( 108e8a98235SRodrigo Siqueira __field(uint32_t, conn_id) 109e8a98235SRodrigo Siqueira __field(const struct drm_connector_state *, conn_state) 110e8a98235SRodrigo Siqueira __field(const struct drm_atomic_state *, state) 111e8a98235SRodrigo Siqueira __field(const struct drm_crtc_commit *, commit) 112e8a98235SRodrigo Siqueira __field(uint32_t, crtc_id) 113e8a98235SRodrigo Siqueira __field(uint32_t, best_encoder_id) 114e8a98235SRodrigo Siqueira __field(enum drm_link_status, link_status) 115e8a98235SRodrigo Siqueira __field(bool, self_refresh_aware) 116e8a98235SRodrigo Siqueira __field(enum hdmi_picture_aspect, picture_aspect_ratio) 117e8a98235SRodrigo Siqueira __field(unsigned int, content_type) 118e8a98235SRodrigo Siqueira __field(unsigned int, hdcp_content_type) 119e8a98235SRodrigo Siqueira __field(unsigned int, content_protection) 120e8a98235SRodrigo Siqueira __field(unsigned int, scaling_mode) 121e8a98235SRodrigo Siqueira __field(u32, colorspace) 122e8a98235SRodrigo Siqueira __field(u8, max_requested_bpc) 123e8a98235SRodrigo Siqueira __field(u8, max_bpc) 124e8a98235SRodrigo Siqueira ), 125e8a98235SRodrigo Siqueira 126e8a98235SRodrigo Siqueira TP_fast_assign( 127e8a98235SRodrigo Siqueira __entry->conn_id = state->connector->base.id; 128e8a98235SRodrigo Siqueira __entry->conn_state = state; 129e8a98235SRodrigo Siqueira __entry->state = state->state; 130e8a98235SRodrigo Siqueira __entry->commit = state->commit; 131e8a98235SRodrigo Siqueira __entry->crtc_id = state->crtc ? state->crtc->base.id : 0; 132e8a98235SRodrigo Siqueira __entry->best_encoder_id = state->best_encoder ? 133e8a98235SRodrigo Siqueira state->best_encoder->base.id : 0; 134e8a98235SRodrigo Siqueira __entry->link_status = state->link_status; 135e8a98235SRodrigo Siqueira __entry->self_refresh_aware = state->self_refresh_aware; 136e8a98235SRodrigo Siqueira __entry->picture_aspect_ratio = state->picture_aspect_ratio; 137e8a98235SRodrigo Siqueira __entry->content_type = state->content_type; 138e8a98235SRodrigo Siqueira __entry->hdcp_content_type = state->hdcp_content_type; 139e8a98235SRodrigo Siqueira __entry->content_protection = state->content_protection; 140e8a98235SRodrigo Siqueira __entry->scaling_mode = state->scaling_mode; 141e8a98235SRodrigo Siqueira __entry->colorspace = state->colorspace; 142e8a98235SRodrigo Siqueira __entry->max_requested_bpc = state->max_requested_bpc; 143e8a98235SRodrigo Siqueira __entry->max_bpc = state->max_bpc; 144e8a98235SRodrigo Siqueira ), 145e8a98235SRodrigo Siqueira 146e8a98235SRodrigo Siqueira TP_printk("conn_id=%u conn_state=%p state=%p commit=%p crtc_id=%u " 147e8a98235SRodrigo Siqueira "best_encoder_id=%u link_status=%d self_refresh_aware=%d " 148e8a98235SRodrigo Siqueira "picture_aspect_ratio=%d content_type=%u " 149e8a98235SRodrigo Siqueira "hdcp_content_type=%u content_protection=%u scaling_mode=%u " 150e8a98235SRodrigo Siqueira "colorspace=%u max_requested_bpc=%u max_bpc=%u", 151e8a98235SRodrigo Siqueira __entry->conn_id, __entry->conn_state, __entry->state, 152e8a98235SRodrigo Siqueira __entry->commit, __entry->crtc_id, __entry->best_encoder_id, 153e8a98235SRodrigo Siqueira __entry->link_status, __entry->self_refresh_aware, 154e8a98235SRodrigo Siqueira __entry->picture_aspect_ratio, __entry->content_type, 155e8a98235SRodrigo Siqueira __entry->hdcp_content_type, __entry->content_protection, 156e8a98235SRodrigo Siqueira __entry->scaling_mode, __entry->colorspace, 157e8a98235SRodrigo Siqueira __entry->max_requested_bpc, __entry->max_bpc) 158e8a98235SRodrigo Siqueira ); 159e8a98235SRodrigo Siqueira 160e8a98235SRodrigo Siqueira TRACE_EVENT(amdgpu_dm_crtc_atomic_check, 161e8a98235SRodrigo Siqueira TP_PROTO(const struct drm_crtc_state *state), 162e8a98235SRodrigo Siqueira TP_ARGS(state), 163e8a98235SRodrigo Siqueira 164e8a98235SRodrigo Siqueira TP_STRUCT__entry( 165e8a98235SRodrigo Siqueira __field(const struct drm_atomic_state *, state) 166e8a98235SRodrigo Siqueira __field(const struct drm_crtc_state *, crtc_state) 167e8a98235SRodrigo Siqueira __field(const struct drm_crtc_commit *, commit) 168e8a98235SRodrigo Siqueira __field(uint32_t, crtc_id) 169e8a98235SRodrigo Siqueira __field(bool, enable) 170e8a98235SRodrigo Siqueira __field(bool, active) 171e8a98235SRodrigo Siqueira __field(bool, planes_changed) 172e8a98235SRodrigo Siqueira __field(bool, mode_changed) 173e8a98235SRodrigo Siqueira __field(bool, active_changed) 174e8a98235SRodrigo Siqueira __field(bool, connectors_changed) 175e8a98235SRodrigo Siqueira __field(bool, zpos_changed) 176e8a98235SRodrigo Siqueira __field(bool, color_mgmt_changed) 177e8a98235SRodrigo Siqueira __field(bool, no_vblank) 178e8a98235SRodrigo Siqueira __field(bool, async_flip) 179e8a98235SRodrigo Siqueira __field(bool, vrr_enabled) 180e8a98235SRodrigo Siqueira __field(bool, self_refresh_active) 181e8a98235SRodrigo Siqueira __field(u32, plane_mask) 182e8a98235SRodrigo Siqueira __field(u32, connector_mask) 183e8a98235SRodrigo Siqueira __field(u32, encoder_mask) 184e8a98235SRodrigo Siqueira ), 185e8a98235SRodrigo Siqueira 186e8a98235SRodrigo Siqueira TP_fast_assign( 187e8a98235SRodrigo Siqueira __entry->state = state->state; 188e8a98235SRodrigo Siqueira __entry->crtc_state = state; 189e8a98235SRodrigo Siqueira __entry->crtc_id = state->crtc->base.id; 190e8a98235SRodrigo Siqueira __entry->commit = state->commit; 191e8a98235SRodrigo Siqueira __entry->enable = state->enable; 192e8a98235SRodrigo Siqueira __entry->active = state->active; 193e8a98235SRodrigo Siqueira __entry->planes_changed = state->planes_changed; 194e8a98235SRodrigo Siqueira __entry->mode_changed = state->mode_changed; 195e8a98235SRodrigo Siqueira __entry->active_changed = state->active_changed; 196e8a98235SRodrigo Siqueira __entry->connectors_changed = state->connectors_changed; 197e8a98235SRodrigo Siqueira __entry->zpos_changed = state->zpos_changed; 198e8a98235SRodrigo Siqueira __entry->color_mgmt_changed = state->color_mgmt_changed; 199e8a98235SRodrigo Siqueira __entry->no_vblank = state->no_vblank; 200e8a98235SRodrigo Siqueira __entry->async_flip = state->async_flip; 201e8a98235SRodrigo Siqueira __entry->vrr_enabled = state->vrr_enabled; 202e8a98235SRodrigo Siqueira __entry->self_refresh_active = state->self_refresh_active; 203e8a98235SRodrigo Siqueira __entry->plane_mask = state->plane_mask; 204e8a98235SRodrigo Siqueira __entry->connector_mask = state->connector_mask; 205e8a98235SRodrigo Siqueira __entry->encoder_mask = state->encoder_mask; 206e8a98235SRodrigo Siqueira ), 207e8a98235SRodrigo Siqueira 208e8a98235SRodrigo Siqueira TP_printk("crtc_id=%u crtc_state=%p state=%p commit=%p changed(" 209e8a98235SRodrigo Siqueira "planes=%d mode=%d active=%d conn=%d zpos=%d color_mgmt=%d) " 210e8a98235SRodrigo Siqueira "state(enable=%d active=%d async_flip=%d vrr_enabled=%d " 211e8a98235SRodrigo Siqueira "self_refresh_active=%d no_vblank=%d) mask(plane=%x conn=%x " 212e8a98235SRodrigo Siqueira "enc=%x)", 213e8a98235SRodrigo Siqueira __entry->crtc_id, __entry->crtc_state, __entry->state, 214e8a98235SRodrigo Siqueira __entry->commit, __entry->planes_changed, 215e8a98235SRodrigo Siqueira __entry->mode_changed, __entry->active_changed, 216e8a98235SRodrigo Siqueira __entry->connectors_changed, __entry->zpos_changed, 217e8a98235SRodrigo Siqueira __entry->color_mgmt_changed, __entry->enable, __entry->active, 218e8a98235SRodrigo Siqueira __entry->async_flip, __entry->vrr_enabled, 219e8a98235SRodrigo Siqueira __entry->self_refresh_active, __entry->no_vblank, 220e8a98235SRodrigo Siqueira __entry->plane_mask, __entry->connector_mask, 221e8a98235SRodrigo Siqueira __entry->encoder_mask) 222e8a98235SRodrigo Siqueira ); 223e8a98235SRodrigo Siqueira 224e8a98235SRodrigo Siqueira DECLARE_EVENT_CLASS(amdgpu_dm_plane_state_template, 225e8a98235SRodrigo Siqueira TP_PROTO(const struct drm_plane_state *state), 226e8a98235SRodrigo Siqueira TP_ARGS(state), 227e8a98235SRodrigo Siqueira TP_STRUCT__entry( 228e8a98235SRodrigo Siqueira __field(uint32_t, plane_id) 229e8a98235SRodrigo Siqueira __field(enum drm_plane_type, plane_type) 230e8a98235SRodrigo Siqueira __field(const struct drm_plane_state *, plane_state) 231e8a98235SRodrigo Siqueira __field(const struct drm_atomic_state *, state) 232e8a98235SRodrigo Siqueira __field(uint32_t, crtc_id) 233e8a98235SRodrigo Siqueira __field(uint32_t, fb_id) 234e8a98235SRodrigo Siqueira __field(uint32_t, fb_format) 235e8a98235SRodrigo Siqueira __field(uint8_t, fb_planes) 236e8a98235SRodrigo Siqueira __field(uint64_t, fb_modifier) 237e8a98235SRodrigo Siqueira __field(const struct dma_fence *, fence) 238e8a98235SRodrigo Siqueira __field(int32_t, crtc_x) 239e8a98235SRodrigo Siqueira __field(int32_t, crtc_y) 240e8a98235SRodrigo Siqueira __field(uint32_t, crtc_w) 241e8a98235SRodrigo Siqueira __field(uint32_t, crtc_h) 242e8a98235SRodrigo Siqueira __field(uint32_t, src_x) 243e8a98235SRodrigo Siqueira __field(uint32_t, src_y) 244e8a98235SRodrigo Siqueira __field(uint32_t, src_w) 245e8a98235SRodrigo Siqueira __field(uint32_t, src_h) 246e8a98235SRodrigo Siqueira __field(u32, alpha) 247e8a98235SRodrigo Siqueira __field(uint32_t, pixel_blend_mode) 248e8a98235SRodrigo Siqueira __field(unsigned int, rotation) 249e8a98235SRodrigo Siqueira __field(unsigned int, zpos) 250e8a98235SRodrigo Siqueira __field(unsigned int, normalized_zpos) 251e8a98235SRodrigo Siqueira __field(enum drm_color_encoding, color_encoding) 252e8a98235SRodrigo Siqueira __field(enum drm_color_range, color_range) 253e8a98235SRodrigo Siqueira __field(bool, visible) 254e8a98235SRodrigo Siqueira ), 255e8a98235SRodrigo Siqueira 256e8a98235SRodrigo Siqueira TP_fast_assign( 257e8a98235SRodrigo Siqueira __entry->plane_id = state->plane->base.id; 258e8a98235SRodrigo Siqueira __entry->plane_type = state->plane->type; 259e8a98235SRodrigo Siqueira __entry->plane_state = state; 260e8a98235SRodrigo Siqueira __entry->state = state->state; 261e8a98235SRodrigo Siqueira __entry->crtc_id = state->crtc ? state->crtc->base.id : 0; 262e8a98235SRodrigo Siqueira __entry->fb_id = state->fb ? state->fb->base.id : 0; 263e8a98235SRodrigo Siqueira __entry->fb_format = state->fb ? state->fb->format->format : 0; 264e8a98235SRodrigo Siqueira __entry->fb_planes = state->fb ? state->fb->format->num_planes : 0; 265e8a98235SRodrigo Siqueira __entry->fb_modifier = state->fb ? state->fb->modifier : 0; 266e8a98235SRodrigo Siqueira __entry->fence = state->fence; 267e8a98235SRodrigo Siqueira __entry->crtc_x = state->crtc_x; 268e8a98235SRodrigo Siqueira __entry->crtc_y = state->crtc_y; 269e8a98235SRodrigo Siqueira __entry->crtc_w = state->crtc_w; 270e8a98235SRodrigo Siqueira __entry->crtc_h = state->crtc_h; 271e8a98235SRodrigo Siqueira __entry->src_x = state->src_x >> 16; 272e8a98235SRodrigo Siqueira __entry->src_y = state->src_y >> 16; 273e8a98235SRodrigo Siqueira __entry->src_w = state->src_w >> 16; 274e8a98235SRodrigo Siqueira __entry->src_h = state->src_h >> 16; 275e8a98235SRodrigo Siqueira __entry->alpha = state->alpha; 276e8a98235SRodrigo Siqueira __entry->pixel_blend_mode = state->pixel_blend_mode; 277e8a98235SRodrigo Siqueira __entry->rotation = state->rotation; 278e8a98235SRodrigo Siqueira __entry->zpos = state->zpos; 279e8a98235SRodrigo Siqueira __entry->normalized_zpos = state->normalized_zpos; 280e8a98235SRodrigo Siqueira __entry->color_encoding = state->color_encoding; 281e8a98235SRodrigo Siqueira __entry->color_range = state->color_range; 282e8a98235SRodrigo Siqueira __entry->visible = state->visible; 283e8a98235SRodrigo Siqueira ), 284e8a98235SRodrigo Siqueira 285e8a98235SRodrigo Siqueira TP_printk("plane_id=%u plane_type=%d plane_state=%p state=%p " 286e8a98235SRodrigo Siqueira "crtc_id=%u fb(id=%u fmt=%c%c%c%c planes=%u mod=%llu) " 287e8a98235SRodrigo Siqueira "fence=%p crtc_x=%d crtc_y=%d crtc_w=%u crtc_h=%u " 288e8a98235SRodrigo Siqueira "src_x=%u src_y=%u src_w=%u src_h=%u alpha=%u " 289e8a98235SRodrigo Siqueira "pixel_blend_mode=%u rotation=%u zpos=%u " 290e8a98235SRodrigo Siqueira "normalized_zpos=%u color_encoding=%d color_range=%d " 291e8a98235SRodrigo Siqueira "visible=%d", 292e8a98235SRodrigo Siqueira __entry->plane_id, __entry->plane_type, __entry->plane_state, 293e8a98235SRodrigo Siqueira __entry->state, __entry->crtc_id, __entry->fb_id, 294e8a98235SRodrigo Siqueira (__entry->fb_format & 0xff) ? (__entry->fb_format & 0xff) : 'N', 295e8a98235SRodrigo Siqueira ((__entry->fb_format >> 8) & 0xff) ? ((__entry->fb_format >> 8) & 0xff) : 'O', 296e8a98235SRodrigo Siqueira ((__entry->fb_format >> 16) & 0xff) ? ((__entry->fb_format >> 16) & 0xff) : 'N', 297e8a98235SRodrigo Siqueira ((__entry->fb_format >> 24) & 0x7f) ? ((__entry->fb_format >> 24) & 0x7f) : 'E', 298e8a98235SRodrigo Siqueira __entry->fb_planes, 299e8a98235SRodrigo Siqueira __entry->fb_modifier, __entry->fence, __entry->crtc_x, 300e8a98235SRodrigo Siqueira __entry->crtc_y, __entry->crtc_w, __entry->crtc_h, 301e8a98235SRodrigo Siqueira __entry->src_x, __entry->src_y, __entry->src_w, __entry->src_h, 302e8a98235SRodrigo Siqueira __entry->alpha, __entry->pixel_blend_mode, __entry->rotation, 303e8a98235SRodrigo Siqueira __entry->zpos, __entry->normalized_zpos, 304e8a98235SRodrigo Siqueira __entry->color_encoding, __entry->color_range, 305e8a98235SRodrigo Siqueira __entry->visible) 306e8a98235SRodrigo Siqueira ); 307e8a98235SRodrigo Siqueira 308e8a98235SRodrigo Siqueira DEFINE_EVENT(amdgpu_dm_plane_state_template, amdgpu_dm_plane_atomic_check, 309e8a98235SRodrigo Siqueira TP_PROTO(const struct drm_plane_state *state), 310e8a98235SRodrigo Siqueira TP_ARGS(state)); 311e8a98235SRodrigo Siqueira 312e8a98235SRodrigo Siqueira DEFINE_EVENT(amdgpu_dm_plane_state_template, amdgpu_dm_atomic_update_cursor, 313e8a98235SRodrigo Siqueira TP_PROTO(const struct drm_plane_state *state), 314e8a98235SRodrigo Siqueira TP_ARGS(state)); 315e8a98235SRodrigo Siqueira 316e8a98235SRodrigo Siqueira TRACE_EVENT(amdgpu_dm_atomic_state_template, 317e8a98235SRodrigo Siqueira TP_PROTO(const struct drm_atomic_state *state), 318e8a98235SRodrigo Siqueira TP_ARGS(state), 319e8a98235SRodrigo Siqueira 320e8a98235SRodrigo Siqueira TP_STRUCT__entry( 321e8a98235SRodrigo Siqueira __field(const struct drm_atomic_state *, state) 322e8a98235SRodrigo Siqueira __field(bool, allow_modeset) 323e8a98235SRodrigo Siqueira __field(bool, legacy_cursor_update) 324e8a98235SRodrigo Siqueira __field(bool, async_update) 325e8a98235SRodrigo Siqueira __field(bool, duplicated) 326e8a98235SRodrigo Siqueira __field(int, num_connector) 327e8a98235SRodrigo Siqueira __field(int, num_private_objs) 328e8a98235SRodrigo Siqueira ), 329e8a98235SRodrigo Siqueira 330e8a98235SRodrigo Siqueira TP_fast_assign( 331e8a98235SRodrigo Siqueira __entry->state = state; 332e8a98235SRodrigo Siqueira __entry->allow_modeset = state->allow_modeset; 333e8a98235SRodrigo Siqueira __entry->legacy_cursor_update = state->legacy_cursor_update; 334e8a98235SRodrigo Siqueira __entry->async_update = state->async_update; 335e8a98235SRodrigo Siqueira __entry->duplicated = state->duplicated; 336e8a98235SRodrigo Siqueira __entry->num_connector = state->num_connector; 337e8a98235SRodrigo Siqueira __entry->num_private_objs = state->num_private_objs; 338e8a98235SRodrigo Siqueira ), 339e8a98235SRodrigo Siqueira 340e8a98235SRodrigo Siqueira TP_printk("state=%p allow_modeset=%d legacy_cursor_update=%d " 341e8a98235SRodrigo Siqueira "async_update=%d duplicated=%d num_connector=%d " 342e8a98235SRodrigo Siqueira "num_private_objs=%d", 343e8a98235SRodrigo Siqueira __entry->state, __entry->allow_modeset, __entry->legacy_cursor_update, 344e8a98235SRodrigo Siqueira __entry->async_update, __entry->duplicated, __entry->num_connector, 345e8a98235SRodrigo Siqueira __entry->num_private_objs) 346e8a98235SRodrigo Siqueira ); 347e8a98235SRodrigo Siqueira 348e8a98235SRodrigo Siqueira DEFINE_EVENT(amdgpu_dm_atomic_state_template, amdgpu_dm_atomic_commit_tail_begin, 349e8a98235SRodrigo Siqueira TP_PROTO(const struct drm_atomic_state *state), 350e8a98235SRodrigo Siqueira TP_ARGS(state)); 351e8a98235SRodrigo Siqueira 352e8a98235SRodrigo Siqueira DEFINE_EVENT(amdgpu_dm_atomic_state_template, amdgpu_dm_atomic_commit_tail_finish, 353e8a98235SRodrigo Siqueira TP_PROTO(const struct drm_atomic_state *state), 354e8a98235SRodrigo Siqueira TP_ARGS(state)); 355e8a98235SRodrigo Siqueira 356e8a98235SRodrigo Siqueira DEFINE_EVENT(amdgpu_dm_atomic_state_template, amdgpu_dm_atomic_check_begin, 357e8a98235SRodrigo Siqueira TP_PROTO(const struct drm_atomic_state *state), 358e8a98235SRodrigo Siqueira TP_ARGS(state)); 359e8a98235SRodrigo Siqueira 360e8a98235SRodrigo Siqueira TRACE_EVENT(amdgpu_dm_atomic_check_finish, 361e8a98235SRodrigo Siqueira TP_PROTO(const struct drm_atomic_state *state, int res), 362e8a98235SRodrigo Siqueira TP_ARGS(state, res), 363e8a98235SRodrigo Siqueira 364e8a98235SRodrigo Siqueira TP_STRUCT__entry( 365e8a98235SRodrigo Siqueira __field(const struct drm_atomic_state *, state) 366e8a98235SRodrigo Siqueira __field(int, res) 367e8a98235SRodrigo Siqueira __field(bool, async_update) 368e8a98235SRodrigo Siqueira __field(bool, allow_modeset) 369e8a98235SRodrigo Siqueira ), 370e8a98235SRodrigo Siqueira 371e8a98235SRodrigo Siqueira TP_fast_assign( 372e8a98235SRodrigo Siqueira __entry->state = state; 373e8a98235SRodrigo Siqueira __entry->res = res; 374e8a98235SRodrigo Siqueira __entry->async_update = state->async_update; 375e8a98235SRodrigo Siqueira __entry->allow_modeset = state->allow_modeset; 376e8a98235SRodrigo Siqueira ), 377e8a98235SRodrigo Siqueira 378e8a98235SRodrigo Siqueira TP_printk("state=%p res=%d async_update=%d allow_modeset=%d", 379e8a98235SRodrigo Siqueira __entry->state, __entry->res, 380e8a98235SRodrigo Siqueira __entry->async_update, __entry->allow_modeset) 381e8a98235SRodrigo Siqueira ); 382e8a98235SRodrigo Siqueira 3838b198f6eSRodrigo Siqueira TRACE_EVENT(amdgpu_dm_dc_pipe_state, 3848b198f6eSRodrigo Siqueira TP_PROTO(int pipe_idx, const struct dc_plane_state *plane_state, 3858b198f6eSRodrigo Siqueira const struct dc_stream_state *stream, 3868b198f6eSRodrigo Siqueira const struct plane_resource *plane_res, 3878b198f6eSRodrigo Siqueira int update_flags), 3888b198f6eSRodrigo Siqueira TP_ARGS(pipe_idx, plane_state, stream, plane_res, update_flags), 3898b198f6eSRodrigo Siqueira 3908b198f6eSRodrigo Siqueira TP_STRUCT__entry( 3918b198f6eSRodrigo Siqueira __field(int, pipe_idx) 3928b198f6eSRodrigo Siqueira __field(const void *, stream) 3938b198f6eSRodrigo Siqueira __field(int, stream_w) 3948b198f6eSRodrigo Siqueira __field(int, stream_h) 3958b198f6eSRodrigo Siqueira __field(int, dst_x) 3968b198f6eSRodrigo Siqueira __field(int, dst_y) 3978b198f6eSRodrigo Siqueira __field(int, dst_w) 3988b198f6eSRodrigo Siqueira __field(int, dst_h) 3998b198f6eSRodrigo Siqueira __field(int, src_x) 4008b198f6eSRodrigo Siqueira __field(int, src_y) 4018b198f6eSRodrigo Siqueira __field(int, src_w) 4028b198f6eSRodrigo Siqueira __field(int, src_h) 4038b198f6eSRodrigo Siqueira __field(int, clip_x) 4048b198f6eSRodrigo Siqueira __field(int, clip_y) 4058b198f6eSRodrigo Siqueira __field(int, clip_w) 4068b198f6eSRodrigo Siqueira __field(int, clip_h) 4078b198f6eSRodrigo Siqueira __field(int, recout_x) 4088b198f6eSRodrigo Siqueira __field(int, recout_y) 4098b198f6eSRodrigo Siqueira __field(int, recout_w) 4108b198f6eSRodrigo Siqueira __field(int, recout_h) 4118b198f6eSRodrigo Siqueira __field(int, viewport_x) 4128b198f6eSRodrigo Siqueira __field(int, viewport_y) 4138b198f6eSRodrigo Siqueira __field(int, viewport_w) 4148b198f6eSRodrigo Siqueira __field(int, viewport_h) 4158b198f6eSRodrigo Siqueira __field(int, flip_immediate) 4168b198f6eSRodrigo Siqueira __field(int, surface_pitch) 4178b198f6eSRodrigo Siqueira __field(int, format) 4188b198f6eSRodrigo Siqueira __field(int, swizzle) 4198b198f6eSRodrigo Siqueira __field(unsigned int, update_flags) 4208b198f6eSRodrigo Siqueira ), 4218b198f6eSRodrigo Siqueira 4228b198f6eSRodrigo Siqueira TP_fast_assign( 4238b198f6eSRodrigo Siqueira __entry->pipe_idx = pipe_idx; 4248b198f6eSRodrigo Siqueira __entry->stream = stream; 4258b198f6eSRodrigo Siqueira __entry->stream_w = stream->timing.h_addressable; 4268b198f6eSRodrigo Siqueira __entry->stream_h = stream->timing.v_addressable; 4278b198f6eSRodrigo Siqueira __entry->dst_x = plane_state->dst_rect.x; 4288b198f6eSRodrigo Siqueira __entry->dst_y = plane_state->dst_rect.y; 4298b198f6eSRodrigo Siqueira __entry->dst_w = plane_state->dst_rect.width; 4308b198f6eSRodrigo Siqueira __entry->dst_h = plane_state->dst_rect.height; 4318b198f6eSRodrigo Siqueira __entry->src_x = plane_state->src_rect.x; 4328b198f6eSRodrigo Siqueira __entry->src_y = plane_state->src_rect.y; 4338b198f6eSRodrigo Siqueira __entry->src_w = plane_state->src_rect.width; 4348b198f6eSRodrigo Siqueira __entry->src_h = plane_state->src_rect.height; 4358b198f6eSRodrigo Siqueira __entry->clip_x = plane_state->clip_rect.x; 4368b198f6eSRodrigo Siqueira __entry->clip_y = plane_state->clip_rect.y; 4378b198f6eSRodrigo Siqueira __entry->clip_w = plane_state->clip_rect.width; 4388b198f6eSRodrigo Siqueira __entry->clip_h = plane_state->clip_rect.height; 4398b198f6eSRodrigo Siqueira __entry->recout_x = plane_res->scl_data.recout.x; 4408b198f6eSRodrigo Siqueira __entry->recout_y = plane_res->scl_data.recout.y; 4418b198f6eSRodrigo Siqueira __entry->recout_w = plane_res->scl_data.recout.width; 4428b198f6eSRodrigo Siqueira __entry->recout_h = plane_res->scl_data.recout.height; 4438b198f6eSRodrigo Siqueira __entry->viewport_x = plane_res->scl_data.viewport.x; 4448b198f6eSRodrigo Siqueira __entry->viewport_y = plane_res->scl_data.viewport.y; 4458b198f6eSRodrigo Siqueira __entry->viewport_w = plane_res->scl_data.viewport.width; 4468b198f6eSRodrigo Siqueira __entry->viewport_h = plane_res->scl_data.viewport.height; 4478b198f6eSRodrigo Siqueira __entry->flip_immediate = plane_state->flip_immediate; 4488b198f6eSRodrigo Siqueira __entry->surface_pitch = plane_state->plane_size.surface_pitch; 4498b198f6eSRodrigo Siqueira __entry->format = plane_state->format; 4508b198f6eSRodrigo Siqueira __entry->swizzle = plane_state->tiling_info.gfx9.swizzle; 4518b198f6eSRodrigo Siqueira __entry->update_flags = update_flags; 4528b198f6eSRodrigo Siqueira ), 4538b198f6eSRodrigo Siqueira TP_printk("pipe_idx=%d stream=%p rct(%d,%d) dst=(%d,%d,%d,%d) " 4548b198f6eSRodrigo Siqueira "src=(%d,%d,%d,%d) clip=(%d,%d,%d,%d) recout=(%d,%d,%d,%d) " 4558b198f6eSRodrigo Siqueira "viewport=(%d,%d,%d,%d) flip_immediate=%d pitch=%d " 4568b198f6eSRodrigo Siqueira "format=%d swizzle=%d update_flags=%x", 4578b198f6eSRodrigo Siqueira __entry->pipe_idx, 4588b198f6eSRodrigo Siqueira __entry->stream, 4598b198f6eSRodrigo Siqueira __entry->stream_w, 4608b198f6eSRodrigo Siqueira __entry->stream_h, 4618b198f6eSRodrigo Siqueira __entry->dst_x, 4628b198f6eSRodrigo Siqueira __entry->dst_y, 4638b198f6eSRodrigo Siqueira __entry->dst_w, 4648b198f6eSRodrigo Siqueira __entry->dst_h, 4658b198f6eSRodrigo Siqueira __entry->src_x, 4668b198f6eSRodrigo Siqueira __entry->src_y, 4678b198f6eSRodrigo Siqueira __entry->src_w, 4688b198f6eSRodrigo Siqueira __entry->src_h, 4698b198f6eSRodrigo Siqueira __entry->clip_x, 4708b198f6eSRodrigo Siqueira __entry->clip_y, 4718b198f6eSRodrigo Siqueira __entry->clip_w, 4728b198f6eSRodrigo Siqueira __entry->clip_h, 4738b198f6eSRodrigo Siqueira __entry->recout_x, 4748b198f6eSRodrigo Siqueira __entry->recout_y, 4758b198f6eSRodrigo Siqueira __entry->recout_w, 4768b198f6eSRodrigo Siqueira __entry->recout_h, 4778b198f6eSRodrigo Siqueira __entry->viewport_x, 4788b198f6eSRodrigo Siqueira __entry->viewport_y, 4798b198f6eSRodrigo Siqueira __entry->viewport_w, 4808b198f6eSRodrigo Siqueira __entry->viewport_h, 4818b198f6eSRodrigo Siqueira __entry->flip_immediate, 4828b198f6eSRodrigo Siqueira __entry->surface_pitch, 4838b198f6eSRodrigo Siqueira __entry->format, 4848b198f6eSRodrigo Siqueira __entry->swizzle, 4858b198f6eSRodrigo Siqueira __entry->update_flags 4868b198f6eSRodrigo Siqueira ) 4878b198f6eSRodrigo Siqueira ); 4888b198f6eSRodrigo Siqueira 48913b5ca42SRodrigo Siqueira TRACE_EVENT(amdgpu_dm_dc_clocks_state, 49013b5ca42SRodrigo Siqueira TP_PROTO(const struct dc_clocks *clk), 49113b5ca42SRodrigo Siqueira TP_ARGS(clk), 49213b5ca42SRodrigo Siqueira 49313b5ca42SRodrigo Siqueira TP_STRUCT__entry( 49413b5ca42SRodrigo Siqueira __field(int, dispclk_khz) 49513b5ca42SRodrigo Siqueira __field(int, dppclk_khz) 49613b5ca42SRodrigo Siqueira __field(int, disp_dpp_voltage_level_khz) 49713b5ca42SRodrigo Siqueira __field(int, dcfclk_khz) 49813b5ca42SRodrigo Siqueira __field(int, socclk_khz) 49913b5ca42SRodrigo Siqueira __field(int, dcfclk_deep_sleep_khz) 50013b5ca42SRodrigo Siqueira __field(int, fclk_khz) 50113b5ca42SRodrigo Siqueira __field(int, phyclk_khz) 50213b5ca42SRodrigo Siqueira __field(int, dramclk_khz) 50313b5ca42SRodrigo Siqueira __field(int, p_state_change_support) 50413b5ca42SRodrigo Siqueira __field(int, prev_p_state_change_support) 50513b5ca42SRodrigo Siqueira __field(int, pwr_state) 50613b5ca42SRodrigo Siqueira __field(int, dtm_level) 50713b5ca42SRodrigo Siqueira __field(int, max_supported_dppclk_khz) 50813b5ca42SRodrigo Siqueira __field(int, max_supported_dispclk_khz) 50913b5ca42SRodrigo Siqueira __field(int, bw_dppclk_khz) 51013b5ca42SRodrigo Siqueira __field(int, bw_dispclk_khz) 51113b5ca42SRodrigo Siqueira ), 51213b5ca42SRodrigo Siqueira TP_fast_assign( 51313b5ca42SRodrigo Siqueira __entry->dispclk_khz = clk->dispclk_khz; 51413b5ca42SRodrigo Siqueira __entry->dppclk_khz = clk->dppclk_khz; 51513b5ca42SRodrigo Siqueira __entry->dcfclk_khz = clk->dcfclk_khz; 51613b5ca42SRodrigo Siqueira __entry->socclk_khz = clk->socclk_khz; 51713b5ca42SRodrigo Siqueira __entry->dcfclk_deep_sleep_khz = clk->dcfclk_deep_sleep_khz; 51813b5ca42SRodrigo Siqueira __entry->fclk_khz = clk->fclk_khz; 51913b5ca42SRodrigo Siqueira __entry->phyclk_khz = clk->phyclk_khz; 52013b5ca42SRodrigo Siqueira __entry->dramclk_khz = clk->dramclk_khz; 52113b5ca42SRodrigo Siqueira __entry->p_state_change_support = clk->p_state_change_support; 52213b5ca42SRodrigo Siqueira __entry->prev_p_state_change_support = clk->prev_p_state_change_support; 52313b5ca42SRodrigo Siqueira __entry->pwr_state = clk->pwr_state; 52413b5ca42SRodrigo Siqueira __entry->prev_p_state_change_support = clk->prev_p_state_change_support; 52513b5ca42SRodrigo Siqueira __entry->dtm_level = clk->dtm_level; 52613b5ca42SRodrigo Siqueira __entry->max_supported_dppclk_khz = clk->max_supported_dppclk_khz; 52713b5ca42SRodrigo Siqueira __entry->max_supported_dispclk_khz = clk->max_supported_dispclk_khz; 52813b5ca42SRodrigo Siqueira __entry->bw_dppclk_khz = clk->bw_dppclk_khz; 52913b5ca42SRodrigo Siqueira __entry->bw_dispclk_khz = clk->bw_dispclk_khz; 53013b5ca42SRodrigo Siqueira ), 53113b5ca42SRodrigo Siqueira TP_printk("dispclk_khz=%d dppclk_khz=%d disp_dpp_voltage_level_khz=%d dcfclk_khz=%d socclk_khz=%d " 53213b5ca42SRodrigo Siqueira "dcfclk_deep_sleep_khz=%d fclk_khz=%d phyclk_khz=%d " 53313b5ca42SRodrigo Siqueira "dramclk_khz=%d p_state_change_support=%d " 53413b5ca42SRodrigo Siqueira "prev_p_state_change_support=%d pwr_state=%d prev_p_state_change_support=%d " 53513b5ca42SRodrigo Siqueira "dtm_level=%d max_supported_dppclk_khz=%d max_supported_dispclk_khz=%d " 53613b5ca42SRodrigo Siqueira "bw_dppclk_khz=%d bw_dispclk_khz=%d ", 53713b5ca42SRodrigo Siqueira __entry->dispclk_khz, 53813b5ca42SRodrigo Siqueira __entry->dppclk_khz, 53913b5ca42SRodrigo Siqueira __entry->disp_dpp_voltage_level_khz, 54013b5ca42SRodrigo Siqueira __entry->dcfclk_khz, 54113b5ca42SRodrigo Siqueira __entry->socclk_khz, 54213b5ca42SRodrigo Siqueira __entry->dcfclk_deep_sleep_khz, 54313b5ca42SRodrigo Siqueira __entry->fclk_khz, 54413b5ca42SRodrigo Siqueira __entry->phyclk_khz, 54513b5ca42SRodrigo Siqueira __entry->dramclk_khz, 54613b5ca42SRodrigo Siqueira __entry->p_state_change_support, 54713b5ca42SRodrigo Siqueira __entry->prev_p_state_change_support, 54813b5ca42SRodrigo Siqueira __entry->pwr_state, 54913b5ca42SRodrigo Siqueira __entry->prev_p_state_change_support, 55013b5ca42SRodrigo Siqueira __entry->dtm_level, 55113b5ca42SRodrigo Siqueira __entry->max_supported_dppclk_khz, 55213b5ca42SRodrigo Siqueira __entry->max_supported_dispclk_khz, 55313b5ca42SRodrigo Siqueira __entry->bw_dppclk_khz, 55413b5ca42SRodrigo Siqueira __entry->bw_dispclk_khz 55513b5ca42SRodrigo Siqueira ) 55613b5ca42SRodrigo Siqueira ); 55713b5ca42SRodrigo Siqueira 55813b5ca42SRodrigo Siqueira TRACE_EVENT(amdgpu_dm_dce_clocks_state, 55913b5ca42SRodrigo Siqueira TP_PROTO(const struct dce_bw_output *clk), 56013b5ca42SRodrigo Siqueira TP_ARGS(clk), 56113b5ca42SRodrigo Siqueira 56213b5ca42SRodrigo Siqueira TP_STRUCT__entry( 56313b5ca42SRodrigo Siqueira __field(bool, cpuc_state_change_enable) 56413b5ca42SRodrigo Siqueira __field(bool, cpup_state_change_enable) 56513b5ca42SRodrigo Siqueira __field(bool, stutter_mode_enable) 56613b5ca42SRodrigo Siqueira __field(bool, nbp_state_change_enable) 56713b5ca42SRodrigo Siqueira __field(bool, all_displays_in_sync) 56813b5ca42SRodrigo Siqueira __field(int, sclk_khz) 56913b5ca42SRodrigo Siqueira __field(int, sclk_deep_sleep_khz) 57013b5ca42SRodrigo Siqueira __field(int, yclk_khz) 57113b5ca42SRodrigo Siqueira __field(int, dispclk_khz) 57213b5ca42SRodrigo Siqueira __field(int, blackout_recovery_time_us) 57313b5ca42SRodrigo Siqueira ), 57413b5ca42SRodrigo Siqueira TP_fast_assign( 57513b5ca42SRodrigo Siqueira __entry->cpuc_state_change_enable = clk->cpuc_state_change_enable; 57613b5ca42SRodrigo Siqueira __entry->cpup_state_change_enable = clk->cpup_state_change_enable; 57713b5ca42SRodrigo Siqueira __entry->stutter_mode_enable = clk->stutter_mode_enable; 57813b5ca42SRodrigo Siqueira __entry->nbp_state_change_enable = clk->nbp_state_change_enable; 57913b5ca42SRodrigo Siqueira __entry->all_displays_in_sync = clk->all_displays_in_sync; 58013b5ca42SRodrigo Siqueira __entry->sclk_khz = clk->sclk_khz; 58113b5ca42SRodrigo Siqueira __entry->sclk_deep_sleep_khz = clk->sclk_deep_sleep_khz; 58213b5ca42SRodrigo Siqueira __entry->yclk_khz = clk->yclk_khz; 58313b5ca42SRodrigo Siqueira __entry->dispclk_khz = clk->dispclk_khz; 58413b5ca42SRodrigo Siqueira __entry->blackout_recovery_time_us = clk->blackout_recovery_time_us; 58513b5ca42SRodrigo Siqueira ), 58613b5ca42SRodrigo Siqueira TP_printk("cpuc_state_change_enable=%d cpup_state_change_enable=%d stutter_mode_enable=%d " 58713b5ca42SRodrigo Siqueira "nbp_state_change_enable=%d all_displays_in_sync=%d sclk_khz=%d sclk_deep_sleep_khz=%d " 58813b5ca42SRodrigo Siqueira "yclk_khz=%d dispclk_khz=%d blackout_recovery_time_us=%d", 58913b5ca42SRodrigo Siqueira __entry->cpuc_state_change_enable, 59013b5ca42SRodrigo Siqueira __entry->cpup_state_change_enable, 59113b5ca42SRodrigo Siqueira __entry->stutter_mode_enable, 59213b5ca42SRodrigo Siqueira __entry->nbp_state_change_enable, 59313b5ca42SRodrigo Siqueira __entry->all_displays_in_sync, 59413b5ca42SRodrigo Siqueira __entry->sclk_khz, 59513b5ca42SRodrigo Siqueira __entry->sclk_deep_sleep_khz, 59613b5ca42SRodrigo Siqueira __entry->yclk_khz, 59713b5ca42SRodrigo Siqueira __entry->dispclk_khz, 59813b5ca42SRodrigo Siqueira __entry->blackout_recovery_time_us 59913b5ca42SRodrigo Siqueira ) 60013b5ca42SRodrigo Siqueira ); 60113b5ca42SRodrigo Siqueira 602a08f16cfSLeo (Hanghong) Ma TRACE_EVENT(amdgpu_dmub_trace_high_irq, 603a08f16cfSLeo (Hanghong) Ma TP_PROTO(uint32_t trace_code, uint32_t tick_count, uint32_t param0, 604a08f16cfSLeo (Hanghong) Ma uint32_t param1), 605a08f16cfSLeo (Hanghong) Ma TP_ARGS(trace_code, tick_count, param0, param1), 606a08f16cfSLeo (Hanghong) Ma TP_STRUCT__entry( 607a08f16cfSLeo (Hanghong) Ma __field(uint32_t, trace_code) 608a08f16cfSLeo (Hanghong) Ma __field(uint32_t, tick_count) 609a08f16cfSLeo (Hanghong) Ma __field(uint32_t, param0) 610a08f16cfSLeo (Hanghong) Ma __field(uint32_t, param1) 611a08f16cfSLeo (Hanghong) Ma ), 612a08f16cfSLeo (Hanghong) Ma TP_fast_assign( 613a08f16cfSLeo (Hanghong) Ma __entry->trace_code = trace_code; 614a08f16cfSLeo (Hanghong) Ma __entry->tick_count = tick_count; 615a08f16cfSLeo (Hanghong) Ma __entry->param0 = param0; 616a08f16cfSLeo (Hanghong) Ma __entry->param1 = param1; 617a08f16cfSLeo (Hanghong) Ma ), 618a08f16cfSLeo (Hanghong) Ma TP_printk("trace_code=%u tick_count=%u param0=%u param1=%u", 619a08f16cfSLeo (Hanghong) Ma __entry->trace_code, __entry->tick_count, 620a08f16cfSLeo (Hanghong) Ma __entry->param0, __entry->param1) 621a08f16cfSLeo (Hanghong) Ma ); 622a08f16cfSLeo (Hanghong) Ma 62347588233SRodrigo Siqueira TRACE_EVENT(amdgpu_refresh_rate_track, 62447588233SRodrigo Siqueira TP_PROTO(int crtc_index, ktime_t refresh_rate_ns, uint32_t refresh_rate_hz), 62547588233SRodrigo Siqueira TP_ARGS(crtc_index, refresh_rate_ns, refresh_rate_hz), 62647588233SRodrigo Siqueira TP_STRUCT__entry( 62747588233SRodrigo Siqueira __field(int, crtc_index) 62847588233SRodrigo Siqueira __field(ktime_t, refresh_rate_ns) 62947588233SRodrigo Siqueira __field(uint32_t, refresh_rate_hz) 63047588233SRodrigo Siqueira ), 63147588233SRodrigo Siqueira TP_fast_assign( 63247588233SRodrigo Siqueira __entry->crtc_index = crtc_index; 63347588233SRodrigo Siqueira __entry->refresh_rate_ns = refresh_rate_ns; 63447588233SRodrigo Siqueira __entry->refresh_rate_hz = refresh_rate_hz; 63547588233SRodrigo Siqueira ), 63647588233SRodrigo Siqueira TP_printk("crtc_index=%d refresh_rate=%dHz (%lld)", 63747588233SRodrigo Siqueira __entry->crtc_index, 63847588233SRodrigo Siqueira __entry->refresh_rate_hz, 63947588233SRodrigo Siqueira __entry->refresh_rate_ns) 64047588233SRodrigo Siqueira ); 64147588233SRodrigo Siqueira 64296ee6373SRodrigo Siqueira TRACE_EVENT(dcn_fpu, 6432d8471dcSRodrigo Siqueira TP_PROTO(bool begin, const char *function, const int line, const int recursion_depth), 6442d8471dcSRodrigo Siqueira TP_ARGS(begin, function, line, recursion_depth), 64596ee6373SRodrigo Siqueira 64696ee6373SRodrigo Siqueira TP_STRUCT__entry( 64796ee6373SRodrigo Siqueira __field(bool, begin) 64896ee6373SRodrigo Siqueira __field(const char *, function) 64996ee6373SRodrigo Siqueira __field(int, line) 6502d8471dcSRodrigo Siqueira __field(int, recursion_depth) 65196ee6373SRodrigo Siqueira ), 65296ee6373SRodrigo Siqueira TP_fast_assign( 65396ee6373SRodrigo Siqueira __entry->begin = begin; 65496ee6373SRodrigo Siqueira __entry->function = function; 65596ee6373SRodrigo Siqueira __entry->line = line; 6562d8471dcSRodrigo Siqueira __entry->recursion_depth = recursion_depth; 65796ee6373SRodrigo Siqueira ), 6582d8471dcSRodrigo Siqueira TP_printk("%s: recursion_depth: %d: %s()+%d:", 6592d8471dcSRodrigo Siqueira __entry->begin ? "begin" : "end", 6602d8471dcSRodrigo Siqueira __entry->recursion_depth, 66196ee6373SRodrigo Siqueira __entry->function, 6622d8471dcSRodrigo Siqueira __entry->line 66396ee6373SRodrigo Siqueira ) 66496ee6373SRodrigo Siqueira ); 66596ee6373SRodrigo Siqueira 666*f1943a51SRodrigo Siqueira TRACE_EVENT(dcn_optc_lock_unlock_state, 667*f1943a51SRodrigo Siqueira TP_PROTO(const struct optc *optc_state, int instance, bool lock, const char *function, const int line), 668*f1943a51SRodrigo Siqueira TP_ARGS(optc_state, instance, lock, function, line), 669*f1943a51SRodrigo Siqueira 670*f1943a51SRodrigo Siqueira TP_STRUCT__entry( 671*f1943a51SRodrigo Siqueira __field(const char *, function) 672*f1943a51SRodrigo Siqueira __field(int, instance) 673*f1943a51SRodrigo Siqueira __field(bool, lock) 674*f1943a51SRodrigo Siqueira __field(int, line) 675*f1943a51SRodrigo Siqueira __field(int, opp_count) 676*f1943a51SRodrigo Siqueira __field(int, max_h_total) 677*f1943a51SRodrigo Siqueira __field(int, max_v_total) 678*f1943a51SRodrigo Siqueira __field(int, min_h_blank) 679*f1943a51SRodrigo Siqueira __field(int, min_h_sync_width) 680*f1943a51SRodrigo Siqueira __field(int, min_v_sync_width) 681*f1943a51SRodrigo Siqueira __field(int, min_v_blank) 682*f1943a51SRodrigo Siqueira __field(int, min_v_blank_interlace) 683*f1943a51SRodrigo Siqueira __field(int, vstartup_start) 684*f1943a51SRodrigo Siqueira __field(int, vupdate_offset) 685*f1943a51SRodrigo Siqueira __field(int, vupdate_width) 686*f1943a51SRodrigo Siqueira __field(int, vready_offset) 687*f1943a51SRodrigo Siqueira ), 688*f1943a51SRodrigo Siqueira TP_fast_assign( 689*f1943a51SRodrigo Siqueira __entry->function = function; 690*f1943a51SRodrigo Siqueira __entry->instance = instance; 691*f1943a51SRodrigo Siqueira __entry->lock = lock; 692*f1943a51SRodrigo Siqueira __entry->line = line; 693*f1943a51SRodrigo Siqueira __entry->opp_count = optc_state->opp_count; 694*f1943a51SRodrigo Siqueira __entry->max_h_total = optc_state->max_h_total; 695*f1943a51SRodrigo Siqueira __entry->max_v_total = optc_state->max_v_total; 696*f1943a51SRodrigo Siqueira __entry->min_h_blank = optc_state->min_h_blank; 697*f1943a51SRodrigo Siqueira __entry->min_h_sync_width = optc_state->min_h_sync_width; 698*f1943a51SRodrigo Siqueira __entry->min_v_sync_width = optc_state->min_v_sync_width; 699*f1943a51SRodrigo Siqueira __entry->min_v_blank = optc_state->min_v_blank; 700*f1943a51SRodrigo Siqueira __entry->min_v_blank_interlace = optc_state->min_v_blank_interlace; 701*f1943a51SRodrigo Siqueira __entry->vstartup_start = optc_state->vstartup_start; 702*f1943a51SRodrigo Siqueira __entry->vupdate_offset = optc_state->vupdate_offset; 703*f1943a51SRodrigo Siqueira __entry->vupdate_width = optc_state->vupdate_width; 704*f1943a51SRodrigo Siqueira __entry->vready_offset = optc_state->vupdate_offset; 705*f1943a51SRodrigo Siqueira ), 706*f1943a51SRodrigo Siqueira TP_printk("%s: %s()+%d: optc_instance=%d opp_count=%d max_h_total=%d max_v_total=%d " 707*f1943a51SRodrigo Siqueira "min_h_blank=%d min_h_sync_width=%d min_v_sync_width=%d min_v_blank=%d " 708*f1943a51SRodrigo Siqueira "min_v_blank_interlace=%d vstartup_start=%d vupdate_offset=%d vupdate_width=%d " 709*f1943a51SRodrigo Siqueira "vready_offset=%d", 710*f1943a51SRodrigo Siqueira __entry->lock ? "Lock" : "Unlock", 711*f1943a51SRodrigo Siqueira __entry->function, 712*f1943a51SRodrigo Siqueira __entry->line, 713*f1943a51SRodrigo Siqueira __entry->instance, 714*f1943a51SRodrigo Siqueira __entry->opp_count, 715*f1943a51SRodrigo Siqueira __entry->max_h_total, 716*f1943a51SRodrigo Siqueira __entry->max_v_total, 717*f1943a51SRodrigo Siqueira __entry->min_h_blank, 718*f1943a51SRodrigo Siqueira __entry->min_h_sync_width, 719*f1943a51SRodrigo Siqueira __entry->min_v_sync_width, 720*f1943a51SRodrigo Siqueira __entry->min_v_blank, 721*f1943a51SRodrigo Siqueira __entry->min_v_blank_interlace, 722*f1943a51SRodrigo Siqueira __entry->vstartup_start, 723*f1943a51SRodrigo Siqueira __entry->vupdate_offset, 724*f1943a51SRodrigo Siqueira __entry->vupdate_width, 725*f1943a51SRodrigo Siqueira __entry->vready_offset 726*f1943a51SRodrigo Siqueira ) 727*f1943a51SRodrigo Siqueira ); 728*f1943a51SRodrigo Siqueira 7290cf5eb76SDavid Francis #endif /* _AMDGPU_DM_TRACE_H_ */ 7300cf5eb76SDavid Francis 7310cf5eb76SDavid Francis #undef TRACE_INCLUDE_PATH 7320cf5eb76SDavid Francis #define TRACE_INCLUDE_PATH . 7330cf5eb76SDavid Francis #define TRACE_INCLUDE_FILE amdgpu_dm_trace 7340cf5eb76SDavid Francis #include <trace/define_trace.h> 735