Searched refs:phycr (Results 1 – 9 of 9) sorted by relevance
| /openbmc/u-boot/drivers/net/ |
| H A D | aspeed_mdio.c | 54 unsigned int phycr; member
62 u32 phycr; in aspeed_mdio_read() local
66 phycr = FTGMAC100_PHYCR_NEW_FIRE | FTGMAC100_PHYCR_ST_22 | FTGMAC100_PHYCR_NEW_READ | in aspeed_mdio_read()
70 writel(phycr, &mdio_regs->phycr); in aspeed_mdio_read()
74 phycr = readl(&mdio_regs->phycr); in aspeed_mdio_read()
76 if ((phycr & FTGMAC100_PHYCR_NEW_FIRE) == 0) { in aspeed_mdio_read()
86 phycr = readl(&mdio_regs->phycr); in aspeed_mdio_read()
91 phycr = FTGMAC100_PHYCR_PHYAD(addr) in aspeed_mdio_read()
95 writel(phycr, &mdio_regs->phycr); in aspeed_mdio_read()
98 phycr = readl(&mdio_regs->phycr); in aspeed_mdio_read()
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| H A D | ftgmac100.c | 105 int phycr; in ftgmac100_mdio_read() local
109 phycr = FTGMAC100_PHYCR_MDC_CYCTHR(MDC_CYCTHR) | in ftgmac100_mdio_read()
113 writel(phycr, &ftgmac100->phycr); in ftgmac100_mdio_read()
115 ret = readl_poll_timeout(&ftgmac100->phycr, phycr, in ftgmac100_mdio_read()
116 !(phycr & FTGMAC100_PHYCR_MIIRD), in ftgmac100_mdio_read()
134 int phycr; in ftgmac100_mdio_write() local
138 phycr = FTGMAC100_PHYCR_MDC_CYCTHR(MDC_CYCTHR) | in ftgmac100_mdio_write()
145 writel(phycr, &ftgmac100->phycr); in ftgmac100_mdio_write()
147 ret = readl_poll_timeout(&ftgmac100->phycr, phycr, in ftgmac100_mdio_write()
148 !(phycr & FTGMAC100_PHYCR_MIIWR), in ftgmac100_mdio_write()
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| H A D | ftmac110.c | 79 writel(tmp, ®s->phycr); in mdio_read()
82 tmp = readl(®s->phycr); in mdio_read()
108 writel(tmp, ®s->phycr); in mdio_write()
111 if (readl(®s->phycr) & PHYCR_WRITE) in mdio_write()
116 if (readl(®s->phycr) & PHYCR_WRITE) in mdio_write()
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| H A D | ftmac100.h | 31 unsigned int phycr; /* 0x90 */ member
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| H A D | ftmac110.h | 29 uint32_t phycr; /* 0x90: PHY Control Register */ member
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| H A D | ftgmac100.h | 41 unsigned int phycr; /* 0x60 */ member
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| /openbmc/qemu/hw/net/ |
| H A D | ftgmac100.c | 424 if (!(s->phycr & FTGMAC100_PHYCR_NEW_ST_22)) { in do_phy_new_ctl()
430 if (!(s->phycr & FTGMAC100_PHYCR_NEW_FIRE)) { in do_phy_new_ctl()
434 reg = FTGMAC100_PHYCR_NEW_REG(s->phycr); in do_phy_new_ctl()
435 data = FTGMAC100_PHYCR_NEW_DATA(s->phycr); in do_phy_new_ctl()
437 switch (FTGMAC100_PHYCR_NEW_OP(s->phycr)) { in do_phy_new_ctl()
446 __func__, s->phycr); in do_phy_new_ctl()
449 s->phycr &= ~FTGMAC100_PHYCR_NEW_FIRE; in do_phy_new_ctl()
454 uint8_t reg = FTGMAC100_PHYCR_REG(s->phycr); in do_phy_ctl()
456 if (s->phycr & FTGMAC100_PHYCR_MIIWR) { in do_phy_ctl()
458 s->phycr &= ~FTGMAC100_PHYCR_MIIWR; in do_phy_ctl()
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| /openbmc/qemu/include/hw/net/ |
| H A D | ftgmac100.h | 57 uint32_t phycr; member
90 uint32_t phycr; member
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| /openbmc/u-boot/drivers/ata/ |
| H A D | dwc_ahsata.c | 44 u32 phycr; member
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