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/openbmc/qemu/linux-user/arm/nwfpe/
H A Dfpopcode.h204 #define getOffset(opcode) (opcode & MASK_OFFSET) argument
212 #define LDF_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
213 #define LFM_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument
214 #define STF_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
215 #define SFM_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument
222 #define LOAD(opcode) ((opcode & BIT_LOAD) != 0) argument
223 #define STORE(opcode) ((opcode & BIT_LOAD) == 0) argument
348 #define getCondition(opcode) (opcode >> 28) argument
357 #define getFn(opcode) ((opcode & MASK_Fn) >> 16) argument
360 #define getFm(opcode) (opcode & MASK_Fm) argument
[all …]
H A Dfpa11_cpdt.c231 if (BIT_UP_SET(opcode)) in PerformLDF()
267 if (BIT_UP_SET(opcode)) in PerformSTF()
300 if (BIT_UP_SET(opcode)) in PerformLFM()
307 Fd = getFd(opcode); in PerformLFM()
333 if (BIT_UP_SET(opcode)) in PerformSFM()
340 Fd = getFd(opcode); in PerformSFM()
359 if (LDF_OP(opcode)) in EmulateCPDT()
361 nRc = PerformLDF(opcode); in EmulateCPDT()
363 else if (LFM_OP(opcode)) in EmulateCPDT()
367 else if (STF_OP(opcode)) in EmulateCPDT()
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H A Dfpa11_cprt.c42 if (opcode & 0x800000) in EmulateCPRT()
48 return PerformComparison(opcode); in EmulateCPRT()
52 switch ((opcode & 0x700000) >> 20) in EmulateCPRT()
77 SetRoundingMode(opcode); in PerformFLT()
115 unsigned int Fn = getFm(opcode); in PerformFIX()
117 SetRoundingMode(opcode); in PerformFIX()
123 writeRegister(getRd(opcode), in PerformFIX()
131 writeRegister(getRd(opcode), in PerformFIX()
191 Fn = getFn(opcode); in PerformComparison()
192 Fm = getFm(opcode); in PerformComparison()
[all …]
H A Dfpa11.c147 cp = (opcode >> 8) & 0xf; in EmulateAll()
157 opcode, qregs[ARM_REG_PC]); in EmulateAll()
171 if (TEST_OPCODE(opcode,MASK_CPRT)) in EmulateAll()
177 nRc = EmulateCPRT(opcode); in EmulateAll()
184 nRc = EmulateCPDO(opcode); in EmulateAll()
191 nRc = EmulateCPDT(opcode); in EmulateAll()
213 switch ((opcode >> 24) & 0xf)
217 if ((opcode >> 20) & 0x1)
238 if (opcode & 0x10)
239 return EmulateCPDO(opcode);
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/openbmc/linux/arch/arm/nwfpe/
H A Dfpopcode.h195 #define getOffset(opcode) (opcode & MASK_OFFSET) argument
203 #define LDF_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
204 #define LFM_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument
205 #define STF_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
206 #define SFM_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument
213 #define LOAD(opcode) ((opcode & BIT_LOAD) != 0) argument
214 #define STORE(opcode) ((opcode & BIT_LOAD) == 0) argument
339 #define getCondition(opcode) (opcode >> 28) argument
348 #define getFn(opcode) ((opcode & MASK_Fn) >> 16) argument
351 #define getFm(opcode) (opcode & MASK_Fm) argument
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H A Dfpa11_cpdt.c224 if (BIT_UP_SET(opcode)) in PerformLDF()
229 if (PREINDEXED(opcode)) in PerformLDF()
272 if (BIT_UP_SET(opcode)) in PerformSTF()
277 if (PREINDEXED(opcode)) in PerformSTF()
318 if (BIT_UP_SET(opcode)) in PerformLFM()
323 if (PREINDEXED(opcode)) in PerformLFM()
328 Fd = getFd(opcode); in PerformLFM()
354 if (BIT_UP_SET(opcode)) in PerformSFM()
359 if (PREINDEXED(opcode)) in PerformSFM()
364 Fd = getFd(opcode); in PerformSFM()
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H A Dfpa11_cprt.c26 if (opcode & 0x800000) { in EmulateCPRT()
31 return PerformComparison(opcode); in EmulateCPRT()
37 return PerformFLT(opcode); in EmulateCPRT()
40 return PerformFIX(opcode); in EmulateCPRT()
70 fpa11->fpreg[getFn(opcode)].fSingle = int32_to_float32(&roundData, readRegister(getRd(opcode))); in PerformFLT()
77 fpa11->fpreg[getFn(opcode)].fDouble = int32_to_float64(readRegister(getRd(opcode))); in PerformFLT()
85 fpa11->fpreg[getFn(opcode)].fExtended = int32_to_floatx80(readRegister(getRd(opcode))); in PerformFLT()
103 unsigned int Fn = getFm(opcode); in PerformFIX()
145 unsigned int Fn = getFn(opcode), Fm = getFm(opcode); in PerformComparison()
184 if (CONSTANT_FM(opcode)) { in PerformComparison()
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H A Dfpa11_cpdo.c27 nDest = getDestinationSize(opcode); in EmulateCPDO()
31 roundData.mode = SetRoundingMode(opcode); in EmulateCPDO()
40 if (MONADIC_INSTRUCTION(opcode)) in EmulateCPDO()
43 nType = fpa11->fType[getFn(opcode)]; in EmulateCPDO()
45 if (!CONSTANT_FM(opcode)) { in EmulateCPDO()
46 register unsigned int Fm = getFm(opcode); in EmulateCPDO()
52 rFd = &fpa11->fpreg[getFd(opcode)]; in EmulateCPDO()
56 nRc = SingleCPDO(&roundData, opcode, rFd); in EmulateCPDO()
59 nRc = DoubleCPDO(&roundData, opcode, rFd); in EmulateCPDO()
63 nRc = ExtendedCPDO(&roundData, opcode, rFd); in EmulateCPDO()
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H A Dfpa11.c35 int8 SetRoundingMode(const unsigned int opcode) in SetRoundingMode() argument
37 switch (opcode & MASK_ROUNDING_MODE) { in SetRoundingMode()
56 switch (opcode & MASK_ROUNDING_PRECISION) { in SetRoundingPrecision()
85 unsigned int EmulateAll(unsigned int opcode) in EmulateAll() argument
90 printk("NWFPE: emulating opcode %08x\n", opcode); in EmulateAll()
92 code = opcode & 0x00000f00; in EmulateAll()
95 code = opcode & 0x0e000000; in EmulateAll()
97 if (opcode & 0x00000010) { in EmulateAll()
101 return EmulateCPRT(opcode); in EmulateAll()
105 return EmulateCPDO(opcode); in EmulateAll()
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H A Dfpa11.h85 extern unsigned int EmulateAll(unsigned int opcode);
87 extern unsigned int EmulateCPDT(const unsigned int opcode);
88 extern unsigned int EmulateCPDO(const unsigned int opcode);
89 extern unsigned int EmulateCPRT(const unsigned int opcode);
92 extern unsigned int PerformLDF(const unsigned int opcode);
93 extern unsigned int PerformSTF(const unsigned int opcode);
94 extern unsigned int PerformLFM(const unsigned int opcode);
95 extern unsigned int PerformSFM(const unsigned int opcode);
100 const unsigned int opcode, FPREG * rFd);
103 const unsigned int opcode, FPREG * rFd);
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/openbmc/linux/arch/riscv/kernel/probes/
H A Dsimulate-insn.c87 #define auipc_rd_idx(opcode) \ argument
88 ((opcode >> 7) & 0x1f)
90 #define auipc_imm(opcode) \ argument
94 #define auipc_offset(opcode) sign_extend64(auipc_imm(opcode), 31) argument
96 #define auipc_offset(opcode) auipc_imm(opcode) argument
122 (((opcode) >> 15) & 0x1f)
125 (((opcode) >> 20) & 0x1f)
127 #define branch_funct3(opcode) \ argument
128 (((opcode) >> 12) & 0x7)
130 #define branch_imm(opcode) \ argument
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/openbmc/linux/arch/arm64/kernel/probes/
H A Dsimulate-insn.c54 int xn = opcode & 0x1f; in check_cbz()
62 int xn = opcode & 0x1f; in check_cbnz()
70 int xn = opcode & 0x1f; in check_tbz()
71 int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f); in check_tbz()
78 int xn = opcode & 0x1f; in check_tbnz()
79 int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f); in check_tbnz()
92 xn = opcode & 0x1f; in simulate_adr_adrp()
93 imm = ((opcode >> 3) & 0x1ffffc) | ((opcode >> 29) & 0x3); in simulate_adr_adrp()
95 if (opcode & 0x80000000) in simulate_adr_adrp()
111 if (opcode & (1 << 31)) in simulate_b_bl()
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/openbmc/linux/arch/csky/kernel/probes/
H A Dsimulate-insn.c135 unsigned long tmp = opcode & 0x1f; in simulate_jmp32()
157 unsigned long tmp = opcode & 0x1f; in simulate_jsr32()
173 tmp = (opcode & 0xe0) >> 5; in simulate_lrw16()
204 if (opcode & 0x10) { in simulate_pop16()
225 if (opcode & 0x100000) { in simulate_pop32()
235 if (opcode & 0x1000000) { in simulate_pop32()
248 unsigned long tmp = opcode & 0x1f; in simulate_bez32()
262 unsigned long tmp = opcode & 0x1f; in simulate_bnez32()
276 unsigned long tmp = opcode & 0x1f; in simulate_bnezad32()
295 unsigned long tmp = opcode & 0x1f; in simulate_bhsz32()
[all …]
/openbmc/linux/tools/perf/scripts/python/
H A Dpowerpc-hcalls.py154 if (opcode in hcall_table):
155 return hcall_table[opcode]
157 return opcode
164 for opcode in output:
167 cnt = output[opcode]['cnt']
174 opcode, retval): argument
178 if (opcode in output):
180 output[opcode]['cnt'] += 1
186 output[opcode] = {
193 del d_enter[cpu][opcode]
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/openbmc/qemu/target/hexagon/
H A Diclass.c35 if (GET_ATTRIB(opcode, A_ICOP)) { in find_iclass_slots()
45 } else if (GET_ATTRIB(opcode, A_COF) && in find_iclass_slots()
46 GET_ATTRIB(opcode, A_INDIRECT) && in find_iclass_slots()
47 !GET_ATTRIB(opcode, A_MEMLIKE) && in find_iclass_slots()
52 } else if ((opcode == J2_trap0) || in find_iclass_slots()
53 (opcode == Y2_isync) || in find_iclass_slots()
54 (opcode == J2_pause)) { in find_iclass_slots()
56 } else if (opcode == J4_hintjumpr) { in find_iclass_slots()
62 } else if (GET_ATTRIB(opcode, A_SUBINSN)) { in find_iclass_slots()
64 } else if (GET_ATTRIB(opcode, A_CALL)) { in find_iclass_slots()
[all …]
H A Ddecode.c58 Opcode opcode; member
365 (opcode == J2_trap0) || in decode_opcode_can_jump()
366 (opcode == J2_pause)) { in decode_opcode_can_jump()
368 if (opcode == J4_hintjumpr) { in decode_opcode_can_jump()
388 uint16_t opcode; in decode_set_insn_attr_fields() local
396 opcode = pkt->insn[i].opcode; in decode_set_insn_attr_fields()
467 int opcode = packet->insn[i].opcode; in decode_shuffle_for_execution() local
496 int opcode = packet->insn[i].opcode; in decode_shuffle_for_execution() local
652 insn->opcode = tag; in decode_op()
784 insn->opcode = J2_endloop1; in decode_add_endloop_insn()
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/openbmc/linux/include/trace/events/
H A Dspmi.h17 TP_ARGS(opcode, sid, addr, len, buf),
20 __field ( u8, opcode )
28 __entry->opcode = opcode;
43 TP_ARGS(opcode, sid, addr, ret),
46 __field ( u8, opcode )
53 __entry->opcode = opcode;
66 TP_ARGS(opcode, sid, addr),
75 __entry->opcode = opcode;
99 __entry->opcode = opcode;
115 TP_ARGS(opcode, sid, ret),
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/openbmc/u-boot/post/lib_powerpc/
H A Dcpu_asm.h112 #define ASM_0(opcode) (opcode) argument
113 #define ASM_1(opcode, rd) ((opcode) + \ argument
115 #define ASM_1C(opcode, cr) ((opcode) + \ argument
117 #define ASM_11(opcode, rd, rs) ((opcode) + \ argument
120 #define ASM_11C(opcode, cd, cs) ((opcode) + \ argument
123 #define ASM_11X(opcode, rd, rs) ((opcode) + \ argument
134 #define ASM_11S(opcode, rd, rs, sh) ((opcode) + \ argument
142 #define ASM_12(opcode, rd, rs1, rs2) ((opcode) + \ argument
154 #define ASM_2C(opcode, cr, rs1, rs2) ((opcode) + \ argument
176 #define ASM_1O(opcode, off) ((opcode) + (off)) argument
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/openbmc/qemu/target/hexagon/mmvec/
H A Ddecode_ext_mmvec.c39 uint16_t use_opcode = pkt->insn[i].opcode; in check_new_value()
150 uint16_t opcode = pkt->insn[i].opcode; in decode_shuffle_for_execution_vops() local
151 if ((GET_ATTRIB(opcode, A_LOAD) && in decode_shuffle_for_execution_vops()
152 GET_ATTRIB(opcode, A_CVI_NEW)) || in decode_shuffle_for_execution_vops()
153 GET_ATTRIB(opcode, A_CVI_TMP)) { in decode_shuffle_for_execution_vops()
165 uint16_t opcode = pkt->insn[i].opcode; in decode_shuffle_for_execution_vops() local
166 if (GET_ATTRIB(opcode, A_STORE) && in decode_shuffle_for_execution_vops()
167 GET_ATTRIB(opcode, A_CVI_NEW) && in decode_shuffle_for_execution_vops()
194 int opcode = insn->opcode; in check_for_vhist() local
195 if (GET_ATTRIB(opcode, A_CVI) && GET_ATTRIB(opcode, A_CVI_4SLOT)) { in check_for_vhist()
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/openbmc/qemu/target/ppc/translate/
H A Dspe-impl.c.inc28 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
29 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]);
65 tcg_op(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], \
220 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gprh[rB(ctx->opcode)]);
221 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]);
307 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
308 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
316 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
325 if (rD(ctx->opcode) == rA(ctx->opcode)) {
377 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
[all …]
/openbmc/linux/arch/x86/mm/
H A Dpf_in.c112 *opcode = *addr; in get_opcode()
129 unsigned int opcode; in get_ins_type() local
150 unsigned int opcode; in get_ins_reg_width() local
160 if (rw8[i] == opcode) in get_ins_reg_width()
164 if (rw32[i] == opcode) in get_ins_reg_width()
173 unsigned int opcode; in get_ins_mem_width() local
183 if (mw8[i] == opcode) in get_ins_mem_width()
187 if (mw16[i] == opcode) in get_ins_mem_width()
396 unsigned int opcode; in get_ins_reg_val() local
419 if (opcode == 0xAA || opcode == 0xAB) { in get_ins_reg_val()
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/openbmc/qemu/target/mips/tcg/
H A Dmxu_translate.c4406 uint32_t opcode = extract32(ctx->opcode, 18, 3); in decode_opc_mxu__pool00() local
4436 uint32_t opcode = extract32(ctx->opcode, 0, 6); in decode_opc_mxu_s32madd_sub() local
4465 uint32_t opcode = extract32(ctx->opcode, 18, 3); in decode_opc_mxu__pool01() local
4498 uint32_t opcode = extract32(ctx->opcode, 18, 3); in decode_opc_mxu__pool02() local
4522 uint32_t opcode = extract32(ctx->opcode, 24, 2); in decode_opc_mxu__pool03() local
4541 uint32_t opcode = extract32(ctx->opcode, 10, 4); in decode_opc_mxu__pool04() local
4554 uint32_t opcode = extract32(ctx->opcode, 10, 4); in decode_opc_mxu__pool05() local
4566 uint32_t opcode = extract32(ctx->opcode, 10, 4); in decode_opc_mxu__pool06() local
4586 uint32_t opcode = extract32(ctx->opcode, 10, 4); in decode_opc_mxu__pool07() local
4607 uint32_t opcode = extract32(ctx->opcode, 10, 4); in decode_opc_mxu__pool08() local
[all …]
/openbmc/linux/arch/powerpc/xmon/
H A Dppc-dis.c83 const struct powerpc_opcode *opcode; in lookup_powerpc() local
88 for (opcode = powerpc_opcodes; opcode < opcode_end; ++opcode) in lookup_powerpc()
94 if ((insn & opcode->mask) != opcode->opcode in lookup_powerpc()
111 return opcode; in lookup_powerpc()
121 const struct powerpc_opcode *opcode; in print_insn_powerpc() local
153 opcode = NULL; in print_insn_powerpc()
156 if (opcode == NULL) in print_insn_powerpc()
161 if (opcode != NULL) in print_insn_powerpc()
169 if (opcode->operands[0] != 0) in print_insn_powerpc()
170 printf("%-7s ", opcode->name); in print_insn_powerpc()
[all …]
/openbmc/linux/arch/x86/include/asm/
H A Dtext-patching.h28 extern void text_poke_early(void *addr, const void *opcode, size_t len);
44 extern void *text_poke(void *addr, const void *opcode, size_t len);
46 extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);
47 extern void *text_poke_copy(void *addr, const void *opcode, size_t len);
73 static __always_inline int text_opcode_size(u8 opcode) in text_opcode_size() argument
80 switch(opcode) { in text_opcode_size()
96 u8 opcode; member
106 BUG_ON(size < text_opcode_size(opcode)); in __text_gen_insn()
117 insn->opcode = opcode; in __text_gen_insn()
132 void *text_gen_insn(u8 opcode, const void *addr, const void *dest) in text_gen_insn() argument
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/openbmc/qemu/target/ppc/
H A Dtranslate.c172 uint32_t opcode; member
1583 rA(ctx->opcode) ? cpu_gpr[rA(ctx->opcode)] : zr, in gen_isel()
1590 gen_helper_cmpb(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], in gen_cmpb()
2007 tcg_gen_mul_i32(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], in gen_mullw()
2076 tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], in gen_mulld()
2420 if (rS(ctx->opcode) != rB(ctx->opcode)) { in gen_xor()
2436 if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { in gen_ori()
2447 if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { in gen_oris()
2451 tcg_gen_ori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], in gen_oris()
2460 if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { in gen_xori()
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