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Searched refs:opcode (Results 1 – 25 of 162) sorted by relevance

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/openbmc/qemu/linux-user/arm/nwfpe/
H A Dfpopcode.h201 #define getCoprocessorNumber(opcode) ((opcode & MASK_COPROCESSOR) >> 8) argument
204 #define getOffset(opcode) (opcode & MASK_OFFSET) argument
207 #define TEST_OPCODE(opcode,mask) (((opcode) & (mask)) == (mask)) argument
209 #define LOAD_OP(opcode) TEST_OPCODE((opcode),MASK_CPDT | BIT_LOAD) argument
210 #define STORE_OP(opcode) ((opcode & (MASK_CPDT | BIT_LOAD)) == MASK_CPDT) argument
212 #define LDF_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
213 #define LFM_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument
214 #define STF_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
215 #define SFM_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument
217 #define PREINDEXED(opcode) ((opcode & BIT_PREINDEX) != 0) argument
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H A Dfpa11_cpdt.c215 static unsigned int PerformLDF(const unsigned int opcode) in PerformLDF() argument
219 write_back = WRITE_BACK(opcode); in PerformLDF()
223 pBase = readRegister(getRn(opcode)); in PerformLDF()
224 if (ARM_REG_PC == getRn(opcode)) in PerformLDF()
231 if (BIT_UP_SET(opcode)) in PerformLDF()
232 pFinal += getOffset(opcode) * 4; in PerformLDF()
234 pFinal -= getOffset(opcode) * 4; in PerformLDF()
236 if (PREINDEXED(opcode)) pAddress = pFinal; else pAddress = pBase; in PerformLDF()
238 switch (opcode & MASK_TRANSFER_LENGTH) in PerformLDF()
240 case TRANSFER_SINGLE : loadSingle(getFd(opcode),pAddress); break; in PerformLDF()
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H A Dfpa11_cprt.c30 unsigned int PerformFLT(const unsigned int opcode);
31 unsigned int PerformFIX(const unsigned int opcode);
34 PerformComparison(const unsigned int opcode);
36 unsigned int EmulateCPRT(const unsigned int opcode) in EmulateCPRT() argument
42 if (opcode & 0x800000) in EmulateCPRT()
48 return PerformComparison(opcode); in EmulateCPRT()
52 switch ((opcode & 0x700000) >> 20) in EmulateCPRT()
54 case FLT_CODE >> 20: nRc = PerformFLT(opcode); break; in EmulateCPRT()
55 case FIX_CODE >> 20: nRc = PerformFIX(opcode); break; in EmulateCPRT()
57 case WFS_CODE >> 20: writeFPSR(readRegister(getRd(opcode))); break; in EmulateCPRT()
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H A Dfpa11.c79 void SetRoundingMode(const unsigned int opcode) in SetRoundingMode() argument
87 switch (opcode & MASK_ROUNDING_MODE) in SetRoundingMode()
121 void SetRoundingPrecision(const unsigned int opcode) in SetRoundingPrecision() argument
128 switch (opcode & MASK_ROUNDING_PRECISION) { in SetRoundingPrecision()
159 unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs) in EmulateAll() argument
170 cp = (opcode >> 8) & 0xf; in EmulateAll()
180 opcode, qregs[ARM_REG_PC]); in EmulateAll()
194 if (TEST_OPCODE(opcode,MASK_CPRT)) in EmulateAll()
200 nRc = EmulateCPRT(opcode); in EmulateAll()
202 else if (TEST_OPCODE(opcode,MASK_CPDO)) in EmulateAll()
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H A Dfpa11_cpdo.c25 unsigned int EmulateCPDO(const unsigned int opcode) in EmulateCPDO() argument
34 nDest = getDestinationSize(opcode); in EmulateCPDO()
37 SetRoundingMode(opcode); in EmulateCPDO()
44 if (MONADIC_INSTRUCTION(opcode)) in EmulateCPDO()
47 nType = fpa11->fType[getFn(opcode)]; in EmulateCPDO()
49 if (!CONSTANT_FM(opcode)) in EmulateCPDO()
51 register unsigned int Fm = getFm(opcode); in EmulateCPDO()
60 case typeSingle : nRc = SingleCPDO(opcode); break; in EmulateCPDO()
61 case typeDouble : nRc = DoubleCPDO(opcode); break; in EmulateCPDO()
62 case typeExtended : nRc = ExtendedCPDO(opcode); break; in EmulateCPDO()
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H A Dfpopcode.c62 unsigned int getRegisterCount(const unsigned int opcode) in getRegisterCount() argument
66 switch (opcode & MASK_REGISTER_COUNT) in getRegisterCount()
78 unsigned int getDestinationSize(const unsigned int opcode) in getDestinationSize() argument
82 switch (opcode & MASK_DESTINATION_SIZE) in getDestinationSize()
H A Dfpa11.h112 unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs);
118 unsigned int SingleCPDO(const unsigned int opcode);
119 unsigned int DoubleCPDO(const unsigned int opcode);
120 unsigned int ExtendedCPDO(const unsigned int opcode);
/openbmc/qemu/target/hexagon/
H A Diclass.c32 SlotMask find_iclass_slots(Opcode opcode, int itype) in find_iclass_slots() argument
35 if (GET_ATTRIB(opcode, A_ICOP)) { in find_iclass_slots()
37 } else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT0ONLY)) { in find_iclass_slots()
39 } else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT1ONLY)) { in find_iclass_slots()
41 } else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT2ONLY)) { in find_iclass_slots()
43 } else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT3ONLY)) { in find_iclass_slots()
45 } else if (GET_ATTRIB(opcode, A_COF) && in find_iclass_slots()
46 GET_ATTRIB(opcode, A_INDIRECT) && in find_iclass_slots()
47 !GET_ATTRIB(opcode, A_MEMLIKE) && in find_iclass_slots()
48 !GET_ATTRIB(opcode, A_MEMLIKE_PACKET_RULES)) { in find_iclass_slots()
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H A Dprintinsn.c41 switch (insn->opcode) { in snprintinsn()
66 if (pkt->insn[i].opcode == J2_endloop0) { in snprint_a_pkt_disas()
70 if (pkt->insn[i].opcode == J2_endloop1) { in snprint_a_pkt_disas()
74 if (pkt->insn[i].opcode == J2_endloop01) { in snprint_a_pkt_disas()
93 if (GET_ATTRIB(pkt->insn[i].opcode, A_SUBINSN)) { in snprint_a_pkt_disas()
97 } else if (pkt->insn[i + 1].opcode != J2_endloop0 && in snprint_a_pkt_disas()
98 pkt->insn[i + 1].opcode != J2_endloop1 && in snprint_a_pkt_disas()
99 pkt->insn[i + 1].opcode != J2_endloop01) { in snprint_a_pkt_disas()
119 int slot, opcode; in snprint_a_pkt_debug() local
132 if (GET_ATTRIB(pkt->insn[i].opcode, A_SUBINSN)) { in snprint_a_pkt_debug()
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H A Dgen_dectree_import.c84 static const char *get_opcode_enc(int opcode) in get_opcode_enc() argument
86 const char *tmp = opcode_encodings[opcode].encoding; in get_opcode_enc()
93 static const char *get_opcode_enc_class(int opcode) in get_opcode_enc_class() argument
95 const char *tmp = opcode_encodings[opcode].encoding; in get_opcode_enc_class()
98 const char *name = opcode_names[opcode]; in get_opcode_enc_class()
103 return opcode_enc_class_names[opcode_encodings[opcode].enc_class]; in get_opcode_enc_class()
/openbmc/u-boot/post/lib_powerpc/
H A Dcpu_asm.h112 #define ASM_0(opcode) (opcode) argument
113 #define ASM_1(opcode, rd) ((opcode) + \ argument
115 #define ASM_1C(opcode, cr) ((opcode) + \ argument
117 #define ASM_11(opcode, rd, rs) ((opcode) + \ argument
120 #define ASM_11C(opcode, cd, cs) ((opcode) + \ argument
123 #define ASM_11X(opcode, rd, rs) ((opcode) + \ argument
126 #define ASM_11I(opcode, rd, rs, simm) ((opcode) + \ argument
130 #define ASM_11IF(opcode, rd, rs, simm) ((opcode) + \ argument
134 #define ASM_11S(opcode, rd, rs, sh) ((opcode) + \ argument
138 #define ASM_11IX(opcode, rd, rs, imm) ((opcode) + \ argument
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/openbmc/qemu/target/hexagon/mmvec/
H A Ddecode_ext_mmvec.c34 uint16_t use_opcode = pkt->insn[i].opcode; in check_new_value()
49 if (!GET_ATTRIB(pkt->insn[j].opcode, A_CVI)) { in check_new_value()
66 def_opcode = pkt->insn[def_idx].opcode; in check_new_value()
103 if (GET_ATTRIB(pkt->insn[i].opcode, A_CVI)) { in decode_mmvec_move_cvi_to_end()
105 uint16_t last_opcode = pkt->insn[last_inst].opcode; in decode_mmvec_move_cvi_to_end()
132 uint16_t opcode = pkt->insn[i].opcode; in decode_shuffle_for_execution_vops() local
133 if ((GET_ATTRIB(opcode, A_LOAD) && in decode_shuffle_for_execution_vops()
134 GET_ATTRIB(opcode, A_CVI_NEW)) || in decode_shuffle_for_execution_vops()
135 GET_ATTRIB(opcode, A_CVI_TMP)) { in decode_shuffle_for_execution_vops()
147 uint16_t opcode = pkt->insn[i].opcode; in decode_shuffle_for_execution_vops() local
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/openbmc/qemu/target/ppc/translate/
H A Dspe-impl.c.inc21 tcg_gen_concat_tl_i64(tmp, cpu_gpr[rA(ctx->opcode)],
22 cpu_gprh[rA(ctx->opcode)]);
28 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
29 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]);
45 if (Rc(ctx->opcode)) \
65 tcg_op(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], \
66 cpu_gpr[rB(ctx->opcode)]); \
67 tcg_op(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)], \
68 cpu_gprh[rB(ctx->opcode)]); \
91 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]); \
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H A Dvsx-impl.c.inc411 if (xS(ctx->opcode) < 32) {
424 get_cpu_vsr(xsh, xS(ctx->opcode), true);
426 tcg_gen_trunc_i64_tl(cpu_gpr[rA(ctx->opcode)], tmp);
431 if (xS(ctx->opcode) < 32) {
444 tcg_gen_extu_tl_i64(tmp, cpu_gpr[rA(ctx->opcode)]);
446 set_cpu_vsr(xT(ctx->opcode), xsh, true);
451 if (xS(ctx->opcode) < 32) {
464 tcg_gen_extu_tl_i64(tmp, cpu_gpr[rA(ctx->opcode)]);
466 set_cpu_vsr(xT(ctx->opcode), xsh, true);
473 if (xS(ctx->opcode) < 32) {
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/openbmc/qemu/target/mips/tcg/
H A Dmxu_translate.c679 XRa = extract32(ctx->opcode, 6, 5); in gen_mxu_s32i2m()
680 Rb = extract32(ctx->opcode, 16, 5); in gen_mxu_s32i2m()
700 XRa = extract32(ctx->opcode, 6, 5); in gen_mxu_s32m2i()
701 Rb = extract32(ctx->opcode, 16, 5); in gen_mxu_s32m2i()
726 XRa = extract32(ctx->opcode, 6, 4); in gen_mxu_s8ldd()
727 s8 = extract32(ctx->opcode, 10, 8); in gen_mxu_s8ldd()
728 optn3 = extract32(ctx->opcode, 18, 3); in gen_mxu_s8ldd()
729 Rb = extract32(ctx->opcode, 21, 5); in gen_mxu_s8ldd()
806 XRa = extract32(ctx->opcode, 6, 4); in gen_mxu_s8std()
807 s8 = extract32(ctx->opcode, 10, 8); in gen_mxu_s8std()
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H A Dmips16e_translate.c.inc413 offset = extended ? offset : (ctx->opcode & 0xff) << 3;
419 offset = extended ? offset : ((int8_t)ctx->opcode) << 3;
460 ctx->opcode = (ctx->opcode << 16) | extend;
461 op = (ctx->opcode >> 11) & 0x1f;
462 sa = (ctx->opcode >> 22) & 0x1f;
463 funct = (ctx->opcode >> 8) & 0x7;
464 rx = xlat((ctx->opcode >> 8) & 0x7);
465 ry = xlat((ctx->opcode >> 5) & 0x7);
466 offset = imm = (int16_t) (((ctx->opcode >> 16) & 0x1f) << 11
467 | ((ctx->opcode >> 21) & 0x3f) << 5
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H A Dnanomips_translate.c.inc1230 int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RT3(ctx->opcode));
1231 int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode));
1233 switch (extract32(ctx->opcode, 2, 2)) {
1251 int rt = extract32(ctx->opcode, 21, 5);
1252 int rs = extract32(ctx->opcode, 16, 5);
1253 int rd = extract32(ctx->opcode, 11, 5);
1255 switch (extract32(ctx->opcode, 3, 7)) {
1257 switch (extract32(ctx->opcode, 10, 1)) {
1270 gen_rdhwr(ctx, rt, rs, extract32(ctx->opcode, 11, 3));
1305 switch (extract32(ctx->opcode, 10, 1)) {
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H A Dmicromips_translate.c.inc148 /* POOL32A encoding of minor opcode field */
201 /* POOL32AXF encoding of minor opcode field extension */
321 /* POOL32B encoding of minor opcode field (bits 15..12) */
337 /* POOL32C encoding of minor opcode field (bits 15..12) */
358 /* POOL32C LD-EVA encoding of minor opcode field (bits 11..9) */
371 /* POOL32C ST-EVA encoding of minor opcode field (bits 11..9) */
384 /* POOL32F encoding of minor opcode field (bits 5..0) */
462 /* POOL32Fxf encoding of minor opcode extension field */
500 /* POOL32I encoding of minor opcode field (bits 25..21) */
537 /* POOL16A encoding of minor opcode field */
[all …]
/openbmc/u-boot/include/dt-bindings/sound/
H A Dazalia.h25 #define AZALIA_SET_BYTE(codec, nid, opcode, val, byte) \ argument
28 ((opcode) + (byte)) << AZALIA_VERB_SHIFT | \
32 #define AZALIA_WORD(codec, nid, opcode, val) \ argument
33 (AZALIA_SET_BYTE(codec, nid, opcode, val, 0) | \
34 AZALIA_SET_BYTE(codec, nid, opcode, val, 1) | \
35 AZALIA_SET_BYTE(codec, nid, opcode, val, 2) | \
36 AZALIA_SET_BYTE(codec, nid, opcode, val, 3))
/openbmc/qemu/target/ppc/
H A Dinternal.h67 static inline uint32_t name(uint32_t opcode) \
69 return extract32(opcode, shift, nb); \
73 static inline int32_t name(uint32_t opcode) \
75 return sextract32(opcode, shift, nb); \
79 static inline uint32_t name(uint32_t opcode) \
81 return extract32(opcode, shift1, nb1) << nb2 | \
82 extract32(opcode, shift2, nb2); \
89 static inline int16_t name(uint32_t opcode) \
92 (((opcode >> (shift_op_d0)) & ((1 << (d0_bits)) - 1)) << (shift_d0)) | \
93 (((opcode >> (shift_op_d1)) & ((1 << (d1_bits)) - 1)) << (shift_d1)) | \
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/openbmc/qemu/hw/scsi/
H A Dsrp.h124 uint8_t opcode; member
142 uint8_t opcode; member
154 uint8_t opcode; member
164 uint8_t opcode; member
170 uint8_t opcode; member
182 uint8_t opcode; member
200 uint8_t opcode; member
232 uint8_t opcode; member
/openbmc/u-boot/arch/arm/mach-zynq/
H A Dps7_spl_init.c88 unsigned long opcode; in ps7_config() local
97 opcode = ptr[0]; in ps7_config()
98 if (opcode == OPCODE_EXIT) in ps7_config()
100 addr = (opcode & OPCODE_ADDRESS_MASK); in ps7_config()
102 switch (opcode & ~OPCODE_ADDRESS_MASK) { in ps7_config()
/openbmc/qemu/disas/
H A Dsparc.c356 #define COMMUTEOP(opcode, op3, arch_mask) \ argument
357 { opcode, F3(2, op3, 0), F3(~2, ~op3, ~0)|ASI(~0), "1,2,d", 0, arch_mask }, \
358 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1), "1,i,d", 0, arch_mask }, \
359 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1), "i,1,d", 0, arch_mask }
1246 #define br(opcode, mask, lose, flags) \ argument
1247 { opcode, (mask)|ANNUL, (lose), ",a l", (flags), v6 }, \
1248 { opcode, (mask) , (lose)|ANNUL, "l", (flags), v6 }
1250 #define brx(opcode, mask, lose, flags) /* v9 */ \ argument
1251 { opcode, (mask)|(2<<20)|BPRED, ANNUL|(lose), "Z,G", (flags), v9 }, \
1252 { opcode, (mask)|(2<<20)|BPRED, ANNUL|(lose), ",T Z,G", (flags), v9 }, \
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/openbmc/qemu/hw/ufs/
H A Dtrace-events11 …fs_exec_scsi_cmd(uint32_t slot, uint8_t lun, uint8_t opcode) "slot %"PRIu32", lun 0x%"PRIx8", opco…
12 ufs_exec_query_cmd(uint32_t slot, uint8_t opcode) "slot %"PRIu32", opcode 0x%"PRIx8""
35 ufs_err_query_invalid_opcode(uint8_t opcode) "query request has invalid opcode. opcode: 0x%"PRIx8""
36 ufs_err_query_invalid_idn(uint8_t opcode, uint8_t idn) "query request has invalid idn. opcode: 0x%"…
37 ufs_err_query_invalid_index(uint8_t opcode, uint8_t index) "query request has invalid index. opcode…
/openbmc/u-boot/common/
H A Dbedbug.c27 int get_operand_value __P ((struct opcode *, unsigned long,
29 struct opcode *find_opcode __P ((unsigned long));
30 struct opcode *find_opcode_by_name __P ((char *));
35 int parse_operand __P ((unsigned long, struct opcode *,
374 int get_operand_value (struct opcode *op, unsigned long instr, in get_operand_value()
418 struct opcode *find_opcode (unsigned long instr) in find_opcode()
420 struct opcode *ptr; in find_opcode()
431 if ((instr & ptr->mask) < ptr->opcode) { in find_opcode()
433 } else if ((instr & ptr->mask) > ptr->opcode) { in find_opcode()
440 return (struct opcode *) 0; in find_opcode()
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