Lines Matching refs:opcode

21     tcg_gen_concat_tl_i64(tmp, cpu_gpr[rA(ctx->opcode)],
22 cpu_gprh[rA(ctx->opcode)]);
28 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
29 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]);
45 if (Rc(ctx->opcode)) \
65 tcg_op(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], \
66 cpu_gpr[rB(ctx->opcode)]); \
67 tcg_op(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)], \
68 cpu_gprh[rB(ctx->opcode)]); \
91 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]); \
92 tcg_opi(t0, t0, rB(ctx->opcode)); \
93 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); \
95 tcg_gen_trunc_tl_i32(t0, cpu_gprh[rA(ctx->opcode)]); \
96 tcg_opi(t0, t0, rB(ctx->opcode)); \
97 tcg_gen_extu_i32_tl(cpu_gprh[rD(ctx->opcode)], t0); \
115 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]); \
117 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); \
119 tcg_gen_trunc_tl_i32(t0, cpu_gprh[rA(ctx->opcode)]); \
121 tcg_gen_extu_i32_tl(cpu_gprh[rD(ctx->opcode)], t0); \
148 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]); \
149 tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]); \
151 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); \
153 tcg_gen_trunc_tl_i32(t0, cpu_gprh[rA(ctx->opcode)]); \
154 tcg_gen_trunc_tl_i32(t1, cpu_gprh[rB(ctx->opcode)]); \
156 tcg_gen_extu_i32_tl(cpu_gprh[rD(ctx->opcode)], t0); \
220 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gprh[rB(ctx->opcode)]);
221 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]);
241 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rB(ctx->opcode)]); \
242 tcg_op(t0, t0, rA(ctx->opcode)); \
243 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); \
245 tcg_gen_trunc_tl_i32(t0, cpu_gprh[rB(ctx->opcode)]); \
246 tcg_op(t0, t0, rA(ctx->opcode)); \
247 tcg_gen_extu_i32_tl(cpu_gprh[rD(ctx->opcode)], t0); \
265 tcg_gen_ext32s_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); \
266 tcg_gen_ext32s_tl(cpu_gpr[rB(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); \
267 tcg_gen_ext32s_tl(cpu_gprh[rA(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]); \
268 tcg_gen_ext32s_tl(cpu_gprh[rB(ctx->opcode)], cpu_gprh[rB(ctx->opcode)]); \
270 tcg_gen_brcond_tl(tcg_cond, cpu_gpr[rA(ctx->opcode)], \
271 cpu_gpr[rB(ctx->opcode)], l1); \
272 tcg_gen_movi_i32(cpu_crf[crfD(ctx->opcode)], 0); \
275 tcg_gen_movi_i32(cpu_crf[crfD(ctx->opcode)], \
278 tcg_gen_brcond_tl(tcg_cond, cpu_gprh[rA(ctx->opcode)], \
279 cpu_gprh[rB(ctx->opcode)], l3); \
280 tcg_gen_andi_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfD(ctx->opcode)], \
284 tcg_gen_ori_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfD(ctx->opcode)], \
298 gen_helper_brinc(cpu_gpr[rD(ctx->opcode)],
299 cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
307 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
308 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
316 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
317 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]);
325 if (rD(ctx->opcode) == rA(ctx->opcode)) {
327 tcg_gen_mov_tl(tmp, cpu_gpr[rA(ctx->opcode)]);
328 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gprh[rB(ctx->opcode)]);
329 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], tmp);
331 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gprh[rB(ctx->opcode)]);
332 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
342 imm = ((int32_t)(rA(ctx->opcode) << 27)) >> 27;
344 tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], imm);
345 tcg_gen_movi_tl(cpu_gprh[rD(ctx->opcode)], imm);
354 imm = rA(ctx->opcode) << 27;
356 tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], imm);
357 tcg_gen_movi_tl(cpu_gprh[rD(ctx->opcode)], imm);
368 tcg_gen_andi_i32(t0, cpu_crf[ctx->opcode & 0x07], 1 << 3);
370 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]);
373 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rB(ctx->opcode)]);
375 tcg_gen_andi_i32(t0, cpu_crf[ctx->opcode & 0x07], 1 << 2);
377 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
380 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
435 tcg_gen_extu_tl_i64(t0, cpu_gpr[rA(ctx->opcode)]);
437 tcg_gen_extu_tl_i64(t1, cpu_gpr[rB(ctx->opcode)]);
442 gen_store_gpr64(rD(ctx->opcode), t0); /* rD := t0 */
459 gen_load_gpr64(tmp, rD(ctx->opcode));
479 gen_load_gpr64(tmp, rD(ctx->opcode));
491 gen_store_gpr64(rD(ctx->opcode), acc);
507 tcg_gen_extu_tl_i64(t0, cpu_gpr[rA(ctx->opcode)]);
509 tcg_gen_extu_tl_i64(t1, cpu_gpr[rB(ctx->opcode)]);
514 gen_store_gpr64(rD(ctx->opcode), t0); /* rD := t0 */
531 gen_load_gpr64(tmp, rD(ctx->opcode));
551 gen_load_gpr64(tmp, rD(ctx->opcode));
563 gen_store_gpr64(rD(ctx->opcode), acc);
599 target_ulong uimm = rB(ctx->opcode);
601 if (rA(ctx->opcode) == 0) {
604 tcg_gen_addi_tl(EA, cpu_gpr[rA(ctx->opcode)], uimm << sh);
615 gen_store_gpr64(rD(ctx->opcode), t0);
620 gen_qemu_ld32u(ctx, cpu_gprh[rD(ctx->opcode)], addr);
622 gen_qemu_ld32u(ctx, cpu_gpr[rD(ctx->opcode)], addr);
629 tcg_gen_shli_tl(cpu_gprh[rD(ctx->opcode)], t0, 16);
632 tcg_gen_or_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rD(ctx->opcode)], t0);
635 tcg_gen_shli_tl(cpu_gprh[rD(ctx->opcode)], t0, 16);
638 tcg_gen_or_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rD(ctx->opcode)], t0);
646 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], t0);
647 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], t0);
654 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], t0);
655 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], t0);
662 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], t0);
663 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], t0);
670 tcg_gen_shli_tl(cpu_gprh[rD(ctx->opcode)], t0, 16);
673 tcg_gen_shli_tl(cpu_gpr[rD(ctx->opcode)], t0, 16);
678 gen_qemu_ld16u(ctx, cpu_gprh[rD(ctx->opcode)], addr);
680 gen_qemu_ld16u(ctx, cpu_gpr[rD(ctx->opcode)], addr);
685 gen_qemu_ld16s(ctx, cpu_gprh[rD(ctx->opcode)], addr);
687 gen_qemu_ld16s(ctx, cpu_gpr[rD(ctx->opcode)], addr);
694 tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], t0);
695 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], t0);
702 tcg_gen_shli_tl(cpu_gprh[rD(ctx->opcode)], t0, 16);
703 tcg_gen_or_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rD(ctx->opcode)], t0);
706 tcg_gen_shli_tl(cpu_gpr[rD(ctx->opcode)], t0, 16);
707 tcg_gen_or_tl(cpu_gpr[rD(ctx->opcode)], cpu_gprh[rD(ctx->opcode)], t0);
713 gen_load_gpr64(t0, rS(ctx->opcode));
719 gen_qemu_st32(ctx, cpu_gprh[rS(ctx->opcode)], addr);
721 gen_qemu_st32(ctx, cpu_gpr[rS(ctx->opcode)], addr);
727 tcg_gen_shri_tl(t0, cpu_gprh[rS(ctx->opcode)], 16);
730 gen_qemu_st16(ctx, cpu_gprh[rS(ctx->opcode)], addr);
732 tcg_gen_shri_tl(t0, cpu_gpr[rS(ctx->opcode)], 16);
735 gen_qemu_st16(ctx, cpu_gpr[rS(ctx->opcode)], addr);
741 tcg_gen_shri_tl(t0, cpu_gprh[rS(ctx->opcode)], 16);
744 tcg_gen_shri_tl(t0, cpu_gpr[rS(ctx->opcode)], 16);
750 gen_qemu_st16(ctx, cpu_gprh[rS(ctx->opcode)], addr);
752 gen_qemu_st16(ctx, cpu_gpr[rS(ctx->opcode)], addr);
757 gen_qemu_st32(ctx, cpu_gprh[rS(ctx->opcode)], addr);
762 gen_qemu_st32(ctx, cpu_gpr[rS(ctx->opcode)], addr);
775 if (Rc(ctx->opcode)) { \
880 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rB(ctx->opcode)]); \
882 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); \
895 gen_load_gpr64(t0, rB(ctx->opcode)); \
897 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t1); \
910 tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]); \
912 gen_store_gpr64(rD(ctx->opcode), t0); \
923 gen_load_gpr64(t0, rB(ctx->opcode)); \
925 gen_store_gpr64(rD(ctx->opcode), t0); \
932 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]); \
933 tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]); \
935 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); \
947 gen_load_gpr64(t0, rA(ctx->opcode)); \
948 gen_load_gpr64(t1, rB(ctx->opcode)); \
950 gen_store_gpr64(rD(ctx->opcode), t0); \
958 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]); \
959 tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]); \
960 gen_helper_##name(cpu_crf[crfD(ctx->opcode)], tcg_env, t0, t1); \
972 gen_load_gpr64(t0, rA(ctx->opcode)); \
973 gen_load_gpr64(t1, rB(ctx->opcode)); \
974 gen_helper_##name(cpu_crf[crfD(ctx->opcode)], tcg_env, t0, t1); \
989 tcg_gen_andi_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
991 tcg_gen_andi_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)],
1000 tcg_gen_ori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
1002 tcg_gen_ori_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)],
1011 tcg_gen_xori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
1013 tcg_gen_xori_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)],
1061 tcg_gen_andi_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
1066 tcg_gen_ori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
1071 tcg_gen_xori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
1124 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
1125 tcg_gen_andi_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)],
1134 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
1135 tcg_gen_ori_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)],
1144 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
1145 tcg_gen_xori_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)],