Lines Matching refs:opcode
172 uint32_t opcode; member
1534 TCGv_i32 crf = cpu_crf[crfD(ctx->opcode)]; in gen_cmprb()
1536 tcg_gen_trunc_tl_i32(src1, cpu_gpr[rA(ctx->opcode)]); in gen_cmprb()
1537 tcg_gen_trunc_tl_i32(src2, cpu_gpr[rB(ctx->opcode)]); in gen_cmprb()
1548 if (ctx->opcode & 0x00200000) { in gen_cmprb()
1565 gen_helper_cmpeqb(cpu_crf[crfD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], in gen_cmpeqb()
1566 cpu_gpr[rB(ctx->opcode)]); in gen_cmpeqb()
1573 uint32_t bi = rC(ctx->opcode); in gen_isel()
1582 tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr[rD(ctx->opcode)], t0, zr, in gen_isel()
1583 rA(ctx->opcode) ? cpu_gpr[rA(ctx->opcode)] : zr, in gen_isel()
1584 cpu_gpr[rB(ctx->opcode)]); in gen_isel()
1590 gen_helper_cmpb(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], in gen_cmpb()
1591 cpu_gpr[rB(ctx->opcode)]); in gen_cmpb()
1704 gen_op_arith_add(ctx, cpu_gpr[rD(ctx->opcode)], \
1705 cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \
1707 add_ca, compute_ca, compute_ov, Rc(ctx->opcode)); \
1715 gen_op_arith_add(ctx, cpu_gpr[rD(ctx->opcode)], \
1716 cpu_gpr[rA(ctx->opcode)], t0, \
1718 add_ca, compute_ca, compute_ov, Rc(ctx->opcode)); \
1741 TCGv c = tcg_constant_tl(SIMM(ctx->opcode)); in gen_op_addic()
1742 gen_op_arith_add(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], in gen_op_addic()
1791 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_op_arith_divw()
1799 gen_op_arith_divw(ctx, cpu_gpr[rD(ctx->opcode)], \
1800 cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \
1815 gen_helper_##hlpr(cpu_gpr[rD(ctx->opcode)], tcg_env, \
1816 cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0); \
1817 if (unlikely(Rc(ctx->opcode) != 0)) { \
1818 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); \
1861 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_op_arith_divd()
1869 gen_op_arith_divd(ctx, cpu_gpr[rD(ctx->opcode)], \
1870 cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \
1918 gen_op_arith_modw(ctx, cpu_gpr[rD(ctx->opcode)], \
1919 cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \
1957 gen_op_arith_modd(ctx, cpu_gpr[rD(ctx->opcode)], \
1958 cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \
1972 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]); in gen_mulhw()
1973 tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]); in gen_mulhw()
1975 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t1); in gen_mulhw()
1976 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_mulhw()
1977 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); in gen_mulhw()
1987 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]); in gen_mulhwu()
1988 tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]); in gen_mulhwu()
1990 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t1); in gen_mulhwu()
1991 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_mulhwu()
1992 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); in gen_mulhwu()
2003 tcg_gen_ext32s_tl(t0, cpu_gpr[rA(ctx->opcode)]); in gen_mullw()
2004 tcg_gen_ext32s_tl(t1, cpu_gpr[rB(ctx->opcode)]); in gen_mullw()
2005 tcg_gen_mul_i64(cpu_gpr[rD(ctx->opcode)], t0, t1); in gen_mullw()
2007 tcg_gen_mul_i32(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], in gen_mullw()
2008 cpu_gpr[rB(ctx->opcode)]); in gen_mullw()
2010 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_mullw()
2011 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); in gen_mullw()
2021 tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]); in gen_mullwo()
2022 tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]); in gen_mullwo()
2025 tcg_gen_concat_i32_i64(cpu_gpr[rD(ctx->opcode)], t0, t1); in gen_mullwo()
2027 tcg_gen_mov_i32(cpu_gpr[rD(ctx->opcode)], t0); in gen_mullwo()
2038 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_mullwo()
2039 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); in gen_mullwo()
2046 tcg_gen_muli_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], in gen_mulli()
2047 SIMM(ctx->opcode)); in gen_mulli()
2055 tcg_gen_muls2_tl(lo, cpu_gpr[rD(ctx->opcode)], in gen_mulhd()
2056 cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); in gen_mulhd()
2057 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_mulhd()
2058 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); in gen_mulhd()
2066 tcg_gen_mulu2_tl(lo, cpu_gpr[rD(ctx->opcode)], in gen_mulhdu()
2067 cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); in gen_mulhdu()
2068 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_mulhdu()
2069 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); in gen_mulhdu()
2076 tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], in gen_mulld()
2077 cpu_gpr[rB(ctx->opcode)]); in gen_mulld()
2078 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_mulld()
2079 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); in gen_mulld()
2089 tcg_gen_muls2_i64(t0, t1, cpu_gpr[rA(ctx->opcode)], in gen_mulldo()
2090 cpu_gpr[rB(ctx->opcode)]); in gen_mulldo()
2091 tcg_gen_mov_i64(cpu_gpr[rD(ctx->opcode)], t0); in gen_mulldo()
2100 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_mulldo()
2101 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); in gen_mulldo()
2179 gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)], \
2180 cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \
2181 add_ca, compute_ca, compute_ov, Rc(ctx->opcode)); \
2189 gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)], \
2190 cpu_gpr[rA(ctx->opcode)], t0, \
2191 add_ca, compute_ca, compute_ov, Rc(ctx->opcode)); \
2212 TCGv c = tcg_constant_tl(SIMM(ctx->opcode)); in gen_subfic()
2213 gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], in gen_subfic()
2221 gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], in gen_op_arith_neg()
2222 zero, 0, 0, compute_ov, Rc(ctx->opcode)); in gen_op_arith_neg()
2227 tcg_gen_neg_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); in gen_neg()
2228 if (unlikely(Rc(ctx->opcode))) { in gen_neg()
2229 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); in gen_neg()
2242 tcg_op(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], \
2243 cpu_gpr[rB(ctx->opcode)]); \
2244 if (unlikely(Rc(ctx->opcode) != 0)) \
2245 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); \
2251 tcg_op(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); \
2252 if (unlikely(Rc(ctx->opcode) != 0)) \
2253 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); \
2264 tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], in gen_andi_()
2265 UIMM(ctx->opcode)); in gen_andi_()
2266 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_andi_()
2272 tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], in gen_andis_()
2273 UIMM(ctx->opcode) << 16); in gen_andis_()
2274 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_andis_()
2282 tcg_gen_trunc_tl_i32(t, cpu_gpr[rS(ctx->opcode)]); in gen_cntlzw()
2284 tcg_gen_extu_i32_tl(cpu_gpr[rA(ctx->opcode)], t); in gen_cntlzw()
2286 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_cntlzw()
2287 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_cntlzw()
2296 tcg_gen_trunc_tl_i32(t, cpu_gpr[rS(ctx->opcode)]); in gen_cnttzw()
2298 tcg_gen_extu_i32_tl(cpu_gpr[rA(ctx->opcode)], t); in gen_cnttzw()
2300 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_cnttzw()
2301 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_cnttzw()
2333 rs = rS(ctx->opcode); in gen_or()
2334 ra = rA(ctx->opcode); in gen_or()
2335 rb = rB(ctx->opcode); in gen_or()
2343 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_or()
2346 } else if (unlikely(Rc(ctx->opcode) != 0)) { in gen_or()
2420 if (rS(ctx->opcode) != rB(ctx->opcode)) { in gen_xor()
2421 tcg_gen_xor_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], in gen_xor()
2422 cpu_gpr[rB(ctx->opcode)]); in gen_xor()
2424 tcg_gen_movi_tl(cpu_gpr[rA(ctx->opcode)], 0); in gen_xor()
2426 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_xor()
2427 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_xor()
2434 target_ulong uimm = UIMM(ctx->opcode); in gen_ori()
2436 if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { in gen_ori()
2439 tcg_gen_ori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm); in gen_ori()
2445 target_ulong uimm = UIMM(ctx->opcode); in gen_oris()
2447 if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { in gen_oris()
2451 tcg_gen_ori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], in gen_oris()
2458 target_ulong uimm = UIMM(ctx->opcode); in gen_xori()
2460 if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { in gen_xori()
2464 tcg_gen_xori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm); in gen_xori()
2470 target_ulong uimm = UIMM(ctx->opcode); in gen_xoris()
2472 if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { in gen_xoris()
2476 tcg_gen_xori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], in gen_xoris()
2483 gen_helper_popcntb(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); in gen_popcntb()
2489 gen_helper_popcntw(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); in gen_popcntw()
2491 tcg_gen_ctpop_i32(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); in gen_popcntw()
2499 tcg_gen_ctpop_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); in gen_popcntd()
2506 TCGv ra = cpu_gpr[rA(ctx->opcode)]; in gen_prtyw()
2507 TCGv rs = cpu_gpr[rS(ctx->opcode)]; in gen_prtyw()
2520 TCGv ra = cpu_gpr[rA(ctx->opcode)]; in gen_prtyd()
2521 TCGv rs = cpu_gpr[rS(ctx->opcode)]; in gen_prtyd()
2537 gen_helper_bpermd(cpu_gpr[rA(ctx->opcode)], in gen_bpermd()
2538 cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); in gen_bpermd()
2549 tcg_gen_clzi_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], 64); in gen_cntlzd()
2550 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_cntlzd()
2551 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_cntlzd()
2558 tcg_gen_ctzi_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], 64); in gen_cnttzd()
2559 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_cnttzd()
2560 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_cnttzd()
2567 int l = L(ctx->opcode); in gen_darn()
2570 tcg_gen_movi_i64(cpu_gpr[rD(ctx->opcode)], -1); in gen_darn()
2574 gen_helper_darn32(cpu_gpr[rD(ctx->opcode)]); in gen_darn()
2577 gen_helper_darn64(cpu_gpr[rD(ctx->opcode)]); in gen_darn()
2588 TCGv t_ra = cpu_gpr[rA(ctx->opcode)]; in gen_rlwimi()
2589 TCGv t_rs = cpu_gpr[rS(ctx->opcode)]; in gen_rlwimi()
2590 uint32_t sh = SH(ctx->opcode); in gen_rlwimi()
2591 uint32_t mb = MB(ctx->opcode); in gen_rlwimi()
2592 uint32_t me = ME(ctx->opcode); in gen_rlwimi()
2631 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_rlwimi()
2639 TCGv t_ra = cpu_gpr[rA(ctx->opcode)]; in gen_rlwinm()
2640 TCGv t_rs = cpu_gpr[rS(ctx->opcode)]; in gen_rlwinm()
2641 int sh = SH(ctx->opcode); in gen_rlwinm()
2642 int mb = MB(ctx->opcode); in gen_rlwinm()
2643 int me = ME(ctx->opcode); in gen_rlwinm()
2684 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_rlwinm()
2692 TCGv t_ra = cpu_gpr[rA(ctx->opcode)]; in gen_rlwnm()
2693 TCGv t_rs = cpu_gpr[rS(ctx->opcode)]; in gen_rlwnm()
2694 TCGv t_rb = cpu_gpr[rB(ctx->opcode)]; in gen_rlwnm()
2695 uint32_t mb = MB(ctx->opcode); in gen_rlwnm()
2696 uint32_t me = ME(ctx->opcode); in gen_rlwnm()
2732 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_rlwnm()
2771 TCGv t_ra = cpu_gpr[rA(ctx->opcode)]; in gen_rldinm()
2772 TCGv t_rs = cpu_gpr[rS(ctx->opcode)]; in gen_rldinm()
2784 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_rldinm()
2794 sh = SH(ctx->opcode) | (shn << 5); in gen_rldicl()
2795 mb = MB(ctx->opcode) | (mbn << 5); in gen_rldicl()
2805 sh = SH(ctx->opcode) | (shn << 5); in gen_rldicr()
2806 me = MB(ctx->opcode) | (men << 5); in gen_rldicr()
2816 sh = SH(ctx->opcode) | (shn << 5); in gen_rldic()
2817 mb = MB(ctx->opcode) | (mbn << 5); in gen_rldic()
2824 TCGv t_ra = cpu_gpr[rA(ctx->opcode)]; in gen_rldnm()
2825 TCGv t_rs = cpu_gpr[rS(ctx->opcode)]; in gen_rldnm()
2826 TCGv t_rb = cpu_gpr[rB(ctx->opcode)]; in gen_rldnm()
2834 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_rldnm()
2844 mb = MB(ctx->opcode) | (mbn << 5); in gen_rldcl()
2854 me = MB(ctx->opcode) | (men << 5); in gen_rldcr()
2862 TCGv t_ra = cpu_gpr[rA(ctx->opcode)]; in gen_rldimi()
2863 TCGv t_rs = cpu_gpr[rS(ctx->opcode)]; in gen_rldimi()
2864 uint32_t sh = SH(ctx->opcode) | (shn << 5); in gen_rldimi()
2865 uint32_t mb = MB(ctx->opcode) | (mbn << 5); in gen_rldimi()
2879 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_rldimi()
2896 tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x3a); in gen_slw()
2899 tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x1a); in gen_slw()
2902 tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0); in gen_slw()
2904 tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x1f); in gen_slw()
2905 tcg_gen_shl_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); in gen_slw()
2906 tcg_gen_ext32u_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); in gen_slw()
2907 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_slw()
2908 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_slw()
2915 gen_helper_sraw(cpu_gpr[rA(ctx->opcode)], tcg_env, in gen_sraw()
2916 cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); in gen_sraw()
2917 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_sraw()
2918 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_sraw()
2925 int sh = SH(ctx->opcode); in gen_srawi()
2926 TCGv dst = cpu_gpr[rA(ctx->opcode)]; in gen_srawi()
2927 TCGv src = cpu_gpr[rS(ctx->opcode)]; in gen_srawi()
2947 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_srawi()
2960 tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x3a); in gen_srw()
2963 tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x1a); in gen_srw()
2966 tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0); in gen_srw()
2969 tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x1f); in gen_srw()
2970 tcg_gen_shr_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); in gen_srw()
2971 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_srw()
2972 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_srw()
2984 tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x39); in gen_sld()
2986 tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0); in gen_sld()
2988 tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x3f); in gen_sld()
2989 tcg_gen_shl_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); in gen_sld()
2990 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_sld()
2991 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_sld()
2998 gen_helper_srad(cpu_gpr[rA(ctx->opcode)], tcg_env, in gen_srad()
2999 cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); in gen_srad()
3000 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_srad()
3001 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_srad()
3007 int sh = SH(ctx->opcode) + (n << 5); in gen_sradi()
3008 TCGv dst = cpu_gpr[rA(ctx->opcode)]; in gen_sradi()
3009 TCGv src = cpu_gpr[rS(ctx->opcode)]; in gen_sradi()
3028 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_sradi()
3046 int sh = SH(ctx->opcode) + (n << 5); in gen_extswsli()
3047 TCGv dst = cpu_gpr[rA(ctx->opcode)]; in gen_extswsli()
3048 TCGv src = cpu_gpr[rS(ctx->opcode)]; in gen_extswsli()
3052 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_extswsli()
3074 tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x39); in gen_srd()
3076 tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0); in gen_srd()
3078 tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x3f); in gen_srd()
3079 tcg_gen_shr_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); in gen_srd()
3080 if (unlikely(Rc(ctx->opcode) != 0)) { in gen_srd()
3081 gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); in gen_srd()
3091 target_long simm = SIMM(ctx->opcode); in gen_addr_imm_index()
3094 if (rA(ctx->opcode) == 0) { in gen_addr_imm_index()
3100 tcg_gen_addi_tl(EA, cpu_gpr[rA(ctx->opcode)], simm); in gen_addr_imm_index()
3106 tcg_gen_ext32u_tl(EA, cpu_gpr[rA(ctx->opcode)]); in gen_addr_imm_index()
3108 tcg_gen_mov_tl(EA, cpu_gpr[rA(ctx->opcode)]); in gen_addr_imm_index()
3115 if (rA(ctx->opcode) == 0) { in gen_addr_reg_index()
3117 tcg_gen_ext32u_tl(EA, cpu_gpr[rB(ctx->opcode)]); in gen_addr_reg_index()
3119 tcg_gen_mov_tl(EA, cpu_gpr[rB(ctx->opcode)]); in gen_addr_reg_index()
3122 tcg_gen_add_tl(EA, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); in gen_addr_reg_index()
3131 if (rA(ctx->opcode) == 0) { in gen_addr_register()
3134 tcg_gen_ext32u_tl(EA, cpu_gpr[rA(ctx->opcode)]); in gen_addr_register()
3136 tcg_gen_mov_tl(EA, cpu_gpr[rA(ctx->opcode)]); in gen_addr_register()
3152 (ctx->opcode & 0x03FF0000) | POWERPC_EXCP_ALIGN_LE); in gen_align_no_le()
3250 gen_qemu_##ldop(ctx, cpu_gpr[rD(ctx->opcode)], EA); \
3267 tcg_gen_qemu_ld_tl(cpu_gpr[rD(ctx->opcode)], EA, PPC_TLB_EPID_LOAD, ldop);\
3294 gen_qemu_##stop(ctx, cpu_gpr[rS(ctx->opcode)], EA); \
3311 cpu_gpr[rD(ctx->opcode)], EA, PPC_TLB_EPID_STORE, stop); \
3361 t1 = tcg_constant_i32(rD(ctx->opcode)); in gen_lmw()
3378 t1 = tcg_constant_i32(rS(ctx->opcode)); in gen_stmw()
3396 int nb = NB(ctx->opcode); in gen_lswi()
3397 int start = rD(ctx->opcode); in gen_lswi()
3398 int ra = rA(ctx->opcode); in gen_lswi()
3434 t1 = tcg_constant_i32(rD(ctx->opcode)); in gen_lswx()
3435 t2 = tcg_constant_i32(rA(ctx->opcode)); in gen_lswx()
3436 t3 = tcg_constant_i32(rB(ctx->opcode)); in gen_lswx()
3445 int nb = NB(ctx->opcode); in gen_stswi()
3458 t2 = tcg_constant_i32(rS(ctx->opcode)); in gen_stswi()
3478 t2 = tcg_constant_i32(rS(ctx->opcode)); in gen_stswx()
3517 if (ctx->opcode & 0x2000000) { in gen_eieio()
3577 TCGv gpr = cpu_gpr[rD(ctx->opcode)]; in gen_load_locked()
3618 tcg_gen_movcond_tl(cond, cpu_gpr[rD(ctx->opcode)], t, t2, t, u); in LARX()
3623 uint32_t gpr_FC = FC(ctx->opcode); in gen_ld_atomic()
3625 int rt = rD(ctx->opcode); in gen_ld_atomic()
3732 uint32_t gpr_FC = FC(ctx->opcode); in gen_st_atomic()
3737 src = cpu_gpr[rD(ctx->opcode)]; in gen_st_atomic()
3811 int rs = rS(ctx->opcode); in gen_conditional_store()
3855 int rd = rD(ctx->opcode); in STCX()
3859 if (unlikely((rd & 1) || (rd == rA(ctx->opcode)) || in STCX()
3860 (rd == rB(ctx->opcode)))) { in STCX()
3890 int rs = rS(ctx->opcode); in gen_stqcx_()
3940 uint32_t l = (ctx->opcode >> 21) & 3; in gen_sync()
3971 wc = WC(ctx->opcode); in gen_wait()
3978 wc = WC(ctx->opcode); in gen_wait()
3980 uint32_t pl = PL(ctx->opcode); in gen_wait()
4258 li = LI(ctx->opcode); in gen_b()
4260 if (likely(AA(ctx->opcode) == 0)) { in gen_b()
4265 if (LK(ctx->opcode)) { in gen_b()
4280 uint32_t bo = BO(ctx->opcode); in gen_bcond()
4296 if (LK(ctx->opcode)) { in gen_bcond()
4351 uint32_t bi = BI(ctx->opcode); in gen_bcond()
4365 target_ulong li = (target_long)((int16_t)(BD(ctx->opcode))); in gen_bcond()
4366 if (likely(AA(ctx->opcode) == 0)) { in gen_bcond()
4414 sh = (crbD(ctx->opcode) & 0x03) - (crbA(ctx->opcode) & 0x03); \
4417 tcg_gen_shri_i32(t0, cpu_crf[crbA(ctx->opcode) >> 2], sh); \
4419 tcg_gen_shli_i32(t0, cpu_crf[crbA(ctx->opcode) >> 2], -sh); \
4421 tcg_gen_mov_i32(t0, cpu_crf[crbA(ctx->opcode) >> 2]); \
4423 sh = (crbD(ctx->opcode) & 0x03) - (crbB(ctx->opcode) & 0x03); \
4425 tcg_gen_shri_i32(t1, cpu_crf[crbB(ctx->opcode) >> 2], sh); \
4427 tcg_gen_shli_i32(t1, cpu_crf[crbB(ctx->opcode) >> 2], -sh); \
4429 tcg_gen_mov_i32(t1, cpu_crf[crbB(ctx->opcode) >> 2]); \
4431 bitmask = 0x08 >> (crbD(ctx->opcode) & 0x03); \
4433 tcg_gen_andi_i32(t1, cpu_crf[crbD(ctx->opcode) >> 2], ~bitmask); \
4434 tcg_gen_or_i32(cpu_crf[crbD(ctx->opcode) >> 2], t0, t1); \
4457 tcg_gen_mov_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfS(ctx->opcode)]); in gen_mcrf()
4545 lev = (ctx->opcode >> 5) & 0x1; in gen_sc()
4553 uint32_t lev = (ctx->opcode >> 5) & 0x7F; in gen_scv()
4570 if (TO(ctx->opcode) == 0) { in check_unconditional_trap()
4574 if (TO(ctx->opcode) == 31) { in check_unconditional_trap()
4589 t0 = tcg_constant_i32(TO(ctx->opcode)); in gen_tw()
4590 gen_helper_tw(tcg_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], in gen_tw()
4603 t0 = tcg_constant_tl(SIMM(ctx->opcode)); in gen_twi()
4604 t1 = tcg_constant_i32(TO(ctx->opcode)); in gen_twi()
4605 gen_helper_tw(tcg_env, cpu_gpr[rA(ctx->opcode)], t0, t1); in gen_twi()
4617 t0 = tcg_constant_i32(TO(ctx->opcode)); in gen_td()
4618 gen_helper_td(tcg_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], in gen_td()
4631 t0 = tcg_constant_tl(SIMM(ctx->opcode)); in gen_tdi()
4632 t1 = tcg_constant_i32(TO(ctx->opcode)); in gen_tdi()
4633 gen_helper_td(tcg_env, cpu_gpr[rA(ctx->opcode)], t0, t1); in gen_tdi()
4644 TCGv_i32 dst = cpu_crf[crfD(ctx->opcode)]; in gen_mcrxr()
4666 TCGv_i32 dst = cpu_crf[crfD(ctx->opcode)]; in gen_mcrxrx()
4685 if (likely(ctx->opcode & 0x00100000)) { in gen_mfcr()
4686 crm = CRM(ctx->opcode); in gen_mfcr()
4689 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], cpu_crf[7 - crn]); in gen_mfcr()
4690 tcg_gen_shli_tl(cpu_gpr[rD(ctx->opcode)], in gen_mfcr()
4691 cpu_gpr[rD(ctx->opcode)], crn * 4); in gen_mfcr()
4710 tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); in gen_mfcr()
4718 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_msr); in gen_mfmsr()
4725 uint32_t sprn = SPR(ctx->opcode); in gen_op_mfspr()
4740 (*read_cb)(ctx, rD(ctx->opcode), sprn); in gen_op_mfspr()
4799 crm = CRM(ctx->opcode); in gen_mtcrf()
4800 if (likely((ctx->opcode & 0x00100000))) { in gen_mtcrf()
4804 tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]); in gen_mtcrf()
4810 tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]); in gen_mtcrf()
4840 if (ctx->opcode & 0x00010000) { in gen_mtmsrd()
4855 tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], mask); in gen_mtmsrd()
4879 if (ctx->opcode & 0x00010000) { in gen_mtmsr()
4894 tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], mask); in gen_mtmsr()
4909 uint32_t sprn = SPR(ctx->opcode); in gen_mtspr()
4924 (*write_cb)(ctx, sprn, rS(ctx->opcode)); in gen_mtspr()
4969 int crf = crfS(ctx->opcode); in gen_setb()
4973 tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); in gen_setb()
5109 tcgv_op = tcg_constant_i32(ctx->opcode & 0x03FF000); in gen_dcbz()
5122 tcgv_op = tcg_constant_i32(ctx->opcode & 0x03FF000); in gen_dcbzep()
5130 if (rA(ctx->opcode) == 0) { in gen_dst()
5140 if (rA(ctx->opcode) == 0) { in gen_dstst()
5197 t0 = tcg_constant_tl(SR(ctx->opcode)); in gen_mfsr()
5198 gen_helper_load_sr(cpu_gpr[rD(ctx->opcode)], tcg_env, t0); in gen_mfsr()
5212 tcg_gen_extract_tl(t0, cpu_gpr[rB(ctx->opcode)], 28, 4); in gen_mfsrin()
5213 gen_helper_load_sr(cpu_gpr[rD(ctx->opcode)], tcg_env, t0); in gen_mfsrin()
5226 t0 = tcg_constant_tl(SR(ctx->opcode)); in gen_mtsr()
5227 gen_helper_store_sr(tcg_env, t0, cpu_gpr[rS(ctx->opcode)]); in gen_mtsr()
5241 tcg_gen_extract_tl(t0, cpu_gpr[rB(ctx->opcode)], 28, 4); in gen_mtsrin()
5242 gen_helper_store_sr(tcg_env, t0, cpu_gpr[rD(ctx->opcode)]); in gen_mtsrin()
5258 t0 = tcg_constant_tl(SR(ctx->opcode)); in gen_mfsr_64b()
5259 gen_helper_load_sr(cpu_gpr[rD(ctx->opcode)], tcg_env, t0); in gen_mfsr_64b()
5273 tcg_gen_extract_tl(t0, cpu_gpr[rB(ctx->opcode)], 28, 4); in gen_mfsrin_64b()
5274 gen_helper_load_sr(cpu_gpr[rD(ctx->opcode)], tcg_env, t0); in gen_mfsrin_64b()
5287 t0 = tcg_constant_tl(SR(ctx->opcode)); in gen_mtsr_64b()
5288 gen_helper_store_sr(tcg_env, t0, cpu_gpr[rS(ctx->opcode)]); in gen_mtsr_64b()
5302 tcg_gen_extract_tl(t0, cpu_gpr[rB(ctx->opcode)], 28, 4); in gen_mtsrin_64b()
5303 gen_helper_store_sr(tcg_env, t0, cpu_gpr[rS(ctx->opcode)]); in gen_mtsrin_64b()
5355 tcg_gen_qemu_ld_tl(cpu_gpr[rD(ctx->opcode)], t0, ctx->mem_idx, in gen_eciwx()
5367 tcg_gen_qemu_st_tl(cpu_gpr[rD(ctx->opcode)], t0, ctx->mem_idx, in gen_ecowx()
5380 gen_helper_6xx_tlbd(tcg_env, cpu_gpr[rB(ctx->opcode)]); in gen_tlbld_6xx()
5391 gen_helper_6xx_tlbi(tcg_env, cpu_gpr[rB(ctx->opcode)]); in gen_tlbli_6xx()
5415 gen_helper_tlbiva(tcg_env, cpu_gpr[rB(ctx->opcode)]); in gen_tlbiva()
5542 gen_405_mulladd_insn(ctx, opc2, opc3, rA(ctx->opcode), rB(ctx->opcode), \
5543 rD(ctx->opcode), Rc(ctx->opcode)); \
5641 dcrn = tcg_constant_tl(SPR(ctx->opcode)); in gen_mfdcr()
5642 gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], tcg_env, dcrn); in gen_mfdcr()
5655 dcrn = tcg_constant_tl(SPR(ctx->opcode)); in gen_mtdcr()
5656 gen_helper_store_dcr(tcg_env, dcrn, cpu_gpr[rS(ctx->opcode)]); in gen_mtdcr()
5668 gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], tcg_env, in gen_mfdcrx()
5669 cpu_gpr[rA(ctx->opcode)]); in gen_mfdcrx()
5682 gen_helper_store_dcr(tcg_env, cpu_gpr[rA(ctx->opcode)], in gen_mtdcrx()
5683 cpu_gpr[rS(ctx->opcode)]); in gen_mtdcrx()
5709 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], EA); in gen_dcread()
5799 switch (rB(ctx->opcode)) { in gen_tlbre_40x()
5801 gen_helper_4xx_tlbre_hi(cpu_gpr[rD(ctx->opcode)], tcg_env, in gen_tlbre_40x()
5802 cpu_gpr[rA(ctx->opcode)]); in gen_tlbre_40x()
5805 gen_helper_4xx_tlbre_lo(cpu_gpr[rD(ctx->opcode)], tcg_env, in gen_tlbre_40x()
5806 cpu_gpr[rA(ctx->opcode)]); in gen_tlbre_40x()
5826 gen_helper_4xx_tlbsx(cpu_gpr[rD(ctx->opcode)], tcg_env, t0); in gen_tlbsx_40x()
5827 if (Rc(ctx->opcode)) { in gen_tlbsx_40x()
5830 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rD(ctx->opcode)], -1, l1); in gen_tlbsx_40x()
5845 switch (rB(ctx->opcode)) { in gen_tlbwe_40x()
5847 gen_helper_4xx_tlbwe_hi(tcg_env, cpu_gpr[rA(ctx->opcode)], in gen_tlbwe_40x()
5848 cpu_gpr[rS(ctx->opcode)]); in gen_tlbwe_40x()
5851 gen_helper_4xx_tlbwe_lo(tcg_env, cpu_gpr[rA(ctx->opcode)], in gen_tlbwe_40x()
5852 cpu_gpr[rS(ctx->opcode)]); in gen_tlbwe_40x()
5871 switch (rB(ctx->opcode)) { in gen_tlbre_440()
5876 TCGv_i32 t0 = tcg_constant_i32(rB(ctx->opcode)); in gen_tlbre_440()
5877 gen_helper_440_tlbre(cpu_gpr[rD(ctx->opcode)], tcg_env, in gen_tlbre_440()
5878 t0, cpu_gpr[rA(ctx->opcode)]); in gen_tlbre_440()
5899 gen_helper_440_tlbsx(cpu_gpr[rD(ctx->opcode)], tcg_env, t0); in gen_tlbsx_440()
5900 if (Rc(ctx->opcode)) { in gen_tlbsx_440()
5903 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rD(ctx->opcode)], -1, l1); in gen_tlbsx_440()
5917 switch (rB(ctx->opcode)) { in gen_tlbwe_440()
5922 TCGv_i32 t0 = tcg_constant_i32(rB(ctx->opcode)); in gen_tlbwe_440()
5923 gen_helper_440_tlbwe(tcg_env, t0, cpu_gpr[rA(ctx->opcode)], in gen_tlbwe_440()
5924 cpu_gpr[rS(ctx->opcode)]); in gen_tlbwe_440()
5956 if (rA(ctx->opcode)) { in gen_tlbsx_booke206()
5958 tcg_gen_add_tl(t0, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); in gen_tlbsx_booke206()
5960 t0 = cpu_gpr[rB(ctx->opcode)]; in gen_tlbsx_booke206()
6002 switch ((ctx->opcode >> 21) & 0x3) { in gen_tlbilx_booke206()
6029 tcg_gen_andi_tl(t0, cpu_gpr[rD(ctx->opcode)], (1 << MSR_EE)); in gen_wrtee()
6048 if (ctx->opcode & 0x00008000) { in gen_wrteei()
6064 TCGv_i32 t0 = tcg_constant_i32(Rc(ctx->opcode)); in gen_dlmzb()
6065 gen_helper_dlmzb(cpu_gpr[rA(ctx->opcode)], tcg_env, in gen_dlmzb()
6066 cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0); in gen_dlmzb()
6080 (ctx->opcode & 0x03FFF801)) { in gen_msync_4xx()
6101 tcg_gen_mul_i64(t1, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); in gen_maddld()
6102 tcg_gen_add_i64(cpu_gpr[rD(ctx->opcode)], t1, cpu_gpr[rC(ctx->opcode)]); in gen_maddld()
6112 if (Rc(ctx->opcode)) { in gen_maddhd_maddhdu()
6113 tcg_gen_mulu2_i64(lo, hi, cpu_gpr[rA(ctx->opcode)], in gen_maddhd_maddhdu()
6114 cpu_gpr[rB(ctx->opcode)]); in gen_maddhd_maddhdu()
6117 tcg_gen_muls2_i64(lo, hi, cpu_gpr[rA(ctx->opcode)], in gen_maddhd_maddhdu()
6118 cpu_gpr[rB(ctx->opcode)]); in gen_maddhd_maddhdu()
6119 tcg_gen_sari_i64(t1, cpu_gpr[rC(ctx->opcode)], 63); in gen_maddhd_maddhdu()
6121 tcg_gen_add2_i64(t1, cpu_gpr[rD(ctx->opcode)], lo, hi, in gen_maddhd_maddhdu()
6122 cpu_gpr[rC(ctx->opcode)], t1); in gen_maddhd_maddhdu()
6191 tcg_gen_movi_i32(cpu_crf[crfD(ctx->opcode)], 0x8); in GEN_CP_PASTE_NOOP()
6426 if ((ctx->opcode & 0x3) == 0) { in gen_dform39()
6437 if ((ctx->opcode & 3) == 0) { /* DS-FORM */ in gen_dform3D()
6450 tcg_gen_bswap64_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); in gen_brd()
6456 tcg_gen_bswap64_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); in gen_brw()
6457 tcg_gen_rotli_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 32); in gen_brw()
6468 tcg_gen_shri_i64(t1, cpu_gpr[rS(ctx->opcode)], 8); in gen_brh()
6470 tcg_gen_and_i64(t1, cpu_gpr[rS(ctx->opcode)], mask); in gen_brh()
6472 tcg_gen_or_i64(cpu_gpr[rA(ctx->opcode)], t1, t2); in gen_brh()
7269 ctx->opcode = insn; in decode_legacy()