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Searched refs:offsetof (Results 1 – 25 of 370) sorted by relevance

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/openbmc/u-boot/arch/arm/lib/
H A Dasm-offsets.c40 DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl)); in main()
41 DEFINE(CCM_CGCR0, offsetof(struct ccm_regs, cgr0)); in main()
42 DEFINE(CCM_CGCR1, offsetof(struct ccm_regs, cgr1)); in main()
43 DEFINE(CCM_CGCR2, offsetof(struct ccm_regs, cgr2)); in main()
44 DEFINE(CCM_PCDR2, offsetof(struct ccm_regs, pcdr[2])); in main()
45 DEFINE(CCM_MCR, offsetof(struct ccm_regs, mcr)); in main()
48 DEFINE(ESDRAMC_ESDCTL0, offsetof(struct esdramc_regs, ctl0)); in main()
49 DEFINE(ESDRAMC_ESDCFG0, offsetof(struct esdramc_regs, cfg0)); in main()
50 DEFINE(ESDRAMC_ESDMISC, offsetof(struct esdramc_regs, misc)); in main()
53 DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0)); in main()
[all …]
/openbmc/qemu/target/sparc/
H A Dmonitor.c60 { "g0", offsetof(CPUSPARCState, gregs[0]) },
61 { "g1", offsetof(CPUSPARCState, gregs[1]) },
62 { "g2", offsetof(CPUSPARCState, gregs[2]) },
63 { "g3", offsetof(CPUSPARCState, gregs[3]) },
64 { "g4", offsetof(CPUSPARCState, gregs[4]) },
65 { "g5", offsetof(CPUSPARCState, gregs[5]) },
66 { "g6", offsetof(CPUSPARCState, gregs[6]) },
67 { "g7", offsetof(CPUSPARCState, gregs[7]) },
92 { "pc", offsetof(CPUSPARCState, pc) },
93 { "npc", offsetof(CPUSPARCState, npc) },
[all …]
/openbmc/qemu/target/m68k/
H A Dmonitor.c26 { "d0", offsetof(CPUM68KState, dregs[0]) },
27 { "d1", offsetof(CPUM68KState, dregs[1]) },
28 { "d2", offsetof(CPUM68KState, dregs[2]) },
29 { "d3", offsetof(CPUM68KState, dregs[3]) },
30 { "d4", offsetof(CPUM68KState, dregs[4]) },
31 { "d5", offsetof(CPUM68KState, dregs[5]) },
32 { "d6", offsetof(CPUM68KState, dregs[6]) },
33 { "d7", offsetof(CPUM68KState, dregs[7]) },
34 { "a0", offsetof(CPUM68KState, aregs[0]) },
35 { "a1", offsetof(CPUM68KState, aregs[1]) },
[all …]
/openbmc/qemu/target/i386/tcg/system/
H A Dsvm_helper.c33 cpu_stw_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, selector), in svm_save_seg()
35 cpu_stq_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, base), in svm_save_seg()
37 cpu_stl_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, limit), in svm_save_seg()
39 cpu_stw_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, attrib), in svm_save_seg()
61 cpu_lduw_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, selector), in svm_load_seg()
64 cpu_ldq_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, base), in svm_load_seg()
67 cpu_ldl_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, limit), in svm_load_seg()
70 cpu_lduw_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, attrib), in svm_load_seg()
140 lbr_ctl = x86_ldl_phys(env_cpu(env), env->vm_vmcb + offsetof(struct vmcb, in virtual_vm_load_save_enabled()
187 x86_stq_phys(cs, env->vm_hsave + offsetof(struct vmcb, save.gdtr.base), in helper_vmrun()
[all …]
/openbmc/qemu/target/i386/tcg/
H A Dtcg-cpu.h66 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fcw) != XSAVE_FCW_FSW_OFFSET);
67 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.ftw) != XSAVE_FTW_FOP_OFFSET);
68 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fpip) != XSAVE_CWD_RIP_OFFSET);
69 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fpdp) != XSAVE_CWD_RDP_OFFSET);
70 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.mxcsr) != XSAVE_MXCSR_OFFSET);
71 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fpregs) != XSAVE_ST_SPACE_OFFSET);
72 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.xmm_regs) != XSAVE_XMM_SPACE_OFFSET);
73 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, avx_state) != XSAVE_AVX_OFFSET);
74 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, bndreg_state) != XSAVE_BNDREG_OFFSET);
75 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, bndcsr_state) != XSAVE_BNDCSR_OFFSET);
[all …]
/openbmc/qemu/hw/cxl/
H A Dcxl-component-utils.c403 wmask[offset + offsetof(CXLDVSECDevice, ctrl)] = 0xFD; in cxl_component_create_dvsec()
404 wmask[offset + offsetof(CXLDVSECDevice, ctrl) + 1] = 0x4F; in cxl_component_create_dvsec()
406 wmask[offset + offsetof(CXLDVSECDevice, ctrl2)] = 0x0F; in cxl_component_create_dvsec()
408 wmask[offset + offsetof(CXLDVSECDevice, lock)] = 0x01; in cxl_component_create_dvsec()
410 wmask[offset + offsetof(CXLDVSECDevice, range1_base_hi)] = 0xFF; in cxl_component_create_dvsec()
411 wmask[offset + offsetof(CXLDVSECDevice, range1_base_hi) + 1] = 0xFF; in cxl_component_create_dvsec()
412 wmask[offset + offsetof(CXLDVSECDevice, range1_base_hi) + 2] = 0xFF; in cxl_component_create_dvsec()
413 wmask[offset + offsetof(CXLDVSECDevice, range1_base_hi) + 3] = 0xFF; in cxl_component_create_dvsec()
414 wmask[offset + offsetof(CXLDVSECDevice, range1_base_lo) + 3] = 0xF0; in cxl_component_create_dvsec()
415 wmask[offset + offsetof(CXLDVSECDevice, range2_base_hi)] = 0xFF; in cxl_component_create_dvsec()
[all …]
/openbmc/u-boot/examples/standalone/
H A Dstubs.c5 #define FO(x) offsetof(struct jt_funcs, x)
39 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "r11");
53 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "x9");
65 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "ip");
83 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
99 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
115 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "gp");
131 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "a0");
143 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "r5");
161 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "r1", "r2");
[all …]
/openbmc/u-boot/lib/
H A Dasm-offsets.c29 DEFINE(GD_BD, offsetof(struct global_data, bd)); in main()
31 DEFINE(GD_MALLOC_BASE, offsetof(struct global_data, malloc_base)); in main()
34 DEFINE(GD_RELOCADDR, offsetof(struct global_data, relocaddr)); in main()
36 DEFINE(GD_RELOC_OFF, offsetof(struct global_data, reloc_off)); in main()
38 DEFINE(GD_START_ADDR_SP, offsetof(struct global_data, start_addr_sp)); in main()
40 DEFINE(GD_NEW_GD, offsetof(struct global_data, new_gd)); in main()
42 DEFINE(GD_ENV_ADDR, offsetof(struct global_data, env_addr)); in main()
/openbmc/qemu/tests/qtest/libqos/
H A Dvirtio-pci-modern.c46 offsetof(struct virtio_pci_common_cfg, in get_features()
50 offsetof(struct virtio_pci_common_cfg, device_feature)); in get_features()
53 offsetof(struct virtio_pci_common_cfg, in get_features()
57 offsetof(struct virtio_pci_common_cfg, device_feature)); in get_features()
70 offsetof(struct virtio_pci_common_cfg, in set_features()
74 offsetof(struct virtio_pci_common_cfg, in set_features()
78 offsetof(struct virtio_pci_common_cfg, in set_features()
82 offsetof(struct virtio_pci_common_cfg, in set_features()
93 offsetof(struct virtio_pci_common_cfg, in get_guest_features()
97 offsetof(struct virtio_pci_common_cfg, guest_feature)); in get_guest_features()
[all …]
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_arria10.c80 { "vco0-psrc", offsetof(struct mainpll_cfg, vco0_psrc) },
81 { "vco1-denom", offsetof(struct mainpll_cfg, vco1_denom) },
82 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) },
83 { "mpuclk-cnt", offsetof(struct mainpll_cfg, mpuclk_cnt) },
84 { "mpuclk-src", offsetof(struct mainpll_cfg, mpuclk_src) },
85 { "nocclk-cnt", offsetof(struct mainpll_cfg, nocclk_cnt) },
86 { "nocclk-src", offsetof(struct mainpll_cfg, nocclk_src) },
87 { "cntr2clk-cnt", offsetof(struct mainpll_cfg, cntr2clk_cnt) },
88 { "cntr3clk-cnt", offsetof(struct mainpll_cfg, cntr3clk_cnt) },
89 { "cntr4clk-cnt", offsetof(struct mainpll_cfg, cntr4clk_cnt) },
[all …]
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dfsl_liodn.h20 .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
26 .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
28 .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
34 .reg_offset[0] = offsetof(struct ccsr_rio, liodn) \
93 offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
110 offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
132 offsetof(struct ccsr_qman, liodnr) + \
138 offsetof(struct ccsr_bman, liodnr) + \
143 SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
149 offsetof(struct ccsr_pman, ppa1) + \
[all …]
/openbmc/libpldm/src/msgbuf/
H A Dplatform.h99 ctx, ((char *)rff) + offsetof(union_range_field_format, in pldm__msgbuf_extract_range_field_format()
103 ctx, ((char *)rff) + offsetof(union_range_field_format, in pldm__msgbuf_extract_range_field_format()
107 ctx, ((char *)rff) + offsetof(union_range_field_format, in pldm__msgbuf_extract_range_field_format()
111 ctx, ((char *)rff) + offsetof(union_range_field_format, in pldm__msgbuf_extract_range_field_format()
115 ctx, ((char *)rff) + offsetof(union_range_field_format, in pldm__msgbuf_extract_range_field_format()
119 ctx, ((char *)rff) + offsetof(union_range_field_format, in pldm__msgbuf_extract_range_field_format()
123 ctx, ((char *)rff) + offsetof(union_range_field_format, in pldm__msgbuf_extract_range_field_format()
164 ctx, ((char *)ed) + offsetof(union_effecter_data_size, in pldm__msgbuf_extract_effecter_data()
168 ctx, ((char *)ed) + offsetof(union_effecter_data_size, in pldm__msgbuf_extract_effecter_data()
172 ctx, ((char *)ed) + offsetof(union_effecter_data_size, in pldm__msgbuf_extract_effecter_data()
[all …]
/openbmc/ipmi-fru-parser/
H A Dwritefrudata.hpp30 #define IPMI_FRU_INTERNAL_OFFSET offsetof(struct common_header, internal_offset)
31 #define IPMI_FRU_CHASSIS_OFFSET offsetof(struct common_header, chassis_offset)
32 #define IPMI_FRU_BOARD_OFFSET offsetof(struct common_header, board_offset)
33 #define IPMI_FRU_PRODUCT_OFFSET offsetof(struct common_header, product_offset)
34 #define IPMI_FRU_MULTI_OFFSET offsetof(struct common_header, multi_offset)
35 #define IPMI_FRU_HDR_CRC_OFFSET offsetof(struct common_header, crc)
/openbmc/qemu/hw/smbios/
H A Dsmbios_legacy.c88 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, vendor_str), in smbios_build_type_0_fields()
90 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, bios_version_str), in smbios_build_type_0_fields()
92 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, in smbios_build_type_0_fields()
96 smbios_add_field(0, offsetof(struct smbios_type_0, in smbios_build_type_0_fields()
99 smbios_add_field(0, offsetof(struct smbios_type_0, in smbios_build_type_0_fields()
107 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, manufacturer_str), in smbios_build_type_1_fields()
109 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, product_name_str), in smbios_build_type_1_fields()
111 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, version_str), in smbios_build_type_1_fields()
113 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, serial_number_str), in smbios_build_type_1_fields()
115 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, sku_number_str), in smbios_build_type_1_fields()
[all …]
/openbmc/qemu/include/block/
H A Dufs.h58 REG32(CAP, offsetof(UfsReg, cap))
69 REG32(MCQCAP, offsetof(UfsReg, mcqcap))
76 REG32(VER, offsetof(UfsReg, ver))
77 REG32(HCPID, offsetof(UfsReg, hcpid))
78 REG32(HCMID, offsetof(UfsReg, hcmid))
79 REG32(AHIT, offsetof(UfsReg, ahit))
80 REG32(IS, offsetof(UfsReg, is))
98 REG32(IE, offsetof(UfsReg, ie))
116 REG32(HCS, offsetof(UfsReg, hcs))
122 REG32(HCE, offsetof(UfsReg, hce))
[all …]
/openbmc/u-boot/cmd/
H A Dethsw.c138 .cmd_func_offset = offsetof(struct ethsw_command_func,
146 .cmd_func_offset = offsetof(struct ethsw_command_func,
154 .cmd_func_offset = offsetof(struct ethsw_command_func,
170 .cmd_func_offset = offsetof(struct ethsw_command_func,
179 .cmd_func_offset = offsetof(struct ethsw_command_func,
203 .cmd_func_offset = offsetof(struct ethsw_command_func,
212 .cmd_func_offset = offsetof(struct ethsw_command_func,
221 .cmd_func_offset = offsetof(struct ethsw_command_func,
245 .cmd_func_offset = offsetof(struct ethsw_command_func,
254 .cmd_func_offset = offsetof(struct ethsw_command_func,
[all …]
/openbmc/qemu/qobject/
H A Dqobject.c20 offsetof(QNull, base) != 0 ||
21 offsetof(QNum, base) != 0 ||
22 offsetof(QString, base) != 0 ||
23 offsetof(QDict, base) != 0 ||
24 offsetof(QList, base) != 0 ||
25 offsetof(QBool, base) != 0,
/openbmc/qemu/linux-headers/asm-riscv/
H A Dkvm.h229 (offsetof(struct kvm_riscv_config, name) / sizeof(unsigned long))
234 (offsetof(struct kvm_riscv_core, name) / sizeof(unsigned long))
242 (offsetof(struct kvm_riscv_csr, name) / sizeof(unsigned long))
244 (offsetof(struct kvm_riscv_aia_csr, name) / sizeof(unsigned long))
246 (offsetof(struct kvm_riscv_smstateen_csr, name) / sizeof(unsigned long))
251 (offsetof(struct kvm_riscv_timer, name) / sizeof(__u64))
256 (offsetof(struct __riscv_f_ext_state, name) / sizeof(__u32))
261 (offsetof(struct __riscv_d_ext_state, name) / sizeof(__u64))
290 (offsetof(struct __riscv_v_ext_state, name) / sizeof(unsigned long))
298 (offsetof(struct kvm_riscv_sbi_sta, name) / sizeof(unsigned long))
/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dfsl_icid.h43 offsetof(struct ccsr_scfg, name) + CONFIG_SYS_FSL_SCFG_ADDR, \
82 offsetof(struct ccsr_qman, liodnr) + \
88 offsetof(struct ccsr_bman, liodnr) + \
97 0, offsetof(ccsr_sec_t, qilcr_ls) + \
110 offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \
116 offsetof(ccsr_sec_t, decoliodnr[deco_num].ls) + \
121 offsetof(ccsr_sec_t, rticliodnr[rtic_num].ls) + \
/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dls102xa_stream_id.h31 offsetof(ccsr_sec_t, jrliodnr[jrnum].ls) + \
35 offsetof(ccsr_sec_t, jrliodnr[jrnum].ls) + \
43 offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
48 offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
54 offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
/openbmc/u-boot/arch/x86/lib/
H A Dasm-offsets.c19 DEFINE(GD_BIST, offsetof(gd_t, arch.bist)); in main()
21 DEFINE(GD_HOB_LIST, offsetof(gd_t, arch.hob_list)); in main()
23 DEFINE(GD_TABLE, offsetof(gd_t, arch.table)); in main()
/openbmc/u-boot/arch/arm/mach-tegra/
H A Divc.c204 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_check_read()
219 offset = offsetof(struct tegra_ivc_channel_header, r_count); in tegra_ivc_check_write()
269 offset = offsetof(struct tegra_ivc_channel_header, r_count); in tegra_ivc_read_advance()
277 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_read_advance()
315 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_write_advance()
323 offset = offsetof(struct tegra_ivc_channel_header, r_count); in tegra_ivc_write_advance()
357 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_channel_notified()
390 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_channel_notified()
428 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_channel_notified()
450 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_channel_notified()
[all …]
/openbmc/qemu/target/arm/hvf/
H A Dhvf.c331 { HV_REG_X0, offsetof(CPUARMState, xregs[0]) },
332 { HV_REG_X1, offsetof(CPUARMState, xregs[1]) },
333 { HV_REG_X2, offsetof(CPUARMState, xregs[2]) },
334 { HV_REG_X3, offsetof(CPUARMState, xregs[3]) },
335 { HV_REG_X4, offsetof(CPUARMState, xregs[4]) },
336 { HV_REG_X5, offsetof(CPUARMState, xregs[5]) },
337 { HV_REG_X6, offsetof(CPUARMState, xregs[6]) },
338 { HV_REG_X7, offsetof(CPUARMState, xregs[7]) },
339 { HV_REG_X8, offsetof(CPUARMState, xregs[8]) },
340 { HV_REG_X9, offsetof(CPUARMState, xregs[9]) },
[all …]
/openbmc/u-boot/drivers/usb/host/
H A Dehci-mxs.c37 offsetof(struct mxs_clkctrl_regs,
49 offsetof(struct mxs_clkctrl_regs,
65 pll_offset = offsetof(struct mxs_register_32, reg_set); in ehci_mxs_toggle_clock()
66 dig_offset = offsetof(struct mxs_register_32, reg_clr); in ehci_mxs_toggle_clock()
70 pll_offset = offsetof(struct mxs_register_32, reg_clr); in ehci_mxs_toggle_clock()
71 dig_offset = offsetof(struct mxs_register_32, reg_set); in ehci_mxs_toggle_clock()
/openbmc/u-boot/board/freescale/common/
H A Dqixis.h103 #define QIXIS_READ(reg) qixis_read_i2c(offsetof(struct qixis, reg))
105 qixis_write_i2c(offsetof(struct qixis, reg), value)
107 #define QIXIS_READ(reg) qixis_read(offsetof(struct qixis, reg))
108 #define QIXIS_WRITE(reg, value) qixis_write(offsetof(struct qixis, reg), value)
112 #define QIXIS_READ_I2C(reg) qixis_read_i2c(offsetof(struct qixis, reg))
114 qixis_write_i2c(offsetof(struct qixis, reg), value)

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