1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2018 NXP 4 */ 5 6 #ifndef _FSL_ICID_H_ 7 #define _FSL_ICID_H_ 8 9 #include <asm/types.h> 10 #include <fsl_qbman.h> 11 #include <fsl_sec.h> 12 #include <asm/armv8/sec_firmware.h> 13 14 struct icid_id_table { 15 const char *compat; 16 u32 id; 17 u32 reg; 18 phys_addr_t compat_addr; 19 phys_addr_t reg_addr; 20 }; 21 22 struct fman_icid_id_table { 23 u32 port_id; 24 u32 icid; 25 }; 26 27 u32 get_ppid_icid(int ppid_tbl_idx, int ppid); 28 int fdt_get_smmu_phandle(void *blob); 29 int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids); 30 void set_icids(void); 31 void fdt_fixup_icid(void *blob); 32 33 #define SET_ICID_ENTRY(name, idA, regA, addr, compataddr) \ 34 { .compat = name, \ 35 .id = idA, \ 36 .reg = regA, \ 37 .compat_addr = compataddr, \ 38 .reg_addr = addr, \ 39 } 40 41 #define SET_SCFG_ICID(compat, streamid, name, compataddr) \ 42 SET_ICID_ENTRY(compat, streamid, (((streamid) << 24) | (1 << 23)), \ 43 offsetof(struct ccsr_scfg, name) + CONFIG_SYS_FSL_SCFG_ADDR, \ 44 compataddr) 45 46 #define SET_USB_ICID(usb_num, compat, streamid) \ 47 SET_SCFG_ICID(compat, streamid, usb##usb_num##_icid,\ 48 CONFIG_SYS_XHCI_USB##usb_num##_ADDR) 49 50 #define SET_SATA_ICID(compat, streamid) \ 51 SET_SCFG_ICID(compat, streamid, sata_icid,\ 52 AHCI_BASE_ADDR) 53 54 #define SET_SDHC_ICID(streamid) \ 55 SET_SCFG_ICID("fsl,esdhc", streamid, sdhc_icid,\ 56 CONFIG_SYS_FSL_ESDHC_ADDR) 57 58 #define SET_QDMA_ICID(compat, streamid) \ 59 SET_ICID_ENTRY(compat, streamid, (1 << 31) | (streamid), \ 60 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 61 QDMA_BASE_ADDR), \ 62 SET_ICID_ENTRY(NULL, streamid, (1 << 31) | (streamid), \ 63 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 64 QDMA_BASE_ADDR) 65 66 #define SET_EDMA_ICID(streamid) \ 67 SET_SCFG_ICID("fsl,vf610-edma", streamid, edma_icid,\ 68 EDMA_BASE_ADDR) 69 70 #define SET_ETR_ICID(streamid) \ 71 SET_SCFG_ICID(NULL, streamid, etr_icid, 0) 72 73 #define SET_DEBUG_ICID(streamid) \ 74 SET_SCFG_ICID(NULL, streamid, debug_icid, 0) 75 76 #define SET_QE_ICID(streamid) \ 77 SET_SCFG_ICID("fsl,qe", streamid, qe_icid,\ 78 QE_BASE_ADDR) 79 80 #define SET_QMAN_ICID(streamid) \ 81 SET_ICID_ENTRY("fsl,qman", streamid, streamid, \ 82 offsetof(struct ccsr_qman, liodnr) + \ 83 CONFIG_SYS_FSL_QMAN_ADDR, \ 84 CONFIG_SYS_FSL_QMAN_ADDR) 85 86 #define SET_BMAN_ICID(streamid) \ 87 SET_ICID_ENTRY("fsl,bman", streamid, streamid, \ 88 offsetof(struct ccsr_bman, liodnr) + \ 89 CONFIG_SYS_FSL_BMAN_ADDR, \ 90 CONFIG_SYS_FSL_BMAN_ADDR) 91 92 #define SET_FMAN_ICID_ENTRY(_port_id, streamid) \ 93 { .port_id = (_port_id), .icid = (streamid) } 94 95 #define SET_SEC_QI_ICID(streamid) \ 96 SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \ 97 0, offsetof(ccsr_sec_t, qilcr_ls) + \ 98 CONFIG_SYS_FSL_SEC_ADDR, \ 99 CONFIG_SYS_FSL_SEC_ADDR) 100 101 #define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \ 102 SET_ICID_ENTRY( \ 103 (CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT && \ 104 (FSL_SEC_JR##jr_num##_OFFSET == \ 105 SEC_JR3_OFFSET + CONFIG_SYS_FSL_SEC_OFFSET) \ 106 ? NULL \ 107 : "fsl,sec-v4.0-job-ring"), \ 108 streamid, \ 109 (((streamid) << 16) | (streamid)), \ 110 offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \ 111 CONFIG_SYS_FSL_SEC_ADDR, \ 112 FSL_SEC_JR##jr_num##_BASE_ADDR) 113 114 #define SET_SEC_DECO_ICID_ENTRY(deco_num, streamid) \ 115 SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \ 116 offsetof(ccsr_sec_t, decoliodnr[deco_num].ls) + \ 117 CONFIG_SYS_FSL_SEC_ADDR, 0) 118 119 #define SET_SEC_RTIC_ICID_ENTRY(rtic_num, streamid) \ 120 SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \ 121 offsetof(ccsr_sec_t, rticliodnr[rtic_num].ls) + \ 122 CONFIG_SYS_FSL_SEC_ADDR, 0) 123 124 extern struct icid_id_table icid_tbl[]; 125 extern struct fman_icid_id_table fman_icid_tbl[]; 126 extern int icid_tbl_sz; 127 extern int fman_icid_tbl_sz; 128 129 #endif 130