1222f3e6fSPaolo Bonzini /* 2222f3e6fSPaolo Bonzini * i386 TCG cpu class initialization functions 3222f3e6fSPaolo Bonzini * 4222f3e6fSPaolo Bonzini * Copyright (c) 2003 Fabrice Bellard 5222f3e6fSPaolo Bonzini * 6222f3e6fSPaolo Bonzini * This library is free software; you can redistribute it and/or 7222f3e6fSPaolo Bonzini * modify it under the terms of the GNU Lesser General Public 8222f3e6fSPaolo Bonzini * License as published by the Free Software Foundation; either 9222f3e6fSPaolo Bonzini * version 2 of the License, or (at your option) any later version. 10222f3e6fSPaolo Bonzini * 11222f3e6fSPaolo Bonzini * This library is distributed in the hope that it will be useful, 12222f3e6fSPaolo Bonzini * but WITHOUT ANY WARRANTY; without even the implied warranty of 13222f3e6fSPaolo Bonzini * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14222f3e6fSPaolo Bonzini * Lesser General Public License for more details. 15222f3e6fSPaolo Bonzini * 16222f3e6fSPaolo Bonzini * You should have received a copy of the GNU Lesser General Public 17222f3e6fSPaolo Bonzini * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18222f3e6fSPaolo Bonzini */ 19222f3e6fSPaolo Bonzini #ifndef TCG_CPU_H 20222f3e6fSPaolo Bonzini #define TCG_CPU_H 21222f3e6fSPaolo Bonzini 22*48e5c98aSDavid Edmondson #define XSAVE_FCW_FSW_OFFSET 0x000 23*48e5c98aSDavid Edmondson #define XSAVE_FTW_FOP_OFFSET 0x004 24*48e5c98aSDavid Edmondson #define XSAVE_CWD_RIP_OFFSET 0x008 25*48e5c98aSDavid Edmondson #define XSAVE_CWD_RDP_OFFSET 0x010 26*48e5c98aSDavid Edmondson #define XSAVE_MXCSR_OFFSET 0x018 27*48e5c98aSDavid Edmondson #define XSAVE_ST_SPACE_OFFSET 0x020 28*48e5c98aSDavid Edmondson #define XSAVE_XMM_SPACE_OFFSET 0x0a0 29*48e5c98aSDavid Edmondson #define XSAVE_XSTATE_BV_OFFSET 0x200 30*48e5c98aSDavid Edmondson #define XSAVE_AVX_OFFSET 0x240 31*48e5c98aSDavid Edmondson #define XSAVE_BNDREG_OFFSET 0x3c0 32*48e5c98aSDavid Edmondson #define XSAVE_BNDCSR_OFFSET 0x400 33*48e5c98aSDavid Edmondson #define XSAVE_OPMASK_OFFSET 0x440 34*48e5c98aSDavid Edmondson #define XSAVE_ZMM_HI256_OFFSET 0x480 35*48e5c98aSDavid Edmondson #define XSAVE_HI16_ZMM_OFFSET 0x680 36*48e5c98aSDavid Edmondson #define XSAVE_PKRU_OFFSET 0xa80 37*48e5c98aSDavid Edmondson 38*48e5c98aSDavid Edmondson typedef struct X86XSaveArea { 39*48e5c98aSDavid Edmondson X86LegacyXSaveArea legacy; 40*48e5c98aSDavid Edmondson X86XSaveHeader header; 41*48e5c98aSDavid Edmondson 42*48e5c98aSDavid Edmondson /* Extended save areas: */ 43*48e5c98aSDavid Edmondson 44*48e5c98aSDavid Edmondson /* AVX State: */ 45*48e5c98aSDavid Edmondson XSaveAVX avx_state; 46*48e5c98aSDavid Edmondson 47*48e5c98aSDavid Edmondson /* Ensure that XSaveBNDREG is properly aligned. */ 48*48e5c98aSDavid Edmondson uint8_t padding[XSAVE_BNDREG_OFFSET 49*48e5c98aSDavid Edmondson - sizeof(X86LegacyXSaveArea) 50*48e5c98aSDavid Edmondson - sizeof(X86XSaveHeader) 51*48e5c98aSDavid Edmondson - sizeof(XSaveAVX)]; 52*48e5c98aSDavid Edmondson 53*48e5c98aSDavid Edmondson /* MPX State: */ 54*48e5c98aSDavid Edmondson XSaveBNDREG bndreg_state; 55*48e5c98aSDavid Edmondson XSaveBNDCSR bndcsr_state; 56*48e5c98aSDavid Edmondson /* AVX-512 State: */ 57*48e5c98aSDavid Edmondson XSaveOpmask opmask_state; 58*48e5c98aSDavid Edmondson XSaveZMM_Hi256 zmm_hi256_state; 59*48e5c98aSDavid Edmondson XSaveHi16_ZMM hi16_zmm_state; 60*48e5c98aSDavid Edmondson /* PKRU State: */ 61*48e5c98aSDavid Edmondson XSavePKRU pkru_state; 62*48e5c98aSDavid Edmondson } X86XSaveArea; 63*48e5c98aSDavid Edmondson 64*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fcw) != XSAVE_FCW_FSW_OFFSET); 65*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.ftw) != XSAVE_FTW_FOP_OFFSET); 66*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fpip) != XSAVE_CWD_RIP_OFFSET); 67*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fpdp) != XSAVE_CWD_RDP_OFFSET); 68*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.mxcsr) != XSAVE_MXCSR_OFFSET); 69*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fpregs) != XSAVE_ST_SPACE_OFFSET); 70*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.xmm_regs) != XSAVE_XMM_SPACE_OFFSET); 71*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, avx_state) != XSAVE_AVX_OFFSET); 72*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, bndreg_state) != XSAVE_BNDREG_OFFSET); 73*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, bndcsr_state) != XSAVE_BNDCSR_OFFSET); 74*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, opmask_state) != XSAVE_OPMASK_OFFSET); 75*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, zmm_hi256_state) != XSAVE_ZMM_HI256_OFFSET); 76*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, hi16_zmm_state) != XSAVE_HI16_ZMM_OFFSET); 77*48e5c98aSDavid Edmondson QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, pkru_state) != XSAVE_PKRU_OFFSET); 78*48e5c98aSDavid Edmondson 79222f3e6fSPaolo Bonzini bool tcg_cpu_realizefn(CPUState *cs, Error **errp); 80222f3e6fSPaolo Bonzini 81222f3e6fSPaolo Bonzini #endif /* TCG_CPU_H */ 82