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Searched refs:mult (Results 1 – 25 of 62) sorted by relevance

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/openbmc/openbmc/meta-openembedded/meta-networking/recipes-support/ncp/libowfat/
H A D0001-Depend-on-haveuint128.h-for-umult64.c.patch7 mult/umult64.c:9:10: fatal error: 'haveuint128.h' file not found
33 @@ -430,7 +430,7 @@ range_str4inbuf.o: mult/range_str4inbuf.c rangecheck.h
34 range_strinbuf.o: mult/range_strinbuf.c rangecheck.h
35 umult16.o: mult/umult16.c uint16.h
36 umult32.o: mult/umult32.c uint32.h
37 -umult64.o: mult/umult64.c uint64.h
38 +umult64.o: mult/umult64.c uint64.h haveuint128.h
/openbmc/u-boot/arch/arm/dts/
H A Domap36xx-omap3430es2plus-clocks.dtsi38 clock-mult = <1>;
54 clock-mult = <1>;
78 clock-mult = <1>;
86 clock-mult = <1>;
94 clock-mult = <1>;
102 clock-mult = <1>;
110 clock-mult = <1>;
118 clock-mult = <1>;
126 clock-mult = <1>;
134 clock-mult = <1>;
[all …]
H A Dam33xx-clocks.dtsi23 clock-mult = <1>;
31 clock-mult = <1>;
39 clock-mult = <1>;
47 clock-mult = <1>;
55 clock-mult = <1>;
63 clock-mult = <1>;
71 clock-mult = <1>;
79 clock-mult = <1>;
87 clock-mult = <1>;
95 clock-mult = <1>;
[all …]
H A Dam43xx-clocks.dtsi39 clock-mult = <1>;
47 clock-mult = <1>;
55 clock-mult = <1>;
63 clock-mult = <1>;
71 clock-mult = <1>;
79 clock-mult = <1>;
87 clock-mult = <1>;
95 clock-mult = <1>;
103 clock-mult = <1>;
321 clock-mult = <1>;
[all …]
H A Domap36xx-clocks.dtsi74 clock-mult = <1>;
78 clock-mult = <1>;
82 ti,clock-mult = <1>;
86 ti,clock-mult = <1>;
90 clock-mult = <1>;
H A Dkeystone-clocks.dtsi31 clock-mult = <1>;
40 clock-mult = <1>;
69 clock-mult = <1>;
78 clock-mult = <1>;
87 clock-mult = <1>;
96 clock-mult = <1>;
105 clock-mult = <1>;
114 clock-mult = <1>;
123 clock-mult = <1>;
132 clock-mult = <1>;
[all …]
H A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi15 clock-mult = <1>;
23 clock-mult = <1>;
58 clock-mult = <1>;
66 clock-mult = <1>;
74 clock-mult = <1>;
82 clock-mult = <1>;
90 clock-mult = <1>;
H A Domap3xxx-clocks.dtsi46 clock-mult = <2>;
54 clock-mult = <2>;
62 clock-mult = <2>;
70 clock-mult = <1>;
78 clock-mult = <1>;
216 clock-mult = <2>;
233 clock-mult = <1>;
258 clock-mult = <2>;
275 clock-mult = <1>;
305 clock-mult = <1>;
[all …]
H A Ddra7xx-clocks.dtsi111 clock-mult = <1>;
290 clock-mult = <1>;
316 clock-mult = <1>;
324 clock-mult = <1>;
362 clock-mult = <1>;
400 clock-mult = <1>;
449 clock-mult = <1>;
509 clock-mult = <1>;
517 clock-mult = <1>;
525 clock-mult = <1>;
[all …]
H A Domap34xx-omap36xx-clocks.dtsi15 clock-mult = <1>;
80 clock-mult = <1>;
128 clock-mult = <1>;
152 clock-mult = <1>;
/openbmc/u-boot/cmd/
H A Dmisc.c29 uint mult = CONFIG_SYS_HZ / 10; in do_sleep() local
30 for (frpart++; *frpart != '\0' && mult > 0; frpart++) { in do_sleep()
35 mdelay += (*frpart - '0') * mult; in do_sleep()
36 mult /= 10; in do_sleep()
/openbmc/u-boot/drivers/clk/renesas/
H A Dclk-rcar-gen3.c163 u32 value, mult, div, prediv, postdiv; in gen3_clk_get_rate64() local
213 mult = (((value >> 24) & 0x7f) + 1) * 2; in gen3_clk_get_rate64()
214 rate = gen3_clk_get_rate64(&parent) * mult; in gen3_clk_get_rate64()
216 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate64()
230 mult = (((value >> 24) & 0x7f) + 1) * 2; in gen3_clk_get_rate64()
231 rate = gen3_clk_get_rate64(&parent) * mult; in gen3_clk_get_rate64()
233 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate64()
247 mult = (((value >> 24) & 0x7f) + 1) * 2; in gen3_clk_get_rate64()
248 rate = gen3_clk_get_rate64(&parent) * mult; in gen3_clk_get_rate64()
250 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate64()
[all …]
H A Dclk-rcar-gen2.c82 u32 value, mult, div, rate = 0; in gen2_clk_get_rate() local
123 rate = (gen2_clk_get_rate(&parent) * core->mult) / core->div; in gen2_clk_get_rate()
126 core->parent, core->mult, core->div, rate); in gen2_clk_get_rate()
151 mult = pll_config->pll0_mult; in gen2_clk_get_rate()
152 if (!mult) { in gen2_clk_get_rate()
154 mult = (((value >> 24) & 0x7f) + 1) * 2; in gen2_clk_get_rate()
157 rate = (gen2_clk_get_rate(&parent) * mult) / info->pll0_div; in gen2_clk_get_rate()
159 __func__, __LINE__, core->parent, mult, rate); in gen2_clk_get_rate()
H A Drenesas-cpg-mssr.h50 unsigned int mult; member
73 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
77 DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
/openbmc/u-boot/drivers/clk/
H A Dclk_fixed_factor.c16 unsigned int mult; member
36 return rate * ff->mult; in clk_fixed_factor_get_rate()
54 ff->mult = dev_read_u32_default(dev, "clock-mult", 1); in clk_fixed_factor_ofdata_to_platdata()
/openbmc/u-boot/drivers/clk/aspeed/
H A Dclk_ast2400.c63 unsigned int mult, div; in ast2400_get_mpll_rate() local
78 mult = (2 - od) * (n + 2); in ast2400_get_mpll_rate()
82 return (clkin * mult / div); in ast2400_get_mpll_rate()
93 unsigned int mult, div; in ast2400_get_hpll_rate() local
105 mult = div = 1; in ast2400_get_hpll_rate()
112 mult = (2 - od) * (n + 2); in ast2400_get_hpll_rate()
128 mult = 1; in ast2400_get_hpll_rate()
132 return (clkin * mult / div); in ast2400_get_hpll_rate()
144 unsigned int mult, div; in ast2400_get_d2pll_rate() local
168 mult = (n * 2); in ast2400_get_d2pll_rate()
[all …]
H A Dclk_ast2600.c220 unsigned int mult, div = 1; in ast2600_get_pll_rate() local
238 mult = 1; in ast2600_get_pll_rate()
264 mult = (reg.b.m + 1) / (reg.b.n + 1); in ast2600_get_pll_rate()
268 return ((clkin * mult) / div); in ast2600_get_pll_rate()
276 unsigned int mult, div = 1; in ast2600_get_apll_rate() local
282 mult = 1; in ast2600_get_apll_rate()
290 mult = (m + 1); in ast2600_get_apll_rate()
296 mult = 1; in ast2600_get_apll_rate()
304 mult = (2 - od) * (m + 2); in ast2600_get_apll_rate()
309 return ((clkin * mult) / div); in ast2600_get_apll_rate()
[all …]
/openbmc/u-boot/drivers/clk/mvebu/
H A Darmada-37xx-tbg.c56 unsigned int mult[NUM_TBG]; member
127 unsigned int mult, div; in armada_37xx_tbg_clk_probe() local
129 mult = tbg_get_mult(reg, &tbg[i]); in armada_37xx_tbg_clk_probe()
132 priv->rates[i] = (xtal * mult) / div; in armada_37xx_tbg_clk_probe()
/openbmc/u-boot/arch/arm/mach-aspeed/ast2600/
H A Dboard_common.c173 u32 mult; in aspeed_mmc_init() local
205 mult = div = 1; in aspeed_mmc_init()
210 mult = (reg.b.m + 1) / (reg.b.n + 1); in aspeed_mmc_init()
213 rate = ((clkin * mult)/div); in aspeed_mmc_init()
/openbmc/u-boot/arch/arm/mach-keystone/
H A Dclock.c69 pllctl_reg_write(data->pll, mult, pllm & PLLM_MULT_LO_MASK); in configure_mult_div()
281 unsigned long mult = 1, prediv = 1, output_div = 2; in pll_freq_get() local
291 mult = ((tmp & CFG_PLLCTL0_PLLM_HI_MASK) >> in pll_freq_get()
293 (pllctl_reg_read(pll, mult) & in pll_freq_get()
299 ret = ret / prediv / output_div * mult; in pll_freq_get()
332 mult = ((tmp & CFG_PLLCTL0_PLLM_MASK) >> in pll_freq_get()
336 ret = ((ret / prediv) * mult) / output_div; in pll_freq_get()
/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dfixed-factor-clock.txt11 - clock-mult: fixed multiplier.
23 clock-mult = <1>;
/openbmc/openbmc/poky/scripts/lib/wic/
H A Dksparser.py74 mult = 1024
76 mult = 1
79 return size * mult
81 return size * mult * 1024
83 return size * mult * 1024 * 1024
/openbmc/qemu/tests/tcg/mips/user/isa/r5900/
H A Dtest_r5900_mult.c9 static int64_t mult(int32_t rs, int32_t rt) in mult() function
49 int64_t rd = mult(rs, rt); in mult_variants()
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mtk.h75 u32 mult; member
83 .mult = _mult, \
/openbmc/qemu/hw/net/
H A Di82596.c204 memset(&s->mult[0], 0, sizeof(s->mult)); in set_multicast_list()
218 assert(mcast_idx < 8 * sizeof(s->mult)); in set_multicast_list()
219 s->mult[mcast_idx >> 3] |= (1 << (mcast_idx & 7)); in set_multicast_list()
561 assert(mcast_idx < 8 * sizeof(s->mult)); in i82596_receive()
563 if (!(s->mult[mcast_idx >> 3] & (1 << (mcast_idx & 7)))) { in i82596_receive()

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