1*cac4d6a6SAdam Ford/* 2*cac4d6a6SAdam Ford * Device Tree Source for OMAP36xx clock data 3*cac4d6a6SAdam Ford * 4*cac4d6a6SAdam Ford * Copyright (C) 2013 Texas Instruments, Inc. 5*cac4d6a6SAdam Ford * 6*cac4d6a6SAdam Ford * This program is free software; you can redistribute it and/or modify 7*cac4d6a6SAdam Ford * it under the terms of the GNU General Public License version 2 as 8*cac4d6a6SAdam Ford * published by the Free Software Foundation. 9*cac4d6a6SAdam Ford */ 10*cac4d6a6SAdam Ford&cm_clocks { 11*cac4d6a6SAdam Ford dpll4_ck: dpll4_ck@d00 { 12*cac4d6a6SAdam Ford #clock-cells = <0>; 13*cac4d6a6SAdam Ford compatible = "ti,omap3-dpll-per-j-type-clock"; 14*cac4d6a6SAdam Ford clocks = <&sys_ck>, <&sys_ck>; 15*cac4d6a6SAdam Ford reg = <0x0d00>, <0x0d20>, <0x0d44>, <0x0d30>; 16*cac4d6a6SAdam Ford }; 17*cac4d6a6SAdam Ford 18*cac4d6a6SAdam Ford dpll4_m5x2_ck: dpll4_m5x2_ck@d00 { 19*cac4d6a6SAdam Ford #clock-cells = <0>; 20*cac4d6a6SAdam Ford compatible = "ti,hsdiv-gate-clock"; 21*cac4d6a6SAdam Ford clocks = <&dpll4_m5x2_mul_ck>; 22*cac4d6a6SAdam Ford ti,bit-shift = <0x1e>; 23*cac4d6a6SAdam Ford reg = <0x0d00>; 24*cac4d6a6SAdam Ford ti,set-rate-parent; 25*cac4d6a6SAdam Ford ti,set-bit-to-disable; 26*cac4d6a6SAdam Ford }; 27*cac4d6a6SAdam Ford 28*cac4d6a6SAdam Ford dpll4_m2x2_ck: dpll4_m2x2_ck@d00 { 29*cac4d6a6SAdam Ford #clock-cells = <0>; 30*cac4d6a6SAdam Ford compatible = "ti,hsdiv-gate-clock"; 31*cac4d6a6SAdam Ford clocks = <&dpll4_m2x2_mul_ck>; 32*cac4d6a6SAdam Ford ti,bit-shift = <0x1b>; 33*cac4d6a6SAdam Ford reg = <0x0d00>; 34*cac4d6a6SAdam Ford ti,set-bit-to-disable; 35*cac4d6a6SAdam Ford }; 36*cac4d6a6SAdam Ford 37*cac4d6a6SAdam Ford dpll3_m3x2_ck: dpll3_m3x2_ck@d00 { 38*cac4d6a6SAdam Ford #clock-cells = <0>; 39*cac4d6a6SAdam Ford compatible = "ti,hsdiv-gate-clock"; 40*cac4d6a6SAdam Ford clocks = <&dpll3_m3x2_mul_ck>; 41*cac4d6a6SAdam Ford ti,bit-shift = <0xc>; 42*cac4d6a6SAdam Ford reg = <0x0d00>; 43*cac4d6a6SAdam Ford ti,set-bit-to-disable; 44*cac4d6a6SAdam Ford }; 45*cac4d6a6SAdam Ford 46*cac4d6a6SAdam Ford dpll4_m3x2_ck: dpll4_m3x2_ck@d00 { 47*cac4d6a6SAdam Ford #clock-cells = <0>; 48*cac4d6a6SAdam Ford compatible = "ti,hsdiv-gate-clock"; 49*cac4d6a6SAdam Ford clocks = <&dpll4_m3x2_mul_ck>; 50*cac4d6a6SAdam Ford ti,bit-shift = <0x1c>; 51*cac4d6a6SAdam Ford reg = <0x0d00>; 52*cac4d6a6SAdam Ford ti,set-bit-to-disable; 53*cac4d6a6SAdam Ford }; 54*cac4d6a6SAdam Ford 55*cac4d6a6SAdam Ford dpll4_m6x2_ck: dpll4_m6x2_ck@d00 { 56*cac4d6a6SAdam Ford #clock-cells = <0>; 57*cac4d6a6SAdam Ford compatible = "ti,hsdiv-gate-clock"; 58*cac4d6a6SAdam Ford clocks = <&dpll4_m6x2_mul_ck>; 59*cac4d6a6SAdam Ford ti,bit-shift = <0x1f>; 60*cac4d6a6SAdam Ford reg = <0x0d00>; 61*cac4d6a6SAdam Ford ti,set-bit-to-disable; 62*cac4d6a6SAdam Ford }; 63*cac4d6a6SAdam Ford 64*cac4d6a6SAdam Ford uart4_fck: uart4_fck@1000 { 65*cac4d6a6SAdam Ford #clock-cells = <0>; 66*cac4d6a6SAdam Ford compatible = "ti,wait-gate-clock"; 67*cac4d6a6SAdam Ford clocks = <&per_48m_fck>; 68*cac4d6a6SAdam Ford reg = <0x1000>; 69*cac4d6a6SAdam Ford ti,bit-shift = <18>; 70*cac4d6a6SAdam Ford }; 71*cac4d6a6SAdam Ford}; 72*cac4d6a6SAdam Ford 73*cac4d6a6SAdam Ford&dpll4_m2x2_mul_ck { 74*cac4d6a6SAdam Ford clock-mult = <1>; 75*cac4d6a6SAdam Ford}; 76*cac4d6a6SAdam Ford 77*cac4d6a6SAdam Ford&dpll4_m3x2_mul_ck { 78*cac4d6a6SAdam Ford clock-mult = <1>; 79*cac4d6a6SAdam Ford}; 80*cac4d6a6SAdam Ford 81*cac4d6a6SAdam Ford&dpll4_m4x2_mul_ck { 82*cac4d6a6SAdam Ford ti,clock-mult = <1>; 83*cac4d6a6SAdam Ford}; 84*cac4d6a6SAdam Ford 85*cac4d6a6SAdam Ford&dpll4_m5x2_mul_ck { 86*cac4d6a6SAdam Ford ti,clock-mult = <1>; 87*cac4d6a6SAdam Ford}; 88*cac4d6a6SAdam Ford 89*cac4d6a6SAdam Ford&dpll4_m6x2_mul_ck { 90*cac4d6a6SAdam Ford clock-mult = <1>; 91*cac4d6a6SAdam Ford}; 92*cac4d6a6SAdam Ford 93*cac4d6a6SAdam Ford&cm_clockdomains { 94*cac4d6a6SAdam Ford dpll4_clkdm: dpll4_clkdm { 95*cac4d6a6SAdam Ford compatible = "ti,clockdomain"; 96*cac4d6a6SAdam Ford clocks = <&dpll4_ck>; 97*cac4d6a6SAdam Ford }; 98*cac4d6a6SAdam Ford 99*cac4d6a6SAdam Ford per_clkdm: per_clkdm { 100*cac4d6a6SAdam Ford compatible = "ti,clockdomain"; 101*cac4d6a6SAdam Ford clocks = <&uart3_fck>, <&gpio6_dbck>, <&gpio5_dbck>, 102*cac4d6a6SAdam Ford <&gpio4_dbck>, <&gpio3_dbck>, <&gpio2_dbck>, 103*cac4d6a6SAdam Ford <&wdt3_fck>, <&gpio6_ick>, <&gpio5_ick>, <&gpio4_ick>, 104*cac4d6a6SAdam Ford <&gpio3_ick>, <&gpio2_ick>, <&wdt3_ick>, <&uart3_ick>, 105*cac4d6a6SAdam Ford <&uart4_ick>, <&gpt9_ick>, <&gpt8_ick>, <&gpt7_ick>, 106*cac4d6a6SAdam Ford <&gpt6_ick>, <&gpt5_ick>, <&gpt4_ick>, <&gpt3_ick>, 107*cac4d6a6SAdam Ford <&gpt2_ick>, <&mcbsp2_ick>, <&mcbsp3_ick>, 108*cac4d6a6SAdam Ford <&mcbsp4_ick>, <&uart4_fck>; 109*cac4d6a6SAdam Ford }; 110*cac4d6a6SAdam Ford}; 111