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Searched refs:mrc (Results 1 – 25 of 148) sorted by relevance

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/openbmc/linux/arch/arm/mach-shmobile/
H A Dsetup-rcar-gen2.c136 struct memory_reserve_config *mrc = data; in rcar_gen2_scan_mem() local
162 if (size < mrc->reserved) in rcar_gen2_scan_mem()
165 if (base < mrc->base) in rcar_gen2_scan_mem()
169 mrc->base = base + size - mrc->reserved; in rcar_gen2_scan_mem()
170 mrc->size = mrc->reserved; in rcar_gen2_scan_mem()
178 struct memory_reserve_config mrc; in rcar_gen2_reserve() local
181 memset(&mrc, 0, sizeof(mrc)); in rcar_gen2_reserve()
182 mrc.reserved = SZ_256M; in rcar_gen2_reserve()
184 of_scan_flat_dt(rcar_gen2_scan_mem, &mrc); in rcar_gen2_reserve()
186 if (mrc.size && memblock_is_region_memory(mrc.base, mrc.size)) { in rcar_gen2_reserve()
[all …]
/openbmc/linux/drivers/soc/mediatek/
H A Dmtk-regulator-coupler.c36 struct mediatek_regulator_coupler *mrc = to_mediatek_coupler(coupler); in mediatek_regulator_balance_voltage() local
38 int vsram_min_uV = mrc->vsram_rdev->constraints->min_uV; in mediatek_regulator_balance_voltage()
39 int vsram_max_uV = mrc->vsram_rdev->constraints->max_uV; in mediatek_regulator_balance_voltage()
54 if (rdev == mrc->vsram_rdev) { in mediatek_regulator_balance_voltage()
89 rdev_get_name(mrc->vsram_rdev), min_uV); in mediatek_regulator_balance_voltage()
91 ret = regulator_set_voltage_rdev(mrc->vsram_rdev, vsram_target_min_uV, in mediatek_regulator_balance_voltage()
103 struct mediatek_regulator_coupler *mrc = to_mediatek_coupler(coupler); in mediatek_regulator_attach() local
117 if (mrc->vsram_rdev) in mediatek_regulator_attach()
119 mrc->vsram_rdev = rdev; in mediatek_regulator_attach()
130 struct mediatek_regulator_coupler *mrc = to_mediatek_coupler(coupler); in mediatek_regulator_detach() local
[all …]
/openbmc/u-boot/arch/arm/cpu/armv7/
H A Dstart.S84 mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
109 mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register
191 mrc p15, 0, r0, c1, c0, 0
204 mrc p15, 0, r0, c1, c0, 0 @ read system control register
210 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
216 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
222 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
227 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
233 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
239 mrc p15, 0, r1, c0, c0, 0 @ r1 has Read Main ID Register (MIDR)
[all …]
H A Dnonsec_virt.S32 mrc p15, 0, \tmp, c0, c1, 1 @ read ID_PFR1
61 mrc p15, 0, r5, c1, c0, 1
68 mrc p15, 0, r5, c1, c0, 1
74 mrc p15, 0, r5, c1, c1, 0 @ read SCR
93 mrc p15, 0, r4, c0, c1, 1 @ read ID_PFR1
118 mrc p15, 4, \addr, c15, c0, 0 @ read CBAR
180 mrc p15, 0, r0, c1, c1, 2
193 mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
/openbmc/linux/arch/arm/include/debug/
H A Dicedcc.S21 mrc p14, 0, \rx, c0, c1, 0
34 mrc p14, 0, \rx, c0, c1, 0
48 mrc p14, 0, \rx, c14, c0, 0
61 mrc p14, 0, \rx, c14, c0, 0
75 mrc p14, 0, \rx, c0, c0, 0
89 mrc p14, 0, \rx, c0, c0, 0
/openbmc/linux/arch/arm/mm/
H A Dproc-v7.S34 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
57 mrc p15, 0, r2, c1, c0, 0 @ ctrl register
136 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
137 mrc p15, 0, r5, c13, c0, 3 @ User r/o thread ID
140 mrc p15, 0, r6, c3, c0, 0 @ Domain ID
144 mrc p15, 0, r7, c2, c0, 1 @ TTB 1
146 mrc p15, 0, r11, c2, c0, 2 @ TTB control register
148 mrc p15, 0, r8, c1, c0, 0 @ Control register
149 mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register
150 mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control
[all …]
H A Dproc-v6.S41 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
59 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
108 mrc p15, 0, r2, c13, c0, 1 @ read current context ID
141 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
143 mrc p15, 0, r5, c3, c0, 0 @ Domain ID
144 mrc p15, 0, r6, c2, c0, 1 @ Translation table base 1
146 mrc p15, 0, r7, c1, c0, 1 @ auxiliary control register
147 mrc p15, 0, r8, c1, c0, 2 @ co-processor access control
148 mrc p15, 0, r9, c1, c0, 0 @ control register
199 ALT_SMP(mrc p15, 0, r0, c1, c0, 1) @ Enable SMP/nAMP mode
[all …]
H A Dabort-ev6.S22 mrc p15, 0, r1, c5, c0, 0 @ get FSR
23 mrc p15, 0, r0, c6, c0, 0 @ get FAR
29 mrc p15, 0, r3, c0, c0, 0 @ get processor id
H A Dproc-xsc3.S56 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15
89 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
109 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
416 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
417 mrc p15, 0, r5, c15, c1, 0 @ CP access reg
418 mrc p15, 0, r6, c13, c0, 0 @ PID
419 mrc p15, 0, r7, c3, c0, 0 @ domain ID
420 mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg
421 mrc p15, 0, r9, c1, c0, 0 @ control reg
460 mrc p15, 0, r0, c1, c0, 1 @ get auxiliary control reg
[all …]
H A Dproc-xscale.S69 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15
75 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15
116 mrc p15, 0, r1, c1, c0, 1
125 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
149 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
532 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
533 mrc p15, 0, r5, c15, c1, 0 @ CP access reg
534 mrc p15, 0, r6, c13, c0, 0 @ PID
535 mrc p15, 0, r7, c3, c0, 0 @ domain ID
536 mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg
[all …]
H A Dproc-arm926.S50 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
74 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
90 mrc p15, 0, r1, c1, c0, 0 @ Read control register
134 1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate
361 1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate
394 mrc p15, 0, r4, c13, c0, 0 @ PID
395 mrc p15, 0, r5, c3, c0, 0 @ Domain ID
396 mrc p15, 0, r6, c1, c0, 0 @ Control register
431 mrc p15, 0, r0, c1, c0 @ get control register v4
H A Dproc-mohawk.S41 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
65 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
345 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
346 mrc p15, 0, r5, c15, c1, 0 @ CP access reg
347 mrc p15, 0, r6, c13, c0, 0 @ PID
348 mrc p15, 0, r7, c3, c0, 0 @ domain ID
349 mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg
350 mrc p15, 0, r9, c1, c0, 0 @ control reg
H A Dproc-sa1100.S54 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
78 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
175 mrc p15, 0, r4, c3, c0, 0 @ domain ID
176 mrc p15, 0, r5, c13, c0, 0 @ PID
177 mrc p15, 0, r6, c1, c0, 0 @ control reg
208 mrc p15, 0, r0, c1, c0 @ get control register v4
/openbmc/u-boot/doc/device-tree-bindings/misc/
H A Dintel,baytrail-fsp.txt34 - fsp,mrc-debug-msg
51 - fsp,mrc-init-tseg-size
52 - fsp,mrc-init-mmio-size
53 - fsp,mrc-init-spd-addr1
54 - fsp,mrc-init-spd-addr2
102 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
103 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
104 fsp,mrc-init-spd-addr1 = <0xa0>;
105 fsp,mrc-init-spd-addr2 = <0xa2>;
/openbmc/linux/arch/arm/mach-sunxi/
H A Dheadsmp.S25 mrc p15, 0, r1, c0, c0, 0
37 mrc p15, 1, r1, c15, c0, 4
42 mrc p15, 1, r1, c15, c0, 0
50 mrc p15, 1, r1, c9, c0, 2
/openbmc/linux/arch/arm/mach-omap2/
H A Dsleep44xx.S88 mrc p15, 0, r0, c1, c0, 0
108 mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR
119 mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR
126 mrc p15, 0, r0, c1, c1, 2 @ Read NSACR data
146 mrc p15, 0, r5, c0, c0, 5 @ Read MPIDR
189 mrc p15, 0, r0, c1, c0, 0
201 mrc p15, 0, r0, c1, c0, 1
253 mrc p15, 0, r0, c0, c0, 5
270 mrc p15, 0, r0, c1, c0, 1
H A Domap-headsmp.S46 mrc p15, 0, r4, c0, c0, 5
64 mrc p15, 0, r4, c0, c0, 5
86 mrc p15, 0, r4, c0, c0, 5
103 mrc p15, 0, r4, c0, c0, 5
/openbmc/u-boot/arch/arm/mach-rmobile/
H A Dlowlevel_init_ca15.S14 mrc p15, 0, r4, c0, c0, 5 /* mpidr */
52 mrc p15, 0, r0, c0, c0, 5 /* r0 = MPIDR */
58 mrc p15, 1, r0, c9, c0, 2 /* r0 = L2CTLR */
72 mrc p15, 0, r0, c1, c0, 1
/openbmc/linux/drivers/net/hyperv/
H A Dnetvsc.c167 vfree(nvdev->chan_table[i].mrc.slots); in free_netvsc_device()
328 nvchan->mrc.slots = vzalloc_node(size, node); in netvsc_alloc_recv_comp_ring()
329 if (!nvchan->mrc.slots) in netvsc_alloc_recv_comp_ring()
330 nvchan->mrc.slots = vzalloc(size); in netvsc_alloc_recv_comp_ring()
332 return nvchan->mrc.slots ? 0 : -ENOMEM; in netvsc_alloc_recv_comp_ring()
1309 struct multi_recv_comp *mrc = &nvchan->mrc; in send_recv_completions() local
1319 while (mrc->first != mrc->next) { in send_recv_completions()
1321 = mrc->slots + mrc->first; in send_recv_completions()
1333 if (++mrc->first == nvdev->recv_completion_cnt) in send_recv_completions()
1334 mrc->first = 0; in send_recv_completions()
[all …]
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-socfpga.c456 struct mdio_regmap_config mrc; in socfpga_dwmac_probe() local
461 memset(&mrc, 0, sizeof(mrc)); in socfpga_dwmac_probe()
474 mrc.regmap = pcs_regmap; in socfpga_dwmac_probe()
475 mrc.parent = &pdev->dev; in socfpga_dwmac_probe()
476 mrc.valid_addr = 0x0; in socfpga_dwmac_probe()
477 mrc.autoscan = false; in socfpga_dwmac_probe()
479 snprintf(mrc.name, MII_BUS_ID_SIZE, "%s-pcs-mii", ndev->name); in socfpga_dwmac_probe()
480 pcs_bus = devm_mdio_regmap_register(&pdev->dev, &mrc); in socfpga_dwmac_probe()
/openbmc/u-boot/arch/x86/dts/
H A Dgalileo.dts8 #include <dt-bindings/mrc/quark.h>
48 mrc {
49 compatible = "intel,quark-mrc";
144 rw-mrc-cache {
145 label = "rw-mrc-cache";
H A Dcherryhill.dts152 rw-mrc-cache {
153 label = "rw-mrc-cache";
165 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_4MB>;
166 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
167 fsp,mrc-init-spd-addr1 = <0xa0>;
168 fsp,mrc-init-spd-addr2 = <0xa2>;
/openbmc/u-boot/arch/arm/cpu/armv7/sunxi/
H A Dfel_utils.S19 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register
21 mrc p15, 0, lr, c12, c0, 0 @ Read VBAR
23 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 Control Register
/openbmc/linux/arch/arm/mach-tegra/
H A Dsleep.S40 mrc p15, 0, r2, c1, c0, 0
65 mrc p15, 0, r0, c0, c0, 5
70 mrc p15, 0x1, r0, c9, c0, 2
116 mrc p15, 0, r3, c1, c0, 0
/openbmc/linux/arch/arm/mach-mvebu/
H A Dpmsu_ll.S14 mrc p15, 4, r1, c15, c0 @ get SCU base address
16 mrc p15, 0, r0, cr0, cr0, 5 @ get the CPU ID
35 mrc p15, 0, r1, c1, c0, 0

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