Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39 |
|
#
bfb345a7 |
| 17-Jul-2023 |
Rob Herring <robh@kernel.org> |
ARM: shmobile: rcar-gen2: Drop unused OF includes
of_platform.h is not needed, so drop it.
Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Lin
ARM: shmobile: rcar-gen2: Drop unused OF includes
of_platform.h is not needed, so drop it.
Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230717225614.3214179-1-robh@kernel.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
Revision tags: v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27 |
|
#
3238f82d |
| 03-Mar-2022 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: Drop commas after dt_compat sentinels
It does not make sense to have a comma after a sentinel, as any new elements must be added before the sentinel.
Signed-off-by: Geert Uytterhoeve
ARM: shmobile: Drop commas after dt_compat sentinels
It does not make sense to have a comma after a sentinel, as any new elements must be added before the sentinel.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ab4acc22eebb96a0747eb301c878b24b1200736a.1646311825.git.geert+renesas@glider.be
show more ...
|
Revision tags: v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9 |
|
#
0b1abd1f |
| 11-Sep-2020 |
Christoph Hellwig <hch@lst.de> |
dma-mapping: merge <linux/dma-contiguous.h> into <linux/dma-map-ops.h>
Merge dma-contiguous.h into dma-map-ops.h, after removing the comment describing the contiguous allocator into kernel/dma/conti
dma-mapping: merge <linux/dma-contiguous.h> into <linux/dma-map-ops.h>
Merge dma-contiguous.h into dma-map-ops.h, after removing the comment describing the contiguous allocator into kernel/dma/contigous.c.
Signed-off-by: Christoph Hellwig <hch@lst.de>
show more ...
|
Revision tags: v5.8.8 |
|
#
919c385d |
| 08-Sep-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: rcar-gen2: Make rcar_gen2_{timer_init, reserve}() static
As of commit 1e90fea35b80cfe1 ("ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition"), there are no more users of
ARM: shmobile: rcar-gen2: Make rcar_gen2_{timer_init, reserve}() static
As of commit 1e90fea35b80cfe1 ("ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition"), there are no more users of rcar_gen2_timer_init() and rcar_gen2_reserve() outside arch/arm/mach-shmobile/setup-rcar-gen2.c.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200908074403.4379-1-geert+renesas@glider.be
show more ...
|
Revision tags: v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36 |
|
#
135e7a15 |
| 23-Apr-2020 |
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> |
ARM: shmobile: r8a7742: Basic SoC support
Add minimal support for the RZ/G1H (R8A7742) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotar
ARM: shmobile: r8a7742: Basic SoC support
Add minimal support for the RZ/G1H (R8A7742) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1587678050-23468-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
Revision tags: v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20 |
|
#
92d8495c |
| 12-Feb-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: Replace <linux/clk-provider.h> by <linux/of_clk.h>
The R-Car Gen2 platform code is not a clock provider, and just needs to call of_clk_init().
Hence it can include <linux/of_clk.h> i
ARM: shmobile: Replace <linux/clk-provider.h> by <linux/of_clk.h>
The R-Car Gen2 platform code is not a clock provider, and just needs to call of_clk_init().
Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200212100830.446-6-geert+renesas@glider.be
show more ...
|
Revision tags: v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7 |
|
#
0a4319b5 |
| 16-Oct-2019 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: rcar-gen2: Drop legacy DT clock support
As of commit 362b334b17943d84 ("ARM: dts: r8a7791: Convert to new CPG/MSSR bindings"), all upstream R-Car Gen2 device tree source files use the
ARM: shmobile: rcar-gen2: Drop legacy DT clock support
As of commit 362b334b17943d84 ("ARM: dts: r8a7791: Convert to new CPG/MSSR bindings"), all upstream R-Car Gen2 device tree source files use the unified "Renesas Clock Pulse Generator / Module Standby and Software Reset" DT bindings.
Hence remove backward compatibility with old R-Car Gen2 device trees describing a hierarchical representation of the various CPG and MSTP clocks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191016150939.30620-1-geert+renesas@glider.be
show more ...
|
Revision tags: v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6 |
|
#
51a0daf6 |
| 29-May-2019 |
Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> |
ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
If PSCI is available then most likely we are running on PSCI-enabled U-Boot which, we assume, has already taken care of resetting
ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
If PSCI is available then most likely we are running on PSCI-enabled U-Boot which, we assume, has already taken care of resetting CNTVOFF and updating counter module before switching to non-secure mode and we don't need to.
As the psci_smp_available() helper always returns false if CONFIG_SMP is disabled, it can't be used safely as an indicator of PSCI usage. For that reason, we check for the mandatory PSCI operation to be available.
Please note, an extra check to prevent secure_cntvoff_init() from being called for secondary CPUs in headsmp-apmu.S is not needed, as SMP code for APMU based system is not executed if PSCI is in use.
Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
Revision tags: v5.1.5, v5.1.4, v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1, v4.19, v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10, v4.18.9 |
|
#
bc887153 |
| 11-Sep-2018 |
Biju Das <biju.das@bp.renesas.com> |
ARM: shmobile: r8a7744: Basic SoC support
Add minimal support for the RZ/G1N (R8A7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesa
ARM: shmobile: r8a7744: Basic SoC support
Add minimal support for the RZ/G1N (R8A7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
Revision tags: v4.18.7, v4.18.6, v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12, v4.17.11, v4.17.10, v4.17.9, v4.17.8, v4.17.7 |
|
#
54f464e0 |
| 12-Jul-2018 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or Cortex-A15 CPU cores, all of which have ARM architectured timers.
ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or Cortex-A15 CPU cores, all of which have ARM architectured timers.
Force use of the ARM architectured timer on these SoCs. This allows to: - Remove the calls to shmobile_init_delay() from the corresponding machine vectors, - Remove a check in timer setup specific to R-Car Gen2, - Remove a check in shmobile_init_delay().
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
Revision tags: v4.17.6, v4.17.5, v4.17.4, v4.17.3, v4.17.2 |
|
#
c44e182e |
| 13-Jun-2018 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
ARM: shmobile: convert to SPDX identifier
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Kuninori Morimoto <k
ARM: shmobile: convert to SPDX identifier
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
Revision tags: v4.17.1, v4.17 |
|
#
1e90fea3 |
| 18-May-2018 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition
Now r8a7791 no longer needs the SMP initialization fallback, it can use the common R-Car Gen2 machine definition, and the r8a7791-spe
ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition
Now r8a7791 no longer needs the SMP initialization fallback, it can use the common R-Car Gen2 machine definition, and the r8a7791-specific one can be removed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
#
78a9057f |
| 18-May-2018 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definition
Now r8a7790 no longer needs the SMP initialization fallback, it can use the common R-Car Gen2 machine definition, and the r8a7790-spe
ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definition
Now r8a7790 no longer needs the SMP initialization fallback, it can use the common R-Car Gen2 machine definition, and the r8a7790-specific one can be removed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
#
cad160ed |
| 04-May-2018 |
Mylène Josserand <mylene.josserand@bootlin.com> |
ARM: shmobile: Convert file to use cntvoff
Now that a common function is available for CNTVOFF's initialization, let's convert shmobile-apmu code to use this function.
Signed-off-by: Mylène Jossera
ARM: shmobile: Convert file to use cntvoff
Now that a common function is available for CNTVOFF's initialization, let's convert shmobile-apmu code to use this function.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
show more ...
|
Revision tags: v4.16 |
|
#
0c1d543b |
| 28-Mar-2018 |
Biju Das <biju.das@bp.renesas.com> |
ARM: shmobile: r8a77470: basic SoC support
Add minimal support for the RZ/G1C (R8A77470) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.rene
ARM: shmobile: r8a77470: basic SoC support
Add minimal support for the RZ/G1C (R8A77470) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
Revision tags: v4.15, v4.13.16, v4.14, v4.13.5, v4.13 |
|
#
3fd45a13 |
| 01-Sep-2017 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15
On Cortex-A7, the arch timer CNTVOFF register is uninitialized. Ideally it should be initialized by the boot loader, but it isn't
ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15
On Cortex-A7, the arch timer CNTVOFF register is uninitialized. Ideally it should be initialized by the boot loader, but it isn't.
For the boot CPU, CNTVOFF is initialized by Linux since commit 9ce3fa6816c2fb59 ("ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794"). For secondary CPU cores, no such initialization is done.
Hence when enabling SMP on r8a7794, the kernel log is spammed with:
WARNING: Underflow in clocksource 'arch_sys_counter' observed, time update ignored. Please report this, consider using a different clocksource, if possible. Your kernel is probably still fine.
As Marc Zyngier pointed out that Cortex-A15 and Cortex-A7 are similar with respect to CNTVOFF, we have been very lucky this just worked on R-Car Gen2 SoCs with Cortex-A15 cores.
To fix this: - Move the existing inline asm code to initialize CNTVOFF to an assembler source file (adding comments and replacing hardcoded constants by definitions in the process), so it can be reused, - Perform the initialization of CNTVOFF on the boot CPU (Cortex-A15 or Cortex-A7) on all R-Car Gen2 and RZ/G1 parts, - Wrap the standard secondary_startup() routine inside a routine which initializes CNTVOFF.
Based on patches by Hisashi Nakamura in the BSP.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
#
cd66fa4e |
| 18-Jul-2017 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: rcar-gen2: Correct arch timer frequency on RZ/G1E
According to the datasheet, the frequency of the ARM architecture timer on RZ/G1E depends on the frequency of the ZS clock, just like
ARM: shmobile: rcar-gen2: Correct arch timer frequency on RZ/G1E
According to the datasheet, the frequency of the ARM architecture timer on RZ/G1E depends on the frequency of the ZS clock, just like on R-Car E2 and V2H.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
#
cdcdfaad |
| 12-Jul-2017 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: rcar-gen2: Add support for CPG/MSSR bindings
When using the new CPG/MSSR bindings, there is no longer a "renesas,rcar-gen2-cpg-clocks" node, and the code to obtain the external clock
ARM: shmobile: rcar-gen2: Add support for CPG/MSSR bindings
When using the new CPG/MSSR bindings, there is no longer a "renesas,rcar-gen2-cpg-clocks" node, and the code to obtain the external clock crystal frequency falls back to a default of 20 MHz. While this is correct for all upstream R-Car Gen2 and RZ/G1 boards, this is not necessarily the case for out-of-tree third party boards.
Add support for finding the external clock crystal oscillator on RZ/G1M, and on R-Car H2, M2-W, and M2-N using the new CPG/MSSR bindings, through the corresponding "renesas,r8a77xx-cpg-mssr" nodes.
Note that this is not needed on R-Car V2H and E2, and on RZ/G1E, as on those SoCs the arch_timer and generic counter clock is derived from the ZS clock instead.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
Revision tags: v4.12 |
|
#
ba5d08c0 |
| 26-May-2017 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers: Rename clocksource_probe to timer_probe
The function name is now renamed to 'timer_probe' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change.
Signed-off
clocksource/drivers: Rename clocksource_probe to timer_probe
The function name is now renamed to 'timer_probe' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
show more ...
|
Revision tags: v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2, v4.10.1, v4.10, v4.9 |
|
#
70def3e5 |
| 05-Dec-2016 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()
After 1. commit 9f5ce39ddb8f68b3 ("ARM: shmobile: rcar-gen2: Obtain extal frequency from DT"), 2. commit 80951f04c3f92533
ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()
After 1. commit 9f5ce39ddb8f68b3 ("ARM: shmobile: rcar-gen2: Obtain extal frequency from DT"), 2. commit 80951f04c3f92533 ("ARM: shmobile: rcar-gen2: Stop passing mode pins state to clock driver"), 3. and handling of debug resource reset, there are no more users of rcar_gen2_read_mode_pins() left. Remove the function and its support definitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
Revision tags: openbmc-4.4-20161121-1, v4.4.33, v4.4.32, v4.4.31 |
|
#
47802fd7 |
| 04-Nov-2016 |
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> |
ARM: shmobile: r8a7745: basic SoC support
Add minimal support for the RZ/G1E (R8A7745) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geer
ARM: shmobile: r8a7745: basic SoC support
Add minimal support for the RZ/G1E (R8A7745) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
Revision tags: v4.4.30, v4.4.29, v4.4.28, v4.4.27, v4.7.10, openbmc-4.4-20161021-1, v4.7.9, v4.4.26, v4.7.8, v4.4.25, v4.4.24, v4.7.7, v4.8, v4.4.23, v4.7.6, v4.7.5, v4.4.22, v4.4.21, v4.7.4, v4.7.3, v4.4.20, v4.7.2, v4.4.19, openbmc-4.4-20160819-1, v4.7.1, v4.4.18, v4.4.17, openbmc-4.4-20160804-1, v4.4.16, v4.7, openbmc-4.4-20160722-1, openbmc-20160722-1, openbmc-20160713-1, v4.4.15, v4.6.4, v4.6.3, v4.4.14, v4.6.2, v4.4.13, openbmc-20160606-1, v4.6.1, v4.4.12, openbmc-20160521-1, v4.4.11, openbmc-20160518-1, v4.6, v4.4.10, openbmc-20160511-1, openbmc-20160505-1, v4.4.9, v4.4.8, v4.4.7, openbmc-20160329-2, openbmc-20160329-1, openbmc-20160321-1, v4.4.6, v4.5, v4.4.5, v4.4.4, v4.4.3, openbmc-20160222-1, v4.4.2, openbmc-20160212-1, openbmc-20160210-1, openbmc-20160202-2, openbmc-20160202-1, v4.4.1, openbmc-20160127-1, openbmc-20160120-1, v4.4, openbmc-20151217-1, openbmc-20151210-1, openbmc-20151202-1, openbmc-20151123-1, openbmc-20151118-1, openbmc-20151104-1, v4.3, openbmc-20151102-1, openbmc-20151028-1, v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6, v4.2-rc5, v4.2-rc4, v4.2-rc3, v4.2-rc2 |
|
#
80951f04 |
| 07-Jul-2015 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: rcar-gen2: Stop passing mode pins state to clock driver
Now the R-Car Gen2 CPG clock driver obtains the state of the mode pins from the R-Car RST driver, there's no longer a need to p
ARM: shmobile: rcar-gen2: Stop passing mode pins state to clock driver
Now the R-Car Gen2 CPG clock driver obtains the state of the mode pins from the R-Car RST driver, there's no longer a need to pass this state explicitly. Hence we can just call of_clk_init() instead.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
show more ...
|
#
a0c4e2cc |
| 17-Oct-2016 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions
The four SoCs use identical machine operations, consolidate them into two machine definitions in a single file.
Signed-off-by:
ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions
The four SoCs use identical machine operations, consolidate them into two machine definitions in a single file.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
#
e11fc795 |
| 31-Oct-2016 |
Simon Horman <horms@verge.net.au> |
ARM: shmobile: only call rcar_gen2_clocks_init() if present
The RZ/G1M (r8a7743) uses the R-Car Gen2 core, but not the R-Car Gen2 clock driver. This is a harbinger of a transition for R-Car Gen2 SoC
ARM: shmobile: only call rcar_gen2_clocks_init() if present
The RZ/G1M (r8a7743) uses the R-Car Gen2 core, but not the R-Car Gen2 clock driver. This is a harbinger of a transition for R-Car Gen2 SoCs. As the process to get all the required pieces in place is somewhat complex it seems useful to try to disentangle dependencies where possible.
The approach here is to temporarily disable calling rcar_gen2_clocks_init() if no R-Car Gen2 SoC are configured and thus the symbol will not be present.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
#
2477a356 |
| 13-Jun-2016 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H
According to the datasheet, the frequency of the ARM architecture timer on R-Car V2H depends on the frequency of the ZS clock, jus
ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H
According to the datasheet, the frequency of the ARM architecture timer on R-Car V2H depends on the frequency of the ZS clock, just like on R-Car E2.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|