ARM: shmobile: rcar-gen2: Drop unused OF includes

of_platform.h is not needed, so drop it.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lin

ARM: shmobile: rcar-gen2: Drop unused OF includes

of_platform.h is not needed, so drop it.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230717225614.3214179-1-robh@kernel.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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ARM: shmobile: Drop commas after dt_compat sentinels

It does not make sense to have a comma after a sentinel, as any new
elements must be added before the sentinel.

Signed-off-by: Geert Uytterhoeve

ARM: shmobile: Drop commas after dt_compat sentinels

It does not make sense to have a comma after a sentinel, as any new
elements must be added before the sentinel.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ab4acc22eebb96a0747eb301c878b24b1200736a.1646311825.git.geert+renesas@glider.be

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dma-mapping: merge <linux/dma-contiguous.h> into <linux/dma-map-ops.h>

Merge dma-contiguous.h into dma-map-ops.h, after removing the comment
describing the contiguous allocator into kernel/dma/conti

dma-mapping: merge <linux/dma-contiguous.h> into <linux/dma-map-ops.h>

Merge dma-contiguous.h into dma-map-ops.h, after removing the comment
describing the contiguous allocator into kernel/dma/contigous.c.

Signed-off-by: Christoph Hellwig <hch@lst.de>

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ARM: shmobile: rcar-gen2: Make rcar_gen2_{timer_init, reserve}() static

As of commit 1e90fea35b80cfe1 ("ARM: shmobile: r8a7791: Use common R-Car
Gen2 machine definition"), there are no more users of

ARM: shmobile: rcar-gen2: Make rcar_gen2_{timer_init, reserve}() static

As of commit 1e90fea35b80cfe1 ("ARM: shmobile: r8a7791: Use common R-Car
Gen2 machine definition"), there are no more users of
rcar_gen2_timer_init() and rcar_gen2_reserve() outside
arch/arm/mach-shmobile/setup-rcar-gen2.c.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200908074403.4379-1-geert+renesas@glider.be

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ARM: shmobile: r8a7742: Basic SoC support

Add minimal support for the RZ/G1H (R8A7742) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotar

ARM: shmobile: r8a7742: Basic SoC support

Add minimal support for the RZ/G1H (R8A7742) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1587678050-23468-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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ARM: shmobile: Replace <linux/clk-provider.h> by <linux/of_clk.h>

The R-Car Gen2 platform code is not a clock provider, and just needs to
call of_clk_init().

Hence it can include <linux/of_clk.h> i

ARM: shmobile: Replace <linux/clk-provider.h> by <linux/of_clk.h>

The R-Car Gen2 platform code is not a clock provider, and just needs to
call of_clk_init().

Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200212100830.446-6-geert+renesas@glider.be

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ARM: shmobile: rcar-gen2: Drop legacy DT clock support

As of commit 362b334b17943d84 ("ARM: dts: r8a7791: Convert to new
CPG/MSSR bindings"), all upstream R-Car Gen2 device tree source files
use the

ARM: shmobile: rcar-gen2: Drop legacy DT clock support

As of commit 362b334b17943d84 ("ARM: dts: r8a7791: Convert to new
CPG/MSSR bindings"), all upstream R-Car Gen2 device tree source files
use the unified "Renesas Clock Pulse Generator / Module Standby and
Software Reset" DT bindings.

Hence remove backward compatibility with old R-Car Gen2 device trees
describing a hierarchical representation of the various CPG and MSTP
clocks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191016150939.30620-1-geert+renesas@glider.be

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ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available

If PSCI is available then most likely we are running on PSCI-enabled
U-Boot which, we assume, has already taken care of resetting

ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available

If PSCI is available then most likely we are running on PSCI-enabled
U-Boot which, we assume, has already taken care of resetting CNTVOFF
and updating counter module before switching to non-secure mode
and we don't need to.

As the psci_smp_available() helper always returns false if CONFIG_SMP
is disabled, it can't be used safely as an indicator of PSCI usage.
For that reason, we check for the mandatory PSCI operation to be
available.

Please note, an extra check to prevent secure_cntvoff_init() from
being called for secondary CPUs in headsmp-apmu.S is not needed,
as SMP code for APMU based system is not executed if PSCI is in use.

Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: r8a7744: Basic SoC support

Add minimal support for the RZ/G1N (R8A7744) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesa

ARM: shmobile: r8a7744: Basic SoC support

Add minimal support for the RZ/G1N (R8A7744) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
Cortex-A15 CPU cores, all of which have ARM architectured timers.

ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
Cortex-A15 CPU cores, all of which have ARM architectured timers.

Force use of the ARM architectured timer on these SoCs.
This allows to:
- Remove the calls to shmobile_init_delay() from the corresponding
machine vectors,
- Remove a check in timer setup specific to R-Car Gen2,
- Remove a check in shmobile_init_delay().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: convert to SPDX identifier

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Kuninori Morimoto <k

ARM: shmobile: convert to SPDX identifier

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition

Now r8a7791 no longer needs the SMP initialization fallback, it can use
the common R-Car Gen2 machine definition, and the r8a7791-spe

ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition

Now r8a7791 no longer needs the SMP initialization fallback, it can use
the common R-Car Gen2 machine definition, and the r8a7791-specific one
can be removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definition

Now r8a7790 no longer needs the SMP initialization fallback, it can use
the common R-Car Gen2 machine definition, and the r8a7790-spe

ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definition

Now r8a7790 no longer needs the SMP initialization fallback, it can use
the common R-Car Gen2 machine definition, and the r8a7790-specific one
can be removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: Convert file to use cntvoff

Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.

Signed-off-by: Mylène Jossera

ARM: shmobile: Convert file to use cntvoff

Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.

Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

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ARM: shmobile: r8a77470: basic SoC support

Add minimal support for the RZ/G1C (R8A77470) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.rene

ARM: shmobile: r8a77470: basic SoC support

Add minimal support for the RZ/G1C (R8A77470) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15

On Cortex-A7, the arch timer CNTVOFF register is uninitialized.
Ideally it should be initialized by the boot loader, but it isn't

ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15

On Cortex-A7, the arch timer CNTVOFF register is uninitialized.
Ideally it should be initialized by the boot loader, but it isn't.

For the boot CPU, CNTVOFF is initialized by Linux since commit
9ce3fa6816c2fb59 ("ARM: shmobile: rcar-gen2: Add CA7 arch_timer
initialization for r8a7794").
For secondary CPU cores, no such initialization is done.

Hence when enabling SMP on r8a7794, the kernel log is spammed with:

WARNING: Underflow in clocksource 'arch_sys_counter' observed, time update ignored.
Please report this, consider using a different clocksource, if possible.
Your kernel is probably still fine.

As Marc Zyngier pointed out that Cortex-A15 and Cortex-A7 are similar with
respect to CNTVOFF, we have been very lucky this just worked on R-Car
Gen2 SoCs with Cortex-A15 cores.

To fix this:
- Move the existing inline asm code to initialize CNTVOFF to an
assembler source file (adding comments and replacing hardcoded
constants by definitions in the process), so it can be reused,
- Perform the initialization of CNTVOFF on the boot CPU (Cortex-A15 or
Cortex-A7) on all R-Car Gen2 and RZ/G1 parts,
- Wrap the standard secondary_startup() routine inside a routine which
initializes CNTVOFF.

Based on patches by Hisashi Nakamura in the BSP.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: rcar-gen2: Correct arch timer frequency on RZ/G1E

According to the datasheet, the frequency of the ARM architecture timer
on RZ/G1E depends on the frequency of the ZS clock, just like

ARM: shmobile: rcar-gen2: Correct arch timer frequency on RZ/G1E

According to the datasheet, the frequency of the ARM architecture timer
on RZ/G1E depends on the frequency of the ZS clock, just like on R-Car
E2 and V2H.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: rcar-gen2: Add support for CPG/MSSR bindings

When using the new CPG/MSSR bindings, there is no longer a
"renesas,rcar-gen2-cpg-clocks" node, and the code to obtain the external
clock

ARM: shmobile: rcar-gen2: Add support for CPG/MSSR bindings

When using the new CPG/MSSR bindings, there is no longer a
"renesas,rcar-gen2-cpg-clocks" node, and the code to obtain the external
clock crystal frequency falls back to a default of 20 MHz.
While this is correct for all upstream R-Car Gen2 and RZ/G1 boards, this
is not necessarily the case for out-of-tree third party boards.

Add support for finding the external clock crystal oscillator on RZ/G1M,
and on R-Car H2, M2-W, and M2-N using the new CPG/MSSR bindings, through
the corresponding "renesas,r8a77xx-cpg-mssr" nodes.

Note that this is not needed on R-Car V2H and E2, and on RZ/G1E, as on
those SoCs the arch_timer and generic counter clock is derived from the
ZS clock instead.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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clocksource/drivers: Rename clocksource_probe to timer_probe

The function name is now renamed to 'timer_probe' for consistency with
the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change.

Signed-off

clocksource/drivers: Rename clocksource_probe to timer_probe

The function name is now renamed to 'timer_probe' for consistency with
the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

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ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()

After
1. commit 9f5ce39ddb8f68b3 ("ARM: shmobile: rcar-gen2: Obtain extal
frequency from DT"),
2. commit 80951f04c3f92533

ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()

After
1. commit 9f5ce39ddb8f68b3 ("ARM: shmobile: rcar-gen2: Obtain extal
frequency from DT"),
2. commit 80951f04c3f92533 ("ARM: shmobile: rcar-gen2: Stop passing
mode pins state to clock driver"),
3. and handling of debug resource reset,
there are no more users of rcar_gen2_read_mode_pins() left.
Remove the function and its support definitions.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: r8a7745: basic SoC support

Add minimal support for the RZ/G1E (R8A7745) SoC.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geer

ARM: shmobile: r8a7745: basic SoC support

Add minimal support for the RZ/G1E (R8A7745) SoC.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: rcar-gen2: Stop passing mode pins state to clock driver

Now the R-Car Gen2 CPG clock driver obtains the state of the mode pins
from the R-Car RST driver, there's no longer a need to p

ARM: shmobile: rcar-gen2: Stop passing mode pins state to clock driver

Now the R-Car Gen2 CPG clock driver obtains the state of the mode pins
from the R-Car RST driver, there's no longer a need to pass this state
explicitly. Hence we can just call of_clk_init() instead.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>

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ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions

The four SoCs use identical machine operations, consolidate them into
two machine definitions in a single file.

Signed-off-by:

ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions

The four SoCs use identical machine operations, consolidate them into
two machine definitions in a single file.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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ARM: shmobile: only call rcar_gen2_clocks_init() if present

The RZ/G1M (r8a7743) uses the R-Car Gen2 core, but not the R-Car Gen2 clock
driver. This is a harbinger of a transition for R-Car Gen2 SoC

ARM: shmobile: only call rcar_gen2_clocks_init() if present

The RZ/G1M (r8a7743) uses the R-Car Gen2 core, but not the R-Car Gen2 clock
driver. This is a harbinger of a transition for R-Car Gen2 SoCs. As the
process to get all the required pieces in place is somewhat complex it
seems useful to try to disentangle dependencies where possible.

The approach here is to temporarily disable calling rcar_gen2_clocks_init()
if no R-Car Gen2 SoC are configured and thus the symbol will not be
present.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

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ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H

According to the datasheet, the frequency of the ARM architecture timer
on R-Car V2H depends on the frequency of the ZS clock, jus

ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H

According to the datasheet, the frequency of the ARM architecture timer
on R-Car V2H depends on the frequency of the ZS clock, just like on
R-Car E2.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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