Home
last modified time | relevance | path

Searched refs:li (Results 1 – 25 of 233) sorted by relevance

12345678910

/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dlowlevel_init.S79 li t3, 0x03
81 li t0, CKSEG1ADDR(AR71XX_RESET_BASE)
87 li t2, 0xfffff7ff
95 li t2, 0x20
105 li t1, 0x02110E
110 li t0, CKSEG1ADDR(AR933X_RTC_BASE)
111 li t1, 0x03
117 li t1, 0x00
122 li t1, 0x01
135 li t0, CKSEG1ADDR(AR933X_SRIF_BASE)
[all …]
/openbmc/phosphor-webui/app/common/styles/elements/
H A Dpaginate.scss2 .pagination li a {
17 .pagination li { background-color: transparent; list-style-type: none; }
30 .pagination li:not([class*="current"]) a:hover {
35 .pagination li:not([class*="current"]) a:focus,
36 .pagination li:not([class*="current"]) a:active {
40 .pagination li:first-of-type a {
44 .pagination li:first-of-type span,
45 .pagination li:last-of-type span,
46 .pagination li:nth-of-type(2) span,
47 .pagination li:nth-last-of-type(2) span {
[all …]
/openbmc/u-boot/board/imgtec/malta/
H A Dlowlevel_init.S38 li t1, MALTA_REVISION_CORID_CORE_LV
42 li t1, MALTA_REVISION_CORID_CORE_FPGA6
66 li t0, CPU_TO_GT32(0xdf000000)
73 li t0, CPU_TO_GT32(0xc0000000)
75 li t0, CPU_TO_GT32(0x40000000)
79 li t0, CPU_TO_GT32(0x80000000)
81 li t0, CPU_TO_GT32(0x3f000000)
84 li t0, CPU_TO_GT32(0xc1000000)
86 li t0, CPU_TO_GT32(0x5e000000)
98 li t1, 0x1 << MSC01_PBC_CLKCFG_SHF
[all …]
/openbmc/u-boot/arch/mips/mach-mt7620/
H A Dlowlevel_init.S66 li s0, CKSEG1ADDR(MT76XX_SYSCTL_BASE)
67 li s1, CKSEG1ADDR(MT76XX_MEMCTRL_BASE)
68 li s2, CKSEG1ADDR(MT76XX_RGCTRL_BASE)
71 li t1, DELAY_USEC(1000000)
89 li t2, ~0x0c
95 li t5, ~((0x0f << 8) | (0x0f << 0))
97 li t5, (10 << 8) | (1 << 0)
102 li t4, ~0x0F
120 li t0, DELAY_USEC(200 + 40)
121 li t1, 0x1
[all …]
/openbmc/webui-vue/tests/unit/__snapshots__/
H A DAppNavigation.spec.js.snap17 <li class="nav-item">
31 </li>
34 <li class="nav-item">
74 <li class="nav-item">
79 </li>
80 <li class="nav-item">
85 </li>
86 <li class="nav-item">
91 </li>
93 </li>
[all...]
/openbmc/u-boot/arch/nds32/include/asm/
H A Dmacro.h25 li $r4, \addr
26 li $r5, \data
31 li $r4, \addr
32 li $r5, \data
37 li $r4, \addr
38 li $r5, \data
48 li $r4, \addr
50 li $r6, \data
56 li $r4, \addr
71 li $r4, \time
/openbmc/qemu/tests/tcg/riscv64/
H A Dtest-noc.S7 li a0, 4 /* SIGILL */
9 li a2, 0
10 li a3, 8
11 li a7, __NR_rt_sigaction
15 li a0, 1
20 li a0, 0
22 li a7, __NR_exit
H A Dtest-mepc-masking.S19 li t0, 0x80004001
37 li t1, 2
58 li t0, 0x20026 /* ADP_Stopped_ApplicationExit */
61 li a0, 0x20 /* TARGET_SYS_EXIT_EXTENDED */
H A Dissue1060.S17 li a0, 0
33 li a0, 1
38 li t0, 0x20026 # ADP_Stopped_ApplicationExit
41 li a0, 0x20 # TARGET_SYS_EXIT_EXTENDED
/openbmc/u-boot/arch/nds32/cpu/n1213/ag101/
H A Dlowlevel_init.S82 li $r0, CONFIG_FTSDMC021_BASE
104 li $r0, SMC_BANK0_CR_A
109 li $r3, CONFIG_FTPMU010_BASE + BOARD_ID_REG
111 li $r4, BOARD_ID_FAMILY_MASK
113 li $r4, BOARD_ID_FAMILY_K7
119 li $r2, 0x00151151
124 li $r2, 0x00153153
199 li $r4, CONFIG_FTSDMC021_BASE
200 li $r5, 0x0
235 li $r5, AHBC_BSR6_A
[all …]
/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/static/css/
H A Dqunit-1.18.0.css1li{font-size:small;}#qunit-tests{font-size:smaller;}/**/#qunit-tests,#qunit-header,#qunit-banner,#…
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dlowlevel_init.S101 li t0, CKSEG1ADDR(AR71XX_RESET_BASE)
103 li t2, 0x08000000
108 li t2, 0xf7ffffff
114 li t0, CKSEG1ADDR(QCA953X_RTC_BASE)
115 li t1, 0x01
127 li t0, CKSEG1ADDR(QCA953X_SRIF_BASE)
128 li t1, MK_DPLL2(2, 16)
134 li t0, CKSEG1ADDR(AR71XX_PLL_BASE)
140 li t1, PLL_CPU_CONF_VAL
144 li t1, PLL_DDR_CONF_VAL
[all …]
/openbmc/qemu/tests/qtest/migration/ppc64/
H A Da-b-kernel.S12 li %r3,PPC_H_PUT_TERM_CHAR
13 li %r4,0
14 li %r5,1
15 li %r6,\ch
29 li %r10,-1
44 li %r10,TEST_MEM_PAGE_SIZE
49 li %r3,0
/openbmc/u-boot/arch/mips/mach-jz47xx/
H A Dstart.S36 li t0, 0x0040FC04
41 li t1, 0x00800000
53 li sp, CONFIG_SPL_STACK
66 li t0, KSEG0
73 li t0, KSEG0
88 li t0, CONF_CM_CACHABLE_NONCOHERENT
/openbmc/webui-vue/src/views/Operations/FactoryReset/
H A DFactoryResetModal.vue14 <li class="mt-1 mb-1">
16 </li>
17 <li class="mt-1 mb-1">
19 </li>
22 <li class="mt-1 mb-1">
24 </li>
25 <li class="mt-1 mb-1">
27 </li>
28 <li class="mt-1 mb-1">
30 </li>
[all …]
/openbmc/u-boot/arch/mips/lib/
H A Dcache_init.S55 li \sz, 2
76 li $1, 32
153 li t2, 2
162 li t2, 64
169 li R_L2_BYPASSED, 1
195 li t1, 2
206 li t1, 64
223 li R_IC_SIZE, CONFIG_SYS_ICACHE_SIZE
224 li R_IC_LINE, CONFIG_SYS_ICACHE_LINE_SIZE
230 li R_DC_SIZE, CONFIG_SYS_DCACHE_SIZE
[all …]
/openbmc/u-boot/arch/nds32/cpu/n1213/
H A Dstart.S115 li $r0, 0x0
123 li $r0, ~0x6
128 li $r0, ~0x3
136 li $r0, 0x4
147 li $r0, ~0x18
154 li $r0, ~0x6000
162 li $r0, 0x1
169 li $r0, 0x2
208 li $sp, CONFIG_SYS_INIT_SP_ADDR
216 li $r0, 0x00000000
[all …]
/openbmc/u-boot/arch/mips/mach-mscc/
H A Dlowlevel_init_luton.S30 li v1, 0x00610400
33 li v1, 0x00610c00
36 li v1, 0x00610800
39 li v1, 0x00610000
53 li v1, ~MACRO_CTRL_PLL5G_CFG_PLL5G_CFG0_CPU_CLK_DIV
/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A Dstart.S77 li r3, MSR_KERNEL /* Set ME, RI flags */
138 li r2, 0x0007
160 li r0, (0x2000 / 4)
162 li r0, 0
281 li r22,0
294 li r4,0
347 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
429 li r0,__got2_entries@sectoff@l
446 li r0,__fixup_entries@sectoff@l
471 li r0, 0
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dcache.S75 li r5,CACHE_LINE_SIZE-1
102 li r5,CACHE_LINE_SIZE-1
126 li r4,4096/CACHE_LINE_SIZE /* Number of lines in a page */
149 li r4,4096/CACHE_LINE_SIZE /* Number of lines in a page */
164 li r0,4096/CACHE_LINE_SIZE
176 li r5, HID0_ICFI|HID0_ILOCK
194 li r5, 0
212 li r5, HID0_DCFI|HID0_DLOCK
228 li r5, HID0_DCFI|HID0_DLOCK
255 li r5, HID0_DCFI|HID0_DLOCK
[all …]
H A Dstart.S144 li r0, 0
229 li r0, 0 /* Make room for stack frame header and */
275 li r3, 0 /* clear boot_flag for calling board_init_f */
284 li r0, 0
502 li r22,0
515 li r4,0
662 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
740 li r0,__got2_entries@sectoff@l
757 li r0,__fixup_entries@sectoff@l
782 li r0, 0
[all …]
/openbmc/u-boot/board/qemu-mips/
H A Dlowlevel_init.S18 li t1, 0x00400000
25 li t1, 0x00000003
32 li t1, 0x00800000
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Drelease.S47 li r3,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
67 li r4,CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
72 li r4,CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2
84 li r4,0x48
97 li r3,0
222 li r5,0x30
307 li r11,0
385 li r3,0
386 li r8,1
426 li r8,3
[all …]
H A Dstart.S79 li r1,MSR_DE
92 li r4,CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
97 li r4,CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2
103 li r27,0
106 1: li r27,1 /* Remember for later that we have the erratum */
111 li r4,0x48
169 li r0,2
225 li \scratch, 0
237 li \scratch, 0
254 li r4,CriticalInput@l
[all …]
/openbmc/webui-vue/src/views/Operations/Firmware/
H A DFirmwareAlertServerPower.vue16 <li>
18 </li>
19 <li>
21 </li>

12345678910