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/openbmc/u-boot/drivers/mmc/
H A Dsh_sdhi.c37 static inline void sh_sdhi_writeq(struct sh_sdhi_host *host, int reg, u64 val) in sh_sdhi_writeq() argument
39 writeq(val, host->addr + (reg << host->bus_shift)); in sh_sdhi_writeq()
42 static inline u64 sh_sdhi_readq(struct sh_sdhi_host *host, int reg) in sh_sdhi_readq() argument
44 return readq(host->addr + (reg << host->bus_shift)); in sh_sdhi_readq()
47 static inline void sh_sdhi_writew(struct sh_sdhi_host *host, int reg, u16 val) in sh_sdhi_writew() argument
49 writew(val, host->addr + (reg << host->bus_shift)); in sh_sdhi_writew()
52 static inline u16 sh_sdhi_readw(struct sh_sdhi_host *host, int reg) in sh_sdhi_readw() argument
54 return readw(host->addr + (reg << host->bus_shift)); in sh_sdhi_readw()
57 static void sh_sdhi_detect(struct sh_sdhi_host *host) in sh_sdhi_detect() argument
59 sh_sdhi_writew(host, SDHI_OPTION, in sh_sdhi_detect()
[all …]
H A Dsh_mmcif.c26 struct sh_mmcif_host *host = dev_id; in sh_mmcif_intr() local
29 state = sh_mmcif_read(&host->regs->ce_int); in sh_mmcif_intr()
30 state &= sh_mmcif_read(&host->regs->ce_int_mask); in sh_mmcif_intr()
33 sh_mmcif_write(~(INT_RBSYE | INT_CRSPE), &host->regs->ce_int); in sh_mmcif_intr()
34 sh_mmcif_bitclr(MASK_MRBSYE, &host->regs->ce_int_mask); in sh_mmcif_intr()
37 sh_mmcif_write(~INT_CRSPE, &host->regs->ce_int); in sh_mmcif_intr()
38 sh_mmcif_bitclr(MASK_MCRSPE, &host->regs->ce_int_mask); in sh_mmcif_intr()
40 if (sh_mmcif_read(&host->regs->ce_cmd_set) & CMD_SET_RBSY) in sh_mmcif_intr()
44 sh_mmcif_write(~INT_BUFREN, &host->regs->ce_int); in sh_mmcif_intr()
45 sh_mmcif_bitclr(MASK_MBUFREN, &host->regs->ce_int_mask); in sh_mmcif_intr()
[all …]
H A Dbcm2835_sdhost.c182 static void bcm2835_dumpregs(struct bcm2835_host *host) in bcm2835_dumpregs() argument
185 dev_dbg(dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD)); in bcm2835_dumpregs()
186 dev_dbg(dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG)); in bcm2835_dumpregs()
187 dev_dbg(dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT)); in bcm2835_dumpregs()
188 dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); in bcm2835_dumpregs()
189 dev_dbg(dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0)); in bcm2835_dumpregs()
190 dev_dbg(dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1)); in bcm2835_dumpregs()
191 dev_dbg(dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2)); in bcm2835_dumpregs()
192 dev_dbg(dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3)); in bcm2835_dumpregs()
193 dev_dbg(dev, "SDHSTS 0x%08x\n", readl(host->ioaddr + SDHSTS)); in bcm2835_dumpregs()
[all …]
H A Dexynos_dw_mmc.c38 struct dwmci_host host; member
47 static void exynos_dwmci_clksel(struct dwmci_host *host) in exynos_dwmci_clksel() argument
51 container_of(host, struct dwmci_exynos_priv_data, host); in exynos_dwmci_clksel()
53 struct dwmci_exynos_priv_data *priv = host->priv; in exynos_dwmci_clksel()
55 dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); in exynos_dwmci_clksel()
58 unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) in exynos_dwmci_get_clk() argument
69 clk_div = ((dwmci_readl(host, DWMCI_CLKSEL) >> DWMCI_DIVRATIO_BIT) in exynos_dwmci_get_clk()
71 sclk = get_mmc_clk(host->dev_index); in exynos_dwmci_get_clk()
77 return sclk / clk_div / (host->div + 1); in exynos_dwmci_get_clk()
80 static void exynos_dwmci_board_init(struct dwmci_host *host) in exynos_dwmci_board_init() argument
[all …]
H A Dsdhci.c22 static void sdhci_reset(struct sdhci_host *host, u8 mask) in sdhci_reset() argument
28 sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); in sdhci_reset()
29 while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { in sdhci_reset()
40 static void sdhci_cmd_done(struct sdhci_host *host, struct mmc_cmd *cmd) in sdhci_cmd_done() argument
46 cmd->response[i] = sdhci_readl(host, in sdhci_cmd_done()
49 cmd->response[i] |= sdhci_readb(host, in sdhci_cmd_done()
53 cmd->response[0] = sdhci_readl(host, SDHCI_RESPONSE); in sdhci_cmd_done()
57 static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) in sdhci_transfer_pio() argument
64 *(u32 *)offs = sdhci_readl(host, SDHCI_BUFFER); in sdhci_transfer_pio()
66 sdhci_writel(host, *(u32 *)offs, SDHCI_BUFFER); in sdhci_transfer_pio()
[all …]
H A Dmtk-sd.c286 static void msdc_reset_hw(struct msdc_host *host) in msdc_reset_hw() argument
290 setbits_le32(&host->base->msdc_cfg, MSDC_CFG_RST); in msdc_reset_hw()
292 readl_poll_timeout(&host->base->msdc_cfg, reg, in msdc_reset_hw()
296 static void msdc_fifo_clr(struct msdc_host *host) in msdc_fifo_clr() argument
300 setbits_le32(&host->base->msdc_fifocs, MSDC_FIFOCS_CLR); in msdc_fifo_clr()
302 readl_poll_timeout(&host->base->msdc_fifocs, reg, in msdc_fifo_clr()
306 static u32 msdc_fifo_rx_bytes(struct msdc_host *host) in msdc_fifo_rx_bytes() argument
308 return (readl(&host->base->msdc_fifocs) & in msdc_fifo_rx_bytes()
312 static u32 msdc_fifo_tx_bytes(struct msdc_host *host) in msdc_fifo_tx_bytes() argument
314 return (readl(&host->base->msdc_fifocs) & in msdc_fifo_tx_bytes()
[all …]
H A Dmxcmmc.c127 static struct mxcmci_host *host = &mxcmci_host; variable
129 static inline int mxcmci_use_dma(struct mxcmci_host *host) in mxcmci_use_dma() argument
131 return host->do_dma; in mxcmci_use_dma()
134 static void mxcmci_softreset(struct mxcmci_host *host) in mxcmci_softreset() argument
139 writel(STR_STP_CLK_RESET, &host->base->str_stp_clk); in mxcmci_softreset()
141 &host->base->str_stp_clk); in mxcmci_softreset()
144 writel(STR_STP_CLK_START_CLK, &host->base->str_stp_clk); in mxcmci_softreset()
146 writel(0xff, &host->base->res_to); in mxcmci_softreset()
149 static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data) in mxcmci_setup_data() argument
155 host->data = data; in mxcmci_setup_data()
[all …]
H A Ds5p_sdhci.c29 static void s5p_sdhci_set_control_reg(struct sdhci_host *host) in s5p_sdhci_set_control_reg() argument
39 sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4); in s5p_sdhci_set_control_reg()
41 val = sdhci_readl(host, SDHCI_CONTROL2); in s5p_sdhci_set_control_reg()
49 sdhci_writel(host, val, SDHCI_CONTROL2); in s5p_sdhci_set_control_reg()
61 sdhci_writel(host, val, SDHCI_CONTROL3); in s5p_sdhci_set_control_reg()
69 ctrl = sdhci_readl(host, SDHCI_CONTROL2); in s5p_sdhci_set_control_reg()
72 sdhci_writel(host, ctrl, SDHCI_CONTROL2); in s5p_sdhci_set_control_reg()
75 static void s5p_set_clock(struct sdhci_host *host, u32 div) in s5p_set_clock() argument
78 set_mmc_clk(host->index, div); in s5p_set_clock()
86 static int s5p_sdhci_core_init(struct sdhci_host *host) in s5p_sdhci_core_init() argument
[all …]
H A Ddw_mmc.c19 static int dwmci_wait_reset(struct dwmci_host *host, u32 value) in dwmci_wait_reset() argument
24 dwmci_writel(host, DWMCI_CTRL, value); in dwmci_wait_reset()
27 ctrl = dwmci_readl(host, DWMCI_CTRL); in dwmci_wait_reset()
45 static void dwmci_prepare_data(struct dwmci_host *host, in dwmci_prepare_data() argument
57 dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); in dwmci_prepare_data()
60 dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF); in dwmci_prepare_data()
63 dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); in dwmci_prepare_data()
87 ctrl = dwmci_readl(host, DWMCI_CTRL); in dwmci_prepare_data()
89 dwmci_writel(host, DWMCI_CTRL, ctrl); in dwmci_prepare_data()
91 ctrl = dwmci_readl(host, DWMCI_BMOD); in dwmci_prepare_data()
[all …]
H A Dxenon_sdhci.c121 struct sdhci_host host; member
131 static int xenon_mmc_phy_init(struct sdhci_host *host) in xenon_mmc_phy_init() argument
133 struct xenon_sdhci_priv *priv = host->mmc->priv; in xenon_mmc_phy_init()
139 var = sdhci_readl(host, EMMC_PHY_TIMING_ADJUST); in xenon_mmc_phy_init()
147 sdhci_writel(host, var, EMMC_PHY_TIMING_ADJUST); in xenon_mmc_phy_init()
153 var = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_mmc_phy_init()
166 var = sdhci_readl(host, EMMC_PHY_TIMING_ADJUST); in xenon_mmc_phy_init()
168 sdhci_writel(host, var, EMMC_PHY_TIMING_ADJUST); in xenon_mmc_phy_init()
179 var = sdhci_readl(host, EMMC_PHY_TIMING_ADJUST); in xenon_mmc_phy_init()
199 static void armada_3700_soc_pad_voltage_set(struct sdhci_host *host) in armada_3700_soc_pad_voltage_set() argument
[all …]
H A Dzynq_sdhci.c27 struct sdhci_host *host; member
58 static void arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 deviceid) in arasan_zynqmp_dll_reset() argument
63 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
65 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
72 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in arasan_zynqmp_dll_reset()
75 dev_err(mmc_dev(host->mmc), in arasan_zynqmp_dll_reset()
84 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
92 struct sdhci_host *host; in arasan_sdhci_execute_tuning() local
99 host = priv->host; in arasan_sdhci_execute_tuning()
102 ctrl = sdhci_readw(host, SDHCI_HOST_CTRL2); in arasan_sdhci_execute_tuning()
[all …]
H A Darm_pl180_mmci.c39 struct pl180_mmc_host *host = dev->priv; in wait_for_command_end() local
48 hoststatus = readl(&host->base->status) & statusmask; in wait_for_command_end()
51 writel(statusmask, &host->base->status_clear); in wait_for_command_end()
62 cmd->response[0] = readl(&host->base->response0); in wait_for_command_end()
63 cmd->response[1] = readl(&host->base->response1); in wait_for_command_end()
64 cmd->response[2] = readl(&host->base->response2); in wait_for_command_end()
65 cmd->response[3] = readl(&host->base->response3); in wait_for_command_end()
80 struct pl180_mmc_host *host = dev->priv; in do_command() local
90 writel((u32)cmd->cmdarg, &host->base->argument); in do_command()
92 writel(sdi_cmd, &host->base->command); in do_command()
[all …]
H A Dkona_sdhci.c22 static int init_kona_mmc_core(struct sdhci_host *host) in init_kona_mmc_core() argument
27 if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) { in init_kona_mmc_core()
33 mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET; in init_kona_mmc_core()
34 sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET); in init_kona_mmc_core()
46 (sdhci_readl(host, SDHCI_CORECTRL_OFFSET) & in init_kona_mmc_core()
51 sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET); in init_kona_mmc_core()
54 mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET); in init_kona_mmc_core()
55 sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET); in init_kona_mmc_core()
58 sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET); in init_kona_mmc_core()
61 mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET); in init_kona_mmc_core()
[all …]
H A Dbcm2835_sdhci.c59 struct sdhci_host host; member
64 static inline struct bcm2835_sdhci_host *to_bcm(struct sdhci_host *host) in to_bcm() argument
66 return (struct bcm2835_sdhci_host *)host; in to_bcm()
69 static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val, in bcm2835_sdhci_raw_writel() argument
72 struct bcm2835_sdhci_host *bcm_host = to_bcm(host); in bcm2835_sdhci_raw_writel()
88 writel(val, host->ioaddr + reg); in bcm2835_sdhci_raw_writel()
92 static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg) in bcm2835_sdhci_raw_readl() argument
94 return readl(host->ioaddr + reg); in bcm2835_sdhci_raw_readl()
97 static void bcm2835_sdhci_writel(struct sdhci_host *host, u32 val, int reg) in bcm2835_sdhci_writel() argument
99 bcm2835_sdhci_raw_writel(host, val, reg); in bcm2835_sdhci_writel()
[all …]
H A Dhi6220_dw_mmc.c22 struct dwmci_host host; member
28 struct dwmci_host *host = &priv->host; in hi6220_dwmmc_ofdata_to_platdata() local
30 host->name = dev->name; in hi6220_dwmmc_ofdata_to_platdata()
31 host->ioaddr = (void *)devfdt_get_addr(dev); in hi6220_dwmmc_ofdata_to_platdata()
32 host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), in hi6220_dwmmc_ofdata_to_platdata()
37 host->dev_index = 0; in hi6220_dwmmc_ofdata_to_platdata()
39 host->dev_index = 1; in hi6220_dwmmc_ofdata_to_platdata()
41 host->priv = priv; in hi6220_dwmmc_ofdata_to_platdata()
51 struct dwmci_host *host = &priv->host; in hi6220_dwmmc_probe() local
54 host->bus_hz = 50000000; in hi6220_dwmmc_probe()
[all …]
H A Daspeed_sdhci.c27 struct sdhci_host *host; member
36 struct sdhci_host *host = prv->host; in aspeed_sdhci_probe() local
62 &host->pwr_gpio, GPIOD_IS_OUT); in aspeed_sdhci_probe()
63 if (dm_gpio_is_valid(&host->pwr_gpio)) { in aspeed_sdhci_probe()
65 dm_gpio_set_value(&host->pwr_gpio, 1); in aspeed_sdhci_probe()
74 &host->pwr_sw_gpio, GPIOD_IS_OUT); in aspeed_sdhci_probe()
76 if (dm_gpio_is_valid(&host->pwr_sw_gpio)) { in aspeed_sdhci_probe()
77 dm_gpio_set_value(&host->pwr_sw_gpio, 1); in aspeed_sdhci_probe()
85 host->max_clk = clock; in aspeed_sdhci_probe()
88 host->bus_width = dev_read_u32_default(dev, "bus-width", 4); in aspeed_sdhci_probe()
[all …]
H A Dsocfpga_dw_mmc.c33 struct dwmci_host host; member
52 static void socfpga_dwmci_clksel(struct dwmci_host *host) in socfpga_dwmci_clksel() argument
54 struct dwmci_socfpga_priv_data *priv = host->priv; in socfpga_dwmci_clksel()
77 struct dwmci_host *host = &priv->host; in socfpga_dwmmc_get_clk_rate() local
86 host->bus_hz = clk_get_rate(&clk); in socfpga_dwmmc_get_clk_rate()
91 host->bus_hz = cm_get_mmc_controller_clk_hz(); in socfpga_dwmmc_get_clk_rate()
93 if (host->bus_hz == 0) { in socfpga_dwmmc_get_clk_rate()
104 struct dwmci_host *host = &priv->host; in socfpga_dwmmc_ofdata_to_platdata() local
114 host->name = dev->name; in socfpga_dwmmc_ofdata_to_platdata()
115 host->ioaddr = (void *)devfdt_get_addr(dev); in socfpga_dwmmc_ofdata_to_platdata()
[all …]
H A Datmel_sdhci.c20 struct sdhci_host *host; in atmel_sdhci_init() local
23 host = (struct sdhci_host *)calloc(1, sizeof(struct sdhci_host)); in atmel_sdhci_init()
24 if (!host) { in atmel_sdhci_init()
29 host->name = "atmel_sdhci"; in atmel_sdhci_init()
30 host->ioaddr = regbase; in atmel_sdhci_init()
31 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD; in atmel_sdhci_init()
35 free(host); in atmel_sdhci_init()
38 host->max_clk = max_clk; in atmel_sdhci_init()
40 add_sdhci(host, 0, min_clk); in atmel_sdhci_init()
58 struct sdhci_host *host = dev_get_priv(dev); in atmel_sdhci_probe() local
[all …]
/openbmc/qemu/hw/sd/
H A Domap_mmc.c80 static void omap_mmc_fifolevel_update(OMAPMMCState *host) in omap_mmc_fifolevel_update() argument
82 if (!host->transfer && !host->fifo_len) { in omap_mmc_fifolevel_update()
83 host->status &= 0xf3ff; in omap_mmc_fifolevel_update()
87 if (host->fifo_len > host->af_level && host->ddir) { in omap_mmc_fifolevel_update()
88 if (host->rx_dma) { in omap_mmc_fifolevel_update()
89 host->status &= 0xfbff; in omap_mmc_fifolevel_update()
90 qemu_irq_raise(host->dma_rx_gpio); in omap_mmc_fifolevel_update()
92 host->status |= 0x0400; in omap_mmc_fifolevel_update()
94 host->status &= 0xfbff; in omap_mmc_fifolevel_update()
95 qemu_irq_lower(host->dma_rx_gpio); in omap_mmc_fifolevel_update()
[all …]
/openbmc/u-boot/scripts/
H A DMakefile.host28 host-csingle := $(foreach m,$(__hostprogs), \
32 host-cmulti := $(foreach m,$(__hostprogs),\
36 host-shared := $(foreach m,$(__hostprogs),\
40 host-cobjs := $(sort $(foreach m,$(__hostprogs),$($(m)-objs)))
45 host-cxxmulti := $(foreach m,$(__hostprogs),$(if $($(m)-cxxobjs),$(m)))
48 host-cxxobjs := $(sort $(foreach m,$(host-cxxmulti),$($(m)-cxxobjs)))
53 host-objdirs := $(dir $(__hostprogs) $(host-cobjs) $(host-cxxobjs))
55 host-objdirs := $(strip $(sort $(filter-out ./,$(host-objdirs))))
59 host-csingle := $(addprefix $(obj)/,$(host-csingle))
60 host-cmulti := $(addprefix $(obj)/,$(host-cmulti))
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dmxc_nand.c36 static struct mxc_nand_host *host = &mxc_host; variable
112 static void wait_op_done(struct mxc_nand_host *host, int max_retries, argument
119 tmp = readnfc(&host->regs->config2);
122 writenfc(tmp, &host->regs->config2);
124 tmp = readnfc(&host->ip_regs->ipc);
127 writenfc(tmp, &host->ip_regs->ipc);
143 static void send_cmd(struct mxc_nand_host *host, uint16_t cmd) argument
147 writenfc(cmd, &host->regs->flash_cmd);
148 writenfc(NFC_CMD, &host->regs->operation);
151 wait_op_done(host, TROP_US_DELAY, cmd);
[all …]
H A Datmel_nand.c106 static void __iomem *pmecc_get_alpha_to(struct atmel_nand_host *host) in pmecc_get_alpha_to() argument
110 table_size = host->pmecc_sector_size == 512 ? in pmecc_get_alpha_to()
114 return host->pmecc_rom_base + host->pmecc_index_table_offset + in pmecc_get_alpha_to()
118 static void pmecc_data_free(struct atmel_nand_host *host) in pmecc_data_free() argument
120 free(host->pmecc_partial_syn); in pmecc_data_free()
121 free(host->pmecc_si); in pmecc_data_free()
122 free(host->pmecc_lmu); in pmecc_data_free()
123 free(host->pmecc_smu); in pmecc_data_free()
124 free(host->pmecc_mu); in pmecc_data_free()
125 free(host->pmecc_dmu); in pmecc_data_free()
[all …]
/openbmc/u-boot/drivers/usb/musb-new/
H A Dmusb_uboot.c65 struct musb *host = hcd->hcd_priv; in submit_urb() local
79 host->isr(0, host); in submit_urb()
89 static int _musb_submit_control_msg(struct musb_host_data *host, in _musb_submit_control_msg() argument
93 construct_urb(&host->urb, &host->hep, dev, USB_ENDPOINT_XFER_CONTROL, in _musb_submit_control_msg()
98 dev->speed = host->host_speed; in _musb_submit_control_msg()
100 return submit_urb(&host->hcd, &host->urb); in _musb_submit_control_msg()
103 static int _musb_submit_bulk_msg(struct musb_host_data *host, in _musb_submit_bulk_msg() argument
106 construct_urb(&host->urb, &host->hep, dev, USB_ENDPOINT_XFER_BULK, in _musb_submit_bulk_msg()
108 return submit_urb(&host->hcd, &host->urb); in _musb_submit_bulk_msg()
111 static int _musb_submit_int_msg(struct musb_host_data *host, in _musb_submit_int_msg() argument
[all …]
/openbmc/u-boot/include/
H A Dsdhci.h244 u32 (*read_l)(struct sdhci_host *host, int reg);
245 u16 (*read_w)(struct sdhci_host *host, int reg);
246 u8 (*read_b)(struct sdhci_host *host, int reg);
247 void (*write_l)(struct sdhci_host *host, u32 val, int reg);
248 void (*write_w)(struct sdhci_host *host, u16 val, int reg);
249 void (*write_b)(struct sdhci_host *host, u8 val, int reg);
251 int (*get_cd)(struct sdhci_host *host);
252 void (*set_control_reg)(struct sdhci_host *host);
253 void (*set_ios_post)(struct sdhci_host *host);
254 void (*set_clock)(struct sdhci_host *host, u32 div);
[all …]
/openbmc/openbmc/meta-google/recipes-google/host-power-ctrl/
H A Dgpio-host-pwr_git.bb1 SUMMARY = "GPIO based powercontrol for a host system"
2 DESCRIPTION = "GPIO based powercontrol for a host system."
15 file://host-ensure-off.service \
16 file://host-powercycle-watchdog.service \
17 file://host-powercycle.service \
18 file://host-poweroff-watchdog.service \
19 file://host-poweroff.service \
20 file://host-poweron.service \
21 file://host-reset-cold-watchdog.service \
22 file://host-reset-cold.service \
[all …]

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