1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
21c6a0718SPierre Ossman /*
370f10482SPierre Ossman * linux/drivers/mmc/host/au1xmmc.c - AU1XX0 MMC driver
41c6a0718SPierre Ossman *
51c6a0718SPierre Ossman * Copyright (c) 2005, Advanced Micro Devices, Inc.
61c6a0718SPierre Ossman *
71c6a0718SPierre Ossman * Developed with help from the 2.4.30 MMC AU1XXX controller including
81c6a0718SPierre Ossman * the following copyright notices:
91c6a0718SPierre Ossman * Copyright (c) 2003-2004 Embedded Edge, LLC.
101c6a0718SPierre Ossman * Portions Copyright (C) 2002 Embedix, Inc
111c6a0718SPierre Ossman * Copyright 2002 Hewlett-Packard Company
121c6a0718SPierre Ossman
131c6a0718SPierre Ossman * 2.6 version of this driver inspired by:
141c6a0718SPierre Ossman * (drivers/mmc/wbsd.c) Copyright (C) 2004-2005 Pierre Ossman,
151c6a0718SPierre Ossman * All Rights Reserved.
161c6a0718SPierre Ossman * (drivers/mmc/pxa.c) Copyright (C) 2003 Russell King,
171c6a0718SPierre Ossman * All Rights Reserved.
181c6a0718SPierre Ossman *
191c6a0718SPierre Ossman
201c6a0718SPierre Ossman */
211c6a0718SPierre Ossman
22e2d26477SManuel Lauss /* Why don't we use the SD controllers' carddetect feature?
231c6a0718SPierre Ossman *
241c6a0718SPierre Ossman * From the AU1100 MMC application guide:
251c6a0718SPierre Ossman * If the Au1100-based design is intended to support both MultiMediaCards
261c6a0718SPierre Ossman * and 1- or 4-data bit SecureDigital cards, then the solution is to
271c6a0718SPierre Ossman * connect a weak (560KOhm) pull-up resistor to connector pin 1.
281c6a0718SPierre Ossman * In doing so, a MMC card never enters SPI-mode communications,
291c6a0718SPierre Ossman * but now the SecureDigital card-detect feature of CD/DAT3 is ineffective
301c6a0718SPierre Ossman * (the low to high transition will not occur).
311c6a0718SPierre Ossman */
321c6a0718SPierre Ossman
33b6507596SManuel Lauss #include <linux/clk.h>
341c6a0718SPierre Ossman #include <linux/module.h>
351c6a0718SPierre Ossman #include <linux/init.h>
361c6a0718SPierre Ossman #include <linux/platform_device.h>
371c6a0718SPierre Ossman #include <linux/mm.h>
381c6a0718SPierre Ossman #include <linux/interrupt.h>
391c6a0718SPierre Ossman #include <linux/dma-mapping.h>
400ada7a02SAl Viro #include <linux/scatterlist.h>
41a6720c02SChristoph Hellwig #include <linux/highmem.h>
42c4223c2cSManuel Lauss #include <linux/leds.h>
431c6a0718SPierre Ossman #include <linux/mmc/host.h>
445a0e3ad6STejun Heo #include <linux/slab.h>
45c4223c2cSManuel Lauss
461c6a0718SPierre Ossman #include <asm/io.h>
471c6a0718SPierre Ossman #include <asm/mach-au1x00/au1000.h>
481c6a0718SPierre Ossman #include <asm/mach-au1x00/au1xxx_dbdma.h>
491c6a0718SPierre Ossman #include <asm/mach-au1x00/au1100_mmc.h>
501c6a0718SPierre Ossman
511c6a0718SPierre Ossman #define DRIVER_NAME "au1xxx-mmc"
521c6a0718SPierre Ossman
531c6a0718SPierre Ossman /* Set this to enable special debugging macros */
54c4223c2cSManuel Lauss /* #define DEBUG */
551c6a0718SPierre Ossman
561c6a0718SPierre Ossman #ifdef DEBUG
575c0a889dSManuel Lauss #define DBG(fmt, idx, args...) \
58a3c76eb9SGirish K S pr_debug("au1xmmc(%d): DEBUG: " fmt, idx, ##args)
591c6a0718SPierre Ossman #else
605c0a889dSManuel Lauss #define DBG(fmt, idx, args...) do {} while (0)
611c6a0718SPierre Ossman #endif
621c6a0718SPierre Ossman
635c0a889dSManuel Lauss /* Hardware definitions */
645c0a889dSManuel Lauss #define AU1XMMC_DESCRIPTOR_COUNT 1
65e491d230SManuel Lauss
66e491d230SManuel Lauss /* max DMA seg size: 64KB on Au1100, 4MB on Au1200 */
671177d99dSManuel Lauss #define AU1100_MMC_DESCRIPTOR_SIZE 0x0000ffff
681177d99dSManuel Lauss #define AU1200_MMC_DESCRIPTOR_SIZE 0x003fffff
695c0a889dSManuel Lauss
705c0a889dSManuel Lauss #define AU1XMMC_OCR (MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 | \
715c0a889dSManuel Lauss MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 | \
725c0a889dSManuel Lauss MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36)
735c0a889dSManuel Lauss
745c0a889dSManuel Lauss /* This gives us a hard value for the stop command that we can write directly
755c0a889dSManuel Lauss * to the command register.
765c0a889dSManuel Lauss */
775c0a889dSManuel Lauss #define STOP_CMD \
785c0a889dSManuel Lauss (SD_CMD_RT_1B | SD_CMD_CT_7 | (0xC << SD_CMD_CI_SHIFT) | SD_CMD_GO)
795c0a889dSManuel Lauss
805c0a889dSManuel Lauss /* This is the set of interrupts that we configure by default. */
815c0a889dSManuel Lauss #define AU1XMMC_INTERRUPTS \
825c0a889dSManuel Lauss (SD_CONFIG_SC | SD_CONFIG_DT | SD_CONFIG_RAT | \
835c0a889dSManuel Lauss SD_CONFIG_CR | SD_CONFIG_I)
845c0a889dSManuel Lauss
855c0a889dSManuel Lauss /* The poll event (looking for insert/remove events runs twice a second. */
865c0a889dSManuel Lauss #define AU1XMMC_DETECT_TIMEOUT (HZ/2)
875c0a889dSManuel Lauss
885c0a889dSManuel Lauss struct au1xmmc_host {
895c0a889dSManuel Lauss struct mmc_host *mmc;
905c0a889dSManuel Lauss struct mmc_request *mrq;
915c0a889dSManuel Lauss
925c0a889dSManuel Lauss u32 flags;
932f73bfbeSManuel Lauss void __iomem *iobase;
945c0a889dSManuel Lauss u32 clock;
955c0a889dSManuel Lauss u32 bus_width;
965c0a889dSManuel Lauss u32 power_mode;
975c0a889dSManuel Lauss
985c0a889dSManuel Lauss int status;
995c0a889dSManuel Lauss
1005c0a889dSManuel Lauss struct {
1015c0a889dSManuel Lauss int len;
1025c0a889dSManuel Lauss int dir;
1035c0a889dSManuel Lauss } dma;
1045c0a889dSManuel Lauss
1055c0a889dSManuel Lauss struct {
1065c0a889dSManuel Lauss int index;
1075c0a889dSManuel Lauss int offset;
1085c0a889dSManuel Lauss int len;
1095c0a889dSManuel Lauss } pio;
1105c0a889dSManuel Lauss
1115c0a889dSManuel Lauss u32 tx_chan;
1125c0a889dSManuel Lauss u32 rx_chan;
1135c0a889dSManuel Lauss
1145c0a889dSManuel Lauss int irq;
1155c0a889dSManuel Lauss
1165c0a889dSManuel Lauss struct tasklet_struct finish_task;
1175c0a889dSManuel Lauss struct tasklet_struct data_task;
1185c0a889dSManuel Lauss struct au1xmmc_platform_data *platdata;
1195c0a889dSManuel Lauss struct platform_device *pdev;
1205c0a889dSManuel Lauss struct resource *ioarea;
121b6507596SManuel Lauss struct clk *clk;
1225c0a889dSManuel Lauss };
1235c0a889dSManuel Lauss
1245c0a889dSManuel Lauss /* Status flags used by the host structure */
1255c0a889dSManuel Lauss #define HOST_F_XMIT 0x0001
1265c0a889dSManuel Lauss #define HOST_F_RECV 0x0002
1275c0a889dSManuel Lauss #define HOST_F_DMA 0x0010
1281177d99dSManuel Lauss #define HOST_F_DBDMA 0x0020
1295c0a889dSManuel Lauss #define HOST_F_ACTIVE 0x0100
1305c0a889dSManuel Lauss #define HOST_F_STOP 0x1000
1315c0a889dSManuel Lauss
1325c0a889dSManuel Lauss #define HOST_S_IDLE 0x0001
1335c0a889dSManuel Lauss #define HOST_S_CMD 0x0002
1345c0a889dSManuel Lauss #define HOST_S_DATA 0x0003
1355c0a889dSManuel Lauss #define HOST_S_STOP 0x0004
1365c0a889dSManuel Lauss
1375c0a889dSManuel Lauss /* Easy access macros */
1385c0a889dSManuel Lauss #define HOST_STATUS(h) ((h)->iobase + SD_STATUS)
1395c0a889dSManuel Lauss #define HOST_CONFIG(h) ((h)->iobase + SD_CONFIG)
1405c0a889dSManuel Lauss #define HOST_ENABLE(h) ((h)->iobase + SD_ENABLE)
1415c0a889dSManuel Lauss #define HOST_TXPORT(h) ((h)->iobase + SD_TXPORT)
1425c0a889dSManuel Lauss #define HOST_RXPORT(h) ((h)->iobase + SD_RXPORT)
1435c0a889dSManuel Lauss #define HOST_CMDARG(h) ((h)->iobase + SD_CMDARG)
1445c0a889dSManuel Lauss #define HOST_BLKSIZE(h) ((h)->iobase + SD_BLKSIZE)
1455c0a889dSManuel Lauss #define HOST_CMD(h) ((h)->iobase + SD_CMD)
1465c0a889dSManuel Lauss #define HOST_CONFIG2(h) ((h)->iobase + SD_CONFIG2)
1475c0a889dSManuel Lauss #define HOST_TIMEOUT(h) ((h)->iobase + SD_TIMEOUT)
1485c0a889dSManuel Lauss #define HOST_DEBUG(h) ((h)->iobase + SD_DEBUG)
1495c0a889dSManuel Lauss
1505c0a889dSManuel Lauss #define DMA_CHANNEL(h) \
1515c0a889dSManuel Lauss (((h)->flags & HOST_F_XMIT) ? (h)->tx_chan : (h)->rx_chan)
1525c0a889dSManuel Lauss
has_dbdma(void)1531177d99dSManuel Lauss static inline int has_dbdma(void)
1541177d99dSManuel Lauss {
1551177d99dSManuel Lauss switch (alchemy_get_cputype()) {
1561177d99dSManuel Lauss case ALCHEMY_CPU_AU1200:
157809f36c6SManuel Lauss case ALCHEMY_CPU_AU1300:
1581177d99dSManuel Lauss return 1;
1591177d99dSManuel Lauss default:
1601177d99dSManuel Lauss return 0;
1611177d99dSManuel Lauss }
1621177d99dSManuel Lauss }
1631177d99dSManuel Lauss
IRQ_ON(struct au1xmmc_host * host,u32 mask)1641c6a0718SPierre Ossman static inline void IRQ_ON(struct au1xmmc_host *host, u32 mask)
1651c6a0718SPierre Ossman {
1662f73bfbeSManuel Lauss u32 val = __raw_readl(HOST_CONFIG(host));
1671c6a0718SPierre Ossman val |= mask;
1682f73bfbeSManuel Lauss __raw_writel(val, HOST_CONFIG(host));
1692f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
1701c6a0718SPierre Ossman }
1711c6a0718SPierre Ossman
FLUSH_FIFO(struct au1xmmc_host * host)1721c6a0718SPierre Ossman static inline void FLUSH_FIFO(struct au1xmmc_host *host)
1731c6a0718SPierre Ossman {
1742f73bfbeSManuel Lauss u32 val = __raw_readl(HOST_CONFIG2(host));
1751c6a0718SPierre Ossman
1762f73bfbeSManuel Lauss __raw_writel(val | SD_CONFIG2_FF, HOST_CONFIG2(host));
1772f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
1782f73bfbeSManuel Lauss mdelay(1);
1791c6a0718SPierre Ossman
1801c6a0718SPierre Ossman /* SEND_STOP will turn off clock control - this re-enables it */
1811c6a0718SPierre Ossman val &= ~SD_CONFIG2_DF;
1821c6a0718SPierre Ossman
1832f73bfbeSManuel Lauss __raw_writel(val, HOST_CONFIG2(host));
1842f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
1851c6a0718SPierre Ossman }
1861c6a0718SPierre Ossman
IRQ_OFF(struct au1xmmc_host * host,u32 mask)1871c6a0718SPierre Ossman static inline void IRQ_OFF(struct au1xmmc_host *host, u32 mask)
1881c6a0718SPierre Ossman {
1892f73bfbeSManuel Lauss u32 val = __raw_readl(HOST_CONFIG(host));
1901c6a0718SPierre Ossman val &= ~mask;
1912f73bfbeSManuel Lauss __raw_writel(val, HOST_CONFIG(host));
1922f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
1931c6a0718SPierre Ossman }
1941c6a0718SPierre Ossman
SEND_STOP(struct au1xmmc_host * host)1951c6a0718SPierre Ossman static inline void SEND_STOP(struct au1xmmc_host *host)
1961c6a0718SPierre Ossman {
197281dd23eSManuel Lauss u32 config2;
1981c6a0718SPierre Ossman
1991c6a0718SPierre Ossman WARN_ON(host->status != HOST_S_DATA);
2001c6a0718SPierre Ossman host->status = HOST_S_STOP;
2011c6a0718SPierre Ossman
2022f73bfbeSManuel Lauss config2 = __raw_readl(HOST_CONFIG2(host));
2032f73bfbeSManuel Lauss __raw_writel(config2 | SD_CONFIG2_DF, HOST_CONFIG2(host));
2042f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
2051c6a0718SPierre Ossman
206b595076aSUwe Kleine-König /* Send the stop command */
2072f73bfbeSManuel Lauss __raw_writel(STOP_CMD, HOST_CMD(host));
2082f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
2091c6a0718SPierre Ossman }
2101c6a0718SPierre Ossman
au1xmmc_set_power(struct au1xmmc_host * host,int state)2111c6a0718SPierre Ossman static void au1xmmc_set_power(struct au1xmmc_host *host, int state)
2121c6a0718SPierre Ossman {
213c4223c2cSManuel Lauss if (host->platdata && host->platdata->set_power)
214c4223c2cSManuel Lauss host->platdata->set_power(host->mmc, state);
2151c6a0718SPierre Ossman }
2161c6a0718SPierre Ossman
au1xmmc_card_inserted(struct mmc_host * mmc)217e2d26477SManuel Lauss static int au1xmmc_card_inserted(struct mmc_host *mmc)
2181c6a0718SPierre Ossman {
219e2d26477SManuel Lauss struct au1xmmc_host *host = mmc_priv(mmc);
220c4223c2cSManuel Lauss
221c4223c2cSManuel Lauss if (host->platdata && host->platdata->card_inserted)
222e2d26477SManuel Lauss return !!host->platdata->card_inserted(host->mmc);
223c4223c2cSManuel Lauss
224e2d26477SManuel Lauss return -ENOSYS;
2251c6a0718SPierre Ossman }
2261c6a0718SPierre Ossman
au1xmmc_card_readonly(struct mmc_host * mmc)2271c6a0718SPierre Ossman static int au1xmmc_card_readonly(struct mmc_host *mmc)
2281c6a0718SPierre Ossman {
2291c6a0718SPierre Ossman struct au1xmmc_host *host = mmc_priv(mmc);
230c4223c2cSManuel Lauss
231c4223c2cSManuel Lauss if (host->platdata && host->platdata->card_readonly)
232e2d26477SManuel Lauss return !!host->platdata->card_readonly(mmc);
233c4223c2cSManuel Lauss
234e2d26477SManuel Lauss return -ENOSYS;
2351c6a0718SPierre Ossman }
2361c6a0718SPierre Ossman
au1xmmc_finish_request(struct au1xmmc_host * host)2371c6a0718SPierre Ossman static void au1xmmc_finish_request(struct au1xmmc_host *host)
2381c6a0718SPierre Ossman {
2391c6a0718SPierre Ossman struct mmc_request *mrq = host->mrq;
2401c6a0718SPierre Ossman
2411c6a0718SPierre Ossman host->mrq = NULL;
242c4223c2cSManuel Lauss host->flags &= HOST_F_ACTIVE | HOST_F_DMA;
2431c6a0718SPierre Ossman
2441c6a0718SPierre Ossman host->dma.len = 0;
2451c6a0718SPierre Ossman host->dma.dir = 0;
2461c6a0718SPierre Ossman
2471c6a0718SPierre Ossman host->pio.index = 0;
2481c6a0718SPierre Ossman host->pio.offset = 0;
2491c6a0718SPierre Ossman host->pio.len = 0;
2501c6a0718SPierre Ossman
2511c6a0718SPierre Ossman host->status = HOST_S_IDLE;
2521c6a0718SPierre Ossman
2531c6a0718SPierre Ossman mmc_request_done(host->mmc, mrq);
2541c6a0718SPierre Ossman }
2551c6a0718SPierre Ossman
au1xmmc_tasklet_finish(struct tasklet_struct * t)256a1149c38SEmil Renner Berthing static void au1xmmc_tasklet_finish(struct tasklet_struct *t)
2571c6a0718SPierre Ossman {
258a1149c38SEmil Renner Berthing struct au1xmmc_host *host = from_tasklet(host, t, finish_task);
2591c6a0718SPierre Ossman au1xmmc_finish_request(host);
2601c6a0718SPierre Ossman }
2611c6a0718SPierre Ossman
au1xmmc_send_command(struct au1xmmc_host * host,struct mmc_command * cmd,struct mmc_data * data)2624c3965aaSUlf Hansson static int au1xmmc_send_command(struct au1xmmc_host *host,
263be0192aaSPierre Ossman struct mmc_command *cmd, struct mmc_data *data)
2641c6a0718SPierre Ossman {
2651c6a0718SPierre Ossman u32 mmccmd = (cmd->opcode << SD_CMD_CI_SHIFT);
2661c6a0718SPierre Ossman
2671c6a0718SPierre Ossman switch (mmc_resp_type(cmd)) {
2681c6a0718SPierre Ossman case MMC_RSP_NONE:
2691c6a0718SPierre Ossman break;
2701c6a0718SPierre Ossman case MMC_RSP_R1:
2711c6a0718SPierre Ossman mmccmd |= SD_CMD_RT_1;
2721c6a0718SPierre Ossman break;
2731c6a0718SPierre Ossman case MMC_RSP_R1B:
2741c6a0718SPierre Ossman mmccmd |= SD_CMD_RT_1B;
2751c6a0718SPierre Ossman break;
2761c6a0718SPierre Ossman case MMC_RSP_R2:
2771c6a0718SPierre Ossman mmccmd |= SD_CMD_RT_2;
2781c6a0718SPierre Ossman break;
2791c6a0718SPierre Ossman case MMC_RSP_R3:
2801c6a0718SPierre Ossman mmccmd |= SD_CMD_RT_3;
2811c6a0718SPierre Ossman break;
2821c6a0718SPierre Ossman default:
283a3c76eb9SGirish K S pr_info("au1xmmc: unhandled response type %02x\n",
2841c6a0718SPierre Ossman mmc_resp_type(cmd));
28517b0429dSPierre Ossman return -EINVAL;
2861c6a0718SPierre Ossman }
2871c6a0718SPierre Ossman
288be0192aaSPierre Ossman if (data) {
2896356a9d9SPierre Ossman if (data->flags & MMC_DATA_READ) {
290be0192aaSPierre Ossman if (data->blocks > 1)
2911c6a0718SPierre Ossman mmccmd |= SD_CMD_CT_4;
292c0f3b6c7SYoichi Yuasa else
293c0f3b6c7SYoichi Yuasa mmccmd |= SD_CMD_CT_2;
2946356a9d9SPierre Ossman } else if (data->flags & MMC_DATA_WRITE) {
295be0192aaSPierre Ossman if (data->blocks > 1)
2961c6a0718SPierre Ossman mmccmd |= SD_CMD_CT_3;
297c0f3b6c7SYoichi Yuasa else
298c0f3b6c7SYoichi Yuasa mmccmd |= SD_CMD_CT_1;
2991c6a0718SPierre Ossman }
300be0192aaSPierre Ossman }
3011c6a0718SPierre Ossman
3022f73bfbeSManuel Lauss __raw_writel(cmd->arg, HOST_CMDARG(host));
3032f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
3041c6a0718SPierre Ossman
3052f73bfbeSManuel Lauss __raw_writel((mmccmd | SD_CMD_GO), HOST_CMD(host));
3062f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
3071c6a0718SPierre Ossman
3081c6a0718SPierre Ossman /* Wait for the command to go on the line */
3092f73bfbeSManuel Lauss while (__raw_readl(HOST_CMD(host)) & SD_CMD_GO)
3105c0a889dSManuel Lauss /* nop */;
3111c6a0718SPierre Ossman
31217b0429dSPierre Ossman return 0;
3131c6a0718SPierre Ossman }
3141c6a0718SPierre Ossman
au1xmmc_data_complete(struct au1xmmc_host * host,u32 status)3151c6a0718SPierre Ossman static void au1xmmc_data_complete(struct au1xmmc_host *host, u32 status)
3161c6a0718SPierre Ossman {
3171c6a0718SPierre Ossman struct mmc_request *mrq = host->mrq;
3181c6a0718SPierre Ossman struct mmc_data *data;
3191c6a0718SPierre Ossman u32 crc;
3201c6a0718SPierre Ossman
3215c0a889dSManuel Lauss WARN_ON((host->status != HOST_S_DATA) && (host->status != HOST_S_STOP));
3221c6a0718SPierre Ossman
3231c6a0718SPierre Ossman if (host->mrq == NULL)
3241c6a0718SPierre Ossman return;
3251c6a0718SPierre Ossman
3261c6a0718SPierre Ossman data = mrq->cmd->data;
3271c6a0718SPierre Ossman
3281c6a0718SPierre Ossman if (status == 0)
3292f73bfbeSManuel Lauss status = __raw_readl(HOST_STATUS(host));
3301c6a0718SPierre Ossman
3311c6a0718SPierre Ossman /* The transaction is really over when the SD_STATUS_DB bit is clear */
3321c6a0718SPierre Ossman while ((host->flags & HOST_F_XMIT) && (status & SD_STATUS_DB))
3332f73bfbeSManuel Lauss status = __raw_readl(HOST_STATUS(host));
3341c6a0718SPierre Ossman
33517b0429dSPierre Ossman data->error = 0;
3361c6a0718SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma.dir);
3371c6a0718SPierre Ossman
3381c6a0718SPierre Ossman /* Process any errors */
3391c6a0718SPierre Ossman crc = (status & (SD_STATUS_WC | SD_STATUS_RC));
3401c6a0718SPierre Ossman if (host->flags & HOST_F_XMIT)
3411c6a0718SPierre Ossman crc |= ((status & 0x07) == 0x02) ? 0 : 1;
3421c6a0718SPierre Ossman
3431c6a0718SPierre Ossman if (crc)
34417b0429dSPierre Ossman data->error = -EILSEQ;
3451c6a0718SPierre Ossman
3461c6a0718SPierre Ossman /* Clear the CRC bits */
3472f73bfbeSManuel Lauss __raw_writel(SD_STATUS_WC | SD_STATUS_RC, HOST_STATUS(host));
3481c6a0718SPierre Ossman
3491c6a0718SPierre Ossman data->bytes_xfered = 0;
3501c6a0718SPierre Ossman
35117b0429dSPierre Ossman if (!data->error) {
3521177d99dSManuel Lauss if (host->flags & (HOST_F_DMA | HOST_F_DBDMA)) {
3531c6a0718SPierre Ossman u32 chan = DMA_CHANNEL(host);
3541c6a0718SPierre Ossman
3551c6a0718SPierre Ossman chan_tab_t *c = *((chan_tab_t **)chan);
3561c6a0718SPierre Ossman au1x_dma_chan_t *cp = c->chan_ptr;
3571c6a0718SPierre Ossman data->bytes_xfered = cp->ddma_bytecnt;
3585c0a889dSManuel Lauss } else
3591c6a0718SPierre Ossman data->bytes_xfered =
3605c0a889dSManuel Lauss (data->blocks * data->blksz) - host->pio.len;
3611c6a0718SPierre Ossman }
3621c6a0718SPierre Ossman
3631c6a0718SPierre Ossman au1xmmc_finish_request(host);
3641c6a0718SPierre Ossman }
3651c6a0718SPierre Ossman
au1xmmc_tasklet_data(struct tasklet_struct * t)366a1149c38SEmil Renner Berthing static void au1xmmc_tasklet_data(struct tasklet_struct *t)
3671c6a0718SPierre Ossman {
368a1149c38SEmil Renner Berthing struct au1xmmc_host *host = from_tasklet(host, t, data_task);
3691c6a0718SPierre Ossman
3702f73bfbeSManuel Lauss u32 status = __raw_readl(HOST_STATUS(host));
3711c6a0718SPierre Ossman au1xmmc_data_complete(host, status);
3721c6a0718SPierre Ossman }
3731c6a0718SPierre Ossman
3741c6a0718SPierre Ossman #define AU1XMMC_MAX_TRANSFER 8
3751c6a0718SPierre Ossman
au1xmmc_send_pio(struct au1xmmc_host * host)3761c6a0718SPierre Ossman static void au1xmmc_send_pio(struct au1xmmc_host *host)
3771c6a0718SPierre Ossman {
3785c0a889dSManuel Lauss struct mmc_data *data;
3795c0a889dSManuel Lauss int sg_len, max, count;
3805c0a889dSManuel Lauss unsigned char *sg_ptr, val;
3815c0a889dSManuel Lauss u32 status;
3821c6a0718SPierre Ossman struct scatterlist *sg;
3831c6a0718SPierre Ossman
3841c6a0718SPierre Ossman data = host->mrq->data;
3851c6a0718SPierre Ossman
3861c6a0718SPierre Ossman if (!(host->flags & HOST_F_XMIT))
3871c6a0718SPierre Ossman return;
3881c6a0718SPierre Ossman
3891c6a0718SPierre Ossman /* This is the pointer to the data buffer */
3901c6a0718SPierre Ossman sg = &data->sg[host->pio.index];
3912fc458f7SAdrian Hunter sg_ptr = kmap_local_page(sg_page(sg)) + sg->offset + host->pio.offset;
3921c6a0718SPierre Ossman
3931c6a0718SPierre Ossman /* This is the space left inside the buffer */
3941c6a0718SPierre Ossman sg_len = data->sg[host->pio.index].length - host->pio.offset;
3951c6a0718SPierre Ossman
3965c0a889dSManuel Lauss /* Check if we need less than the size of the sg_buffer */
3971c6a0718SPierre Ossman max = (sg_len > host->pio.len) ? host->pio.len : sg_len;
3985c0a889dSManuel Lauss if (max > AU1XMMC_MAX_TRANSFER)
3995c0a889dSManuel Lauss max = AU1XMMC_MAX_TRANSFER;
4001c6a0718SPierre Ossman
4011c6a0718SPierre Ossman for (count = 0; count < max; count++) {
4022f73bfbeSManuel Lauss status = __raw_readl(HOST_STATUS(host));
4031c6a0718SPierre Ossman
4041c6a0718SPierre Ossman if (!(status & SD_STATUS_TH))
4051c6a0718SPierre Ossman break;
4061c6a0718SPierre Ossman
407a6720c02SChristoph Hellwig val = sg_ptr[count];
4081c6a0718SPierre Ossman
4092f73bfbeSManuel Lauss __raw_writel((unsigned long)val, HOST_TXPORT(host));
4102f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
4111c6a0718SPierre Ossman }
4122fc458f7SAdrian Hunter kunmap_local(sg_ptr);
4131c6a0718SPierre Ossman
4141c6a0718SPierre Ossman host->pio.len -= count;
4151c6a0718SPierre Ossman host->pio.offset += count;
4161c6a0718SPierre Ossman
4171c6a0718SPierre Ossman if (count == sg_len) {
4181c6a0718SPierre Ossman host->pio.index++;
4191c6a0718SPierre Ossman host->pio.offset = 0;
4201c6a0718SPierre Ossman }
4211c6a0718SPierre Ossman
4221c6a0718SPierre Ossman if (host->pio.len == 0) {
4231c6a0718SPierre Ossman IRQ_OFF(host, SD_CONFIG_TH);
4241c6a0718SPierre Ossman
4251c6a0718SPierre Ossman if (host->flags & HOST_F_STOP)
4261c6a0718SPierre Ossman SEND_STOP(host);
4271c6a0718SPierre Ossman
4281c6a0718SPierre Ossman tasklet_schedule(&host->data_task);
4291c6a0718SPierre Ossman }
4301c6a0718SPierre Ossman }
4311c6a0718SPierre Ossman
au1xmmc_receive_pio(struct au1xmmc_host * host)4321c6a0718SPierre Ossman static void au1xmmc_receive_pio(struct au1xmmc_host *host)
4331c6a0718SPierre Ossman {
4345c0a889dSManuel Lauss struct mmc_data *data;
4355c0a889dSManuel Lauss int max, count, sg_len = 0;
4365c0a889dSManuel Lauss unsigned char *sg_ptr = NULL;
4375c0a889dSManuel Lauss u32 status, val;
4381c6a0718SPierre Ossman struct scatterlist *sg;
4391c6a0718SPierre Ossman
4401c6a0718SPierre Ossman data = host->mrq->data;
4411c6a0718SPierre Ossman
4421c6a0718SPierre Ossman if (!(host->flags & HOST_F_RECV))
4431c6a0718SPierre Ossman return;
4441c6a0718SPierre Ossman
4451c6a0718SPierre Ossman max = host->pio.len;
4461c6a0718SPierre Ossman
4471c6a0718SPierre Ossman if (host->pio.index < host->dma.len) {
4481c6a0718SPierre Ossman sg = &data->sg[host->pio.index];
4492fc458f7SAdrian Hunter sg_ptr = kmap_local_page(sg_page(sg)) + sg->offset + host->pio.offset;
4501c6a0718SPierre Ossman
4511c6a0718SPierre Ossman /* This is the space left inside the buffer */
4521c6a0718SPierre Ossman sg_len = sg_dma_len(&data->sg[host->pio.index]) - host->pio.offset;
4531c6a0718SPierre Ossman
4545c0a889dSManuel Lauss /* Check if we need less than the size of the sg_buffer */
4555c0a889dSManuel Lauss if (sg_len < max)
4565c0a889dSManuel Lauss max = sg_len;
4571c6a0718SPierre Ossman }
4581c6a0718SPierre Ossman
4591c6a0718SPierre Ossman if (max > AU1XMMC_MAX_TRANSFER)
4601c6a0718SPierre Ossman max = AU1XMMC_MAX_TRANSFER;
4611c6a0718SPierre Ossman
4621c6a0718SPierre Ossman for (count = 0; count < max; count++) {
4632f73bfbeSManuel Lauss status = __raw_readl(HOST_STATUS(host));
4641c6a0718SPierre Ossman
4651c6a0718SPierre Ossman if (!(status & SD_STATUS_NE))
4661c6a0718SPierre Ossman break;
4671c6a0718SPierre Ossman
4681c6a0718SPierre Ossman if (status & SD_STATUS_RC) {
469c4223c2cSManuel Lauss DBG("RX CRC Error [%d + %d].\n", host->pdev->id,
4701c6a0718SPierre Ossman host->pio.len, count);
4711c6a0718SPierre Ossman break;
4721c6a0718SPierre Ossman }
4731c6a0718SPierre Ossman
4741c6a0718SPierre Ossman if (status & SD_STATUS_RO) {
475c4223c2cSManuel Lauss DBG("RX Overrun [%d + %d]\n", host->pdev->id,
4761c6a0718SPierre Ossman host->pio.len, count);
4771c6a0718SPierre Ossman break;
4781c6a0718SPierre Ossman }
4791c6a0718SPierre Ossman else if (status & SD_STATUS_RU) {
480c4223c2cSManuel Lauss DBG("RX Underrun [%d + %d]\n", host->pdev->id,
4811c6a0718SPierre Ossman host->pio.len, count);
4821c6a0718SPierre Ossman break;
4831c6a0718SPierre Ossman }
4841c6a0718SPierre Ossman
4852f73bfbeSManuel Lauss val = __raw_readl(HOST_RXPORT(host));
4861c6a0718SPierre Ossman
4871c6a0718SPierre Ossman if (sg_ptr)
488a6720c02SChristoph Hellwig sg_ptr[count] = (unsigned char)(val & 0xFF);
4891c6a0718SPierre Ossman }
490a6720c02SChristoph Hellwig if (sg_ptr)
4912fc458f7SAdrian Hunter kunmap_local(sg_ptr);
4921c6a0718SPierre Ossman
4931c6a0718SPierre Ossman host->pio.len -= count;
4941c6a0718SPierre Ossman host->pio.offset += count;
4951c6a0718SPierre Ossman
4961c6a0718SPierre Ossman if (sg_len && count == sg_len) {
4971c6a0718SPierre Ossman host->pio.index++;
4981c6a0718SPierre Ossman host->pio.offset = 0;
4991c6a0718SPierre Ossman }
5001c6a0718SPierre Ossman
5011c6a0718SPierre Ossman if (host->pio.len == 0) {
5025c0a889dSManuel Lauss /* IRQ_OFF(host, SD_CONFIG_RA | SD_CONFIG_RF); */
5031c6a0718SPierre Ossman IRQ_OFF(host, SD_CONFIG_NE);
5041c6a0718SPierre Ossman
5051c6a0718SPierre Ossman if (host->flags & HOST_F_STOP)
5061c6a0718SPierre Ossman SEND_STOP(host);
5071c6a0718SPierre Ossman
5081c6a0718SPierre Ossman tasklet_schedule(&host->data_task);
5091c6a0718SPierre Ossman }
5101c6a0718SPierre Ossman }
5111c6a0718SPierre Ossman
5125c0a889dSManuel Lauss /* This is called when a command has been completed - grab the response
5135c0a889dSManuel Lauss * and check for errors. Then start the data transfer if it is indicated.
5141c6a0718SPierre Ossman */
au1xmmc_cmd_complete(struct au1xmmc_host * host,u32 status)5151c6a0718SPierre Ossman static void au1xmmc_cmd_complete(struct au1xmmc_host *host, u32 status)
5161c6a0718SPierre Ossman {
5171c6a0718SPierre Ossman struct mmc_request *mrq = host->mrq;
5181c6a0718SPierre Ossman struct mmc_command *cmd;
5195c0a889dSManuel Lauss u32 r[4];
5205c0a889dSManuel Lauss int i, trans;
5211c6a0718SPierre Ossman
5221c6a0718SPierre Ossman if (!host->mrq)
5231c6a0718SPierre Ossman return;
5241c6a0718SPierre Ossman
5251c6a0718SPierre Ossman cmd = mrq->cmd;
52617b0429dSPierre Ossman cmd->error = 0;
5271c6a0718SPierre Ossman
5281c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_PRESENT) {
5291c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_136) {
5302f73bfbeSManuel Lauss r[0] = __raw_readl(host->iobase + SD_RESP3);
5312f73bfbeSManuel Lauss r[1] = __raw_readl(host->iobase + SD_RESP2);
5322f73bfbeSManuel Lauss r[2] = __raw_readl(host->iobase + SD_RESP1);
5332f73bfbeSManuel Lauss r[3] = __raw_readl(host->iobase + SD_RESP0);
5341c6a0718SPierre Ossman
5351c6a0718SPierre Ossman /* The CRC is omitted from the response, so really
5361c6a0718SPierre Ossman * we only got 120 bytes, but the engine expects
5375c0a889dSManuel Lauss * 128 bits, so we have to shift things up.
5381c6a0718SPierre Ossman */
5391c6a0718SPierre Ossman for (i = 0; i < 4; i++) {
5401c6a0718SPierre Ossman cmd->resp[i] = (r[i] & 0x00FFFFFF) << 8;
5411c6a0718SPierre Ossman if (i != 3)
5421c6a0718SPierre Ossman cmd->resp[i] |= (r[i + 1] & 0xFF000000) >> 24;
5431c6a0718SPierre Ossman }
5441c6a0718SPierre Ossman } else {
5451c6a0718SPierre Ossman /* Techincally, we should be getting all 48 bits of
5461c6a0718SPierre Ossman * the response (SD_RESP1 + SD_RESP2), but because
5471c6a0718SPierre Ossman * our response omits the CRC, our data ends up
5481c6a0718SPierre Ossman * being shifted 8 bits to the right. In this case,
5491c6a0718SPierre Ossman * that means that the OSR data starts at bit 31,
5505c0a889dSManuel Lauss * so we can just read RESP0 and return that.
5511c6a0718SPierre Ossman */
5522f73bfbeSManuel Lauss cmd->resp[0] = __raw_readl(host->iobase + SD_RESP0);
5531c6a0718SPierre Ossman }
5541c6a0718SPierre Ossman }
5551c6a0718SPierre Ossman
5561c6a0718SPierre Ossman /* Figure out errors */
5571c6a0718SPierre Ossman if (status & (SD_STATUS_SC | SD_STATUS_WC | SD_STATUS_RC))
55817b0429dSPierre Ossman cmd->error = -EILSEQ;
5591c6a0718SPierre Ossman
5601c6a0718SPierre Ossman trans = host->flags & (HOST_F_XMIT | HOST_F_RECV);
5611c6a0718SPierre Ossman
56217b0429dSPierre Ossman if (!trans || cmd->error) {
5631c6a0718SPierre Ossman IRQ_OFF(host, SD_CONFIG_TH | SD_CONFIG_RA | SD_CONFIG_RF);
5641c6a0718SPierre Ossman tasklet_schedule(&host->finish_task);
5651c6a0718SPierre Ossman return;
5661c6a0718SPierre Ossman }
5671c6a0718SPierre Ossman
5681c6a0718SPierre Ossman host->status = HOST_S_DATA;
5691c6a0718SPierre Ossman
5701177d99dSManuel Lauss if ((host->flags & (HOST_F_DMA | HOST_F_DBDMA))) {
5711c6a0718SPierre Ossman u32 channel = DMA_CHANNEL(host);
5721c6a0718SPierre Ossman
5731177d99dSManuel Lauss /* Start the DBDMA as soon as the buffer gets something in it */
5741c6a0718SPierre Ossman
5751c6a0718SPierre Ossman if (host->flags & HOST_F_RECV) {
5761c6a0718SPierre Ossman u32 mask = SD_STATUS_DB | SD_STATUS_NE;
5771c6a0718SPierre Ossman
5781c6a0718SPierre Ossman while((status & mask) != mask)
5792f73bfbeSManuel Lauss status = __raw_readl(HOST_STATUS(host));
5801c6a0718SPierre Ossman }
5811c6a0718SPierre Ossman
5821c6a0718SPierre Ossman au1xxx_dbdma_start(channel);
5831c6a0718SPierre Ossman }
5841c6a0718SPierre Ossman }
5851c6a0718SPierre Ossman
au1xmmc_set_clock(struct au1xmmc_host * host,int rate)5861c6a0718SPierre Ossman static void au1xmmc_set_clock(struct au1xmmc_host *host, int rate)
5871c6a0718SPierre Ossman {
588b6507596SManuel Lauss unsigned int pbus = clk_get_rate(host->clk);
589b6507596SManuel Lauss unsigned int divisor = ((pbus / rate) / 2) - 1;
5901c6a0718SPierre Ossman u32 config;
5911c6a0718SPierre Ossman
5922f73bfbeSManuel Lauss config = __raw_readl(HOST_CONFIG(host));
5931c6a0718SPierre Ossman
5941c6a0718SPierre Ossman config &= ~(SD_CONFIG_DIV);
5951c6a0718SPierre Ossman config |= (divisor & SD_CONFIG_DIV) | SD_CONFIG_DE;
5961c6a0718SPierre Ossman
5972f73bfbeSManuel Lauss __raw_writel(config, HOST_CONFIG(host));
5982f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
5991c6a0718SPierre Ossman }
6001c6a0718SPierre Ossman
au1xmmc_prepare_data(struct au1xmmc_host * host,struct mmc_data * data)6015c0a889dSManuel Lauss static int au1xmmc_prepare_data(struct au1xmmc_host *host,
6025c0a889dSManuel Lauss struct mmc_data *data)
6031c6a0718SPierre Ossman {
6041c6a0718SPierre Ossman int datalen = data->blocks * data->blksz;
6051c6a0718SPierre Ossman
6061c6a0718SPierre Ossman if (data->flags & MMC_DATA_READ)
6071c6a0718SPierre Ossman host->flags |= HOST_F_RECV;
6081c6a0718SPierre Ossman else
6091c6a0718SPierre Ossman host->flags |= HOST_F_XMIT;
6101c6a0718SPierre Ossman
6111c6a0718SPierre Ossman if (host->mrq->stop)
6121c6a0718SPierre Ossman host->flags |= HOST_F_STOP;
6131c6a0718SPierre Ossman
6141c6a0718SPierre Ossman host->dma.dir = DMA_BIDIRECTIONAL;
6151c6a0718SPierre Ossman
6161c6a0718SPierre Ossman host->dma.len = dma_map_sg(mmc_dev(host->mmc), data->sg,
6171c6a0718SPierre Ossman data->sg_len, host->dma.dir);
6181c6a0718SPierre Ossman
6191c6a0718SPierre Ossman if (host->dma.len == 0)
62017b0429dSPierre Ossman return -ETIMEDOUT;
6211c6a0718SPierre Ossman
6222f73bfbeSManuel Lauss __raw_writel(data->blksz - 1, HOST_BLKSIZE(host));
6231c6a0718SPierre Ossman
6241177d99dSManuel Lauss if (host->flags & (HOST_F_DMA | HOST_F_DBDMA)) {
6251c6a0718SPierre Ossman int i;
6261c6a0718SPierre Ossman u32 channel = DMA_CHANNEL(host);
6271c6a0718SPierre Ossman
6281c6a0718SPierre Ossman au1xxx_dbdma_stop(channel);
6291c6a0718SPierre Ossman
6301c6a0718SPierre Ossman for (i = 0; i < host->dma.len; i++) {
6311c6a0718SPierre Ossman u32 ret = 0, flags = DDMA_FLAGS_NOIE;
6321c6a0718SPierre Ossman struct scatterlist *sg = &data->sg[i];
6331c6a0718SPierre Ossman int sg_len = sg->length;
6341c6a0718SPierre Ossman
6351c6a0718SPierre Ossman int len = (datalen > sg_len) ? sg_len : datalen;
6361c6a0718SPierre Ossman
6371c6a0718SPierre Ossman if (i == host->dma.len - 1)
6381c6a0718SPierre Ossman flags = DDMA_FLAGS_IE;
6391c6a0718SPierre Ossman
6401c6a0718SPierre Ossman if (host->flags & HOST_F_XMIT) {
641ea071cc7SManuel Lauss ret = au1xxx_dbdma_put_source(channel,
642963accbcSManuel Lauss sg_phys(sg), len, flags);
6435c0a889dSManuel Lauss } else {
644ea071cc7SManuel Lauss ret = au1xxx_dbdma_put_dest(channel,
645963accbcSManuel Lauss sg_phys(sg), len, flags);
6461c6a0718SPierre Ossman }
6471c6a0718SPierre Ossman
6481c6a0718SPierre Ossman if (!ret)
6491c6a0718SPierre Ossman goto dataerr;
6501c6a0718SPierre Ossman
6511c6a0718SPierre Ossman datalen -= len;
6521c6a0718SPierre Ossman }
6535c0a889dSManuel Lauss } else {
6541c6a0718SPierre Ossman host->pio.index = 0;
6551c6a0718SPierre Ossman host->pio.offset = 0;
6561c6a0718SPierre Ossman host->pio.len = datalen;
6571c6a0718SPierre Ossman
6581c6a0718SPierre Ossman if (host->flags & HOST_F_XMIT)
6591c6a0718SPierre Ossman IRQ_ON(host, SD_CONFIG_TH);
6601c6a0718SPierre Ossman else
6611c6a0718SPierre Ossman IRQ_ON(host, SD_CONFIG_NE);
6625c0a889dSManuel Lauss /* IRQ_ON(host, SD_CONFIG_RA | SD_CONFIG_RF); */
6631c6a0718SPierre Ossman }
6641c6a0718SPierre Ossman
66517b0429dSPierre Ossman return 0;
6661c6a0718SPierre Ossman
6671c6a0718SPierre Ossman dataerr:
668c4223c2cSManuel Lauss dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
669c4223c2cSManuel Lauss host->dma.dir);
67017b0429dSPierre Ossman return -ETIMEDOUT;
6711c6a0718SPierre Ossman }
6721c6a0718SPierre Ossman
6735c0a889dSManuel Lauss /* This actually starts a command or data transaction */
au1xmmc_request(struct mmc_host * mmc,struct mmc_request * mrq)6741c6a0718SPierre Ossman static void au1xmmc_request(struct mmc_host* mmc, struct mmc_request* mrq)
6751c6a0718SPierre Ossman {
6761c6a0718SPierre Ossman struct au1xmmc_host *host = mmc_priv(mmc);
67717b0429dSPierre Ossman int ret = 0;
6781c6a0718SPierre Ossman
6791c6a0718SPierre Ossman WARN_ON(irqs_disabled());
6801c6a0718SPierre Ossman WARN_ON(host->status != HOST_S_IDLE);
6811c6a0718SPierre Ossman
6821c6a0718SPierre Ossman host->mrq = mrq;
6831c6a0718SPierre Ossman host->status = HOST_S_CMD;
6841c6a0718SPierre Ossman
68588b8d9a8SManuel Lauss /* fail request immediately if no card is present */
686e2d26477SManuel Lauss if (0 == au1xmmc_card_inserted(mmc)) {
68788b8d9a8SManuel Lauss mrq->cmd->error = -ENOMEDIUM;
68888b8d9a8SManuel Lauss au1xmmc_finish_request(host);
68988b8d9a8SManuel Lauss return;
69088b8d9a8SManuel Lauss }
69188b8d9a8SManuel Lauss
6921c6a0718SPierre Ossman if (mrq->data) {
6931c6a0718SPierre Ossman FLUSH_FIFO(host);
6941c6a0718SPierre Ossman ret = au1xmmc_prepare_data(host, mrq->data);
6951c6a0718SPierre Ossman }
6961c6a0718SPierre Ossman
69717b0429dSPierre Ossman if (!ret)
6984c3965aaSUlf Hansson ret = au1xmmc_send_command(host, mrq->cmd, mrq->data);
6991c6a0718SPierre Ossman
70017b0429dSPierre Ossman if (ret) {
7011c6a0718SPierre Ossman mrq->cmd->error = ret;
7021c6a0718SPierre Ossman au1xmmc_finish_request(host);
7031c6a0718SPierre Ossman }
7041c6a0718SPierre Ossman }
7051c6a0718SPierre Ossman
au1xmmc_reset_controller(struct au1xmmc_host * host)7061c6a0718SPierre Ossman static void au1xmmc_reset_controller(struct au1xmmc_host *host)
7071c6a0718SPierre Ossman {
7081c6a0718SPierre Ossman /* Apply the clock */
7092f73bfbeSManuel Lauss __raw_writel(SD_ENABLE_CE, HOST_ENABLE(host));
7102f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
7112f73bfbeSManuel Lauss mdelay(1);
7121c6a0718SPierre Ossman
7132f73bfbeSManuel Lauss __raw_writel(SD_ENABLE_R | SD_ENABLE_CE, HOST_ENABLE(host));
7142f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
7152f73bfbeSManuel Lauss mdelay(5);
7161c6a0718SPierre Ossman
7172f73bfbeSManuel Lauss __raw_writel(~0, HOST_STATUS(host));
7182f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
7191c6a0718SPierre Ossman
7202f73bfbeSManuel Lauss __raw_writel(0, HOST_BLKSIZE(host));
7212f73bfbeSManuel Lauss __raw_writel(0x001fffff, HOST_TIMEOUT(host));
7222f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
7231c6a0718SPierre Ossman
7242f73bfbeSManuel Lauss __raw_writel(SD_CONFIG2_EN, HOST_CONFIG2(host));
7252f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
7261c6a0718SPierre Ossman
7272f73bfbeSManuel Lauss __raw_writel(SD_CONFIG2_EN | SD_CONFIG2_FF, HOST_CONFIG2(host));
7282f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
7292f73bfbeSManuel Lauss mdelay(1);
7301c6a0718SPierre Ossman
7312f73bfbeSManuel Lauss __raw_writel(SD_CONFIG2_EN, HOST_CONFIG2(host));
7322f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
7331c6a0718SPierre Ossman
7341c6a0718SPierre Ossman /* Configure interrupts */
7352f73bfbeSManuel Lauss __raw_writel(AU1XMMC_INTERRUPTS, HOST_CONFIG(host));
7362f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
7371c6a0718SPierre Ossman }
7381c6a0718SPierre Ossman
7391c6a0718SPierre Ossman
au1xmmc_set_ios(struct mmc_host * mmc,struct mmc_ios * ios)7401c6a0718SPierre Ossman static void au1xmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
7411c6a0718SPierre Ossman {
7421c6a0718SPierre Ossman struct au1xmmc_host *host = mmc_priv(mmc);
743281dd23eSManuel Lauss u32 config2;
7441c6a0718SPierre Ossman
7451c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF)
7461c6a0718SPierre Ossman au1xmmc_set_power(host, 0);
7471c6a0718SPierre Ossman else if (ios->power_mode == MMC_POWER_ON) {
7481c6a0718SPierre Ossman au1xmmc_set_power(host, 1);
7491c6a0718SPierre Ossman }
7501c6a0718SPierre Ossman
7511c6a0718SPierre Ossman if (ios->clock && ios->clock != host->clock) {
7521c6a0718SPierre Ossman au1xmmc_set_clock(host, ios->clock);
7531c6a0718SPierre Ossman host->clock = ios->clock;
7541c6a0718SPierre Ossman }
755281dd23eSManuel Lauss
7562f73bfbeSManuel Lauss config2 = __raw_readl(HOST_CONFIG2(host));
757281dd23eSManuel Lauss switch (ios->bus_width) {
758809f36c6SManuel Lauss case MMC_BUS_WIDTH_8:
759809f36c6SManuel Lauss config2 |= SD_CONFIG2_BB;
760809f36c6SManuel Lauss break;
761281dd23eSManuel Lauss case MMC_BUS_WIDTH_4:
762809f36c6SManuel Lauss config2 &= ~SD_CONFIG2_BB;
763281dd23eSManuel Lauss config2 |= SD_CONFIG2_WB;
764281dd23eSManuel Lauss break;
765281dd23eSManuel Lauss case MMC_BUS_WIDTH_1:
766809f36c6SManuel Lauss config2 &= ~(SD_CONFIG2_WB | SD_CONFIG2_BB);
767281dd23eSManuel Lauss break;
768281dd23eSManuel Lauss }
7692f73bfbeSManuel Lauss __raw_writel(config2, HOST_CONFIG2(host));
7702f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
7711c6a0718SPierre Ossman }
7721c6a0718SPierre Ossman
773c4223c2cSManuel Lauss #define STATUS_TIMEOUT (SD_STATUS_RAT | SD_STATUS_DT)
774c4223c2cSManuel Lauss #define STATUS_DATA_IN (SD_STATUS_NE)
775c4223c2cSManuel Lauss #define STATUS_DATA_OUT (SD_STATUS_TH)
776c4223c2cSManuel Lauss
au1xmmc_irq(int irq,void * dev_id)777c4223c2cSManuel Lauss static irqreturn_t au1xmmc_irq(int irq, void *dev_id)
778c4223c2cSManuel Lauss {
779c4223c2cSManuel Lauss struct au1xmmc_host *host = dev_id;
780c4223c2cSManuel Lauss u32 status;
781c4223c2cSManuel Lauss
7822f73bfbeSManuel Lauss status = __raw_readl(HOST_STATUS(host));
783c4223c2cSManuel Lauss
784c4223c2cSManuel Lauss if (!(status & SD_STATUS_I))
785c4223c2cSManuel Lauss return IRQ_NONE; /* not ours */
786c4223c2cSManuel Lauss
78720f522ffSManuel Lauss if (status & SD_STATUS_SI) /* SDIO */
78820f522ffSManuel Lauss mmc_signal_sdio_irq(host->mmc);
78920f522ffSManuel Lauss
790c4223c2cSManuel Lauss if (host->mrq && (status & STATUS_TIMEOUT)) {
791c4223c2cSManuel Lauss if (status & SD_STATUS_RAT)
792c4223c2cSManuel Lauss host->mrq->cmd->error = -ETIMEDOUT;
793c4223c2cSManuel Lauss else if (status & SD_STATUS_DT)
794c4223c2cSManuel Lauss host->mrq->data->error = -ETIMEDOUT;
795c4223c2cSManuel Lauss
796c4223c2cSManuel Lauss /* In PIO mode, interrupts might still be enabled */
797c4223c2cSManuel Lauss IRQ_OFF(host, SD_CONFIG_NE | SD_CONFIG_TH);
798c4223c2cSManuel Lauss
799c4223c2cSManuel Lauss /* IRQ_OFF(host, SD_CONFIG_TH | SD_CONFIG_RA | SD_CONFIG_RF); */
800c4223c2cSManuel Lauss tasklet_schedule(&host->finish_task);
801c4223c2cSManuel Lauss }
802c4223c2cSManuel Lauss #if 0
803c4223c2cSManuel Lauss else if (status & SD_STATUS_DD) {
804c4223c2cSManuel Lauss /* Sometimes we get a DD before a NE in PIO mode */
805c4223c2cSManuel Lauss if (!(host->flags & HOST_F_DMA) && (status & SD_STATUS_NE))
806c4223c2cSManuel Lauss au1xmmc_receive_pio(host);
807c4223c2cSManuel Lauss else {
808c4223c2cSManuel Lauss au1xmmc_data_complete(host, status);
809c4223c2cSManuel Lauss /* tasklet_schedule(&host->data_task); */
810c4223c2cSManuel Lauss }
811c4223c2cSManuel Lauss }
812c4223c2cSManuel Lauss #endif
813c4223c2cSManuel Lauss else if (status & SD_STATUS_CR) {
814c4223c2cSManuel Lauss if (host->status == HOST_S_CMD)
815c4223c2cSManuel Lauss au1xmmc_cmd_complete(host, status);
816c4223c2cSManuel Lauss
817c4223c2cSManuel Lauss } else if (!(host->flags & HOST_F_DMA)) {
818c4223c2cSManuel Lauss if ((host->flags & HOST_F_XMIT) && (status & STATUS_DATA_OUT))
819c4223c2cSManuel Lauss au1xmmc_send_pio(host);
820c4223c2cSManuel Lauss else if ((host->flags & HOST_F_RECV) && (status & STATUS_DATA_IN))
821c4223c2cSManuel Lauss au1xmmc_receive_pio(host);
822c4223c2cSManuel Lauss
823c4223c2cSManuel Lauss } else if (status & 0x203F3C70) {
824c4223c2cSManuel Lauss DBG("Unhandled status %8.8x\n", host->pdev->id,
825c4223c2cSManuel Lauss status);
826c4223c2cSManuel Lauss }
827c4223c2cSManuel Lauss
8282f73bfbeSManuel Lauss __raw_writel(status, HOST_STATUS(host));
8292f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
830c4223c2cSManuel Lauss
831c4223c2cSManuel Lauss return IRQ_HANDLED;
832c4223c2cSManuel Lauss }
833c4223c2cSManuel Lauss
834c4223c2cSManuel Lauss /* 8bit memory DMA device */
835c4223c2cSManuel Lauss static dbdev_tab_t au1xmmc_mem_dbdev = {
836c4223c2cSManuel Lauss .dev_id = DSCR_CMD0_ALWAYS,
837c4223c2cSManuel Lauss .dev_flags = DEV_FLAGS_ANYUSE,
838c4223c2cSManuel Lauss .dev_tsize = 0,
839c4223c2cSManuel Lauss .dev_devwidth = 8,
840c4223c2cSManuel Lauss .dev_physaddr = 0x00000000,
841c4223c2cSManuel Lauss .dev_intlevel = 0,
842c4223c2cSManuel Lauss .dev_intpolarity = 0,
843c4223c2cSManuel Lauss };
844c4223c2cSManuel Lauss static int memid;
845c4223c2cSManuel Lauss
au1xmmc_dbdma_callback(int irq,void * dev_id)846c4223c2cSManuel Lauss static void au1xmmc_dbdma_callback(int irq, void *dev_id)
8471c6a0718SPierre Ossman {
8481c6a0718SPierre Ossman struct au1xmmc_host *host = (struct au1xmmc_host *)dev_id;
8491c6a0718SPierre Ossman
8501c6a0718SPierre Ossman /* Avoid spurious interrupts */
8511c6a0718SPierre Ossman if (!host->mrq)
8521c6a0718SPierre Ossman return;
8531c6a0718SPierre Ossman
8541c6a0718SPierre Ossman if (host->flags & HOST_F_STOP)
8551c6a0718SPierre Ossman SEND_STOP(host);
8561c6a0718SPierre Ossman
8571c6a0718SPierre Ossman tasklet_schedule(&host->data_task);
8581c6a0718SPierre Ossman }
8591c6a0718SPierre Ossman
au1xmmc_dbdma_init(struct au1xmmc_host * host)860c4223c2cSManuel Lauss static int au1xmmc_dbdma_init(struct au1xmmc_host *host)
8611c6a0718SPierre Ossman {
862c4223c2cSManuel Lauss struct resource *res;
863c4223c2cSManuel Lauss int txid, rxid;
8641c6a0718SPierre Ossman
865c4223c2cSManuel Lauss res = platform_get_resource(host->pdev, IORESOURCE_DMA, 0);
866c4223c2cSManuel Lauss if (!res)
867c4223c2cSManuel Lauss return -ENODEV;
868c4223c2cSManuel Lauss txid = res->start;
8691c6a0718SPierre Ossman
870c4223c2cSManuel Lauss res = platform_get_resource(host->pdev, IORESOURCE_DMA, 1);
871c4223c2cSManuel Lauss if (!res)
872c4223c2cSManuel Lauss return -ENODEV;
873c4223c2cSManuel Lauss rxid = res->start;
8741c6a0718SPierre Ossman
875c4223c2cSManuel Lauss if (!memid)
876c4223c2cSManuel Lauss return -ENODEV;
8771c6a0718SPierre Ossman
878c4223c2cSManuel Lauss host->tx_chan = au1xxx_dbdma_chan_alloc(memid, txid,
879c4223c2cSManuel Lauss au1xmmc_dbdma_callback, (void *)host);
880c4223c2cSManuel Lauss if (!host->tx_chan) {
881c4223c2cSManuel Lauss dev_err(&host->pdev->dev, "cannot allocate TX DMA\n");
882c4223c2cSManuel Lauss return -ENODEV;
8831c6a0718SPierre Ossman }
8841c6a0718SPierre Ossman
885c4223c2cSManuel Lauss host->rx_chan = au1xxx_dbdma_chan_alloc(rxid, memid,
886c4223c2cSManuel Lauss au1xmmc_dbdma_callback, (void *)host);
887c4223c2cSManuel Lauss if (!host->rx_chan) {
888c4223c2cSManuel Lauss dev_err(&host->pdev->dev, "cannot allocate RX DMA\n");
889c4223c2cSManuel Lauss au1xxx_dbdma_chan_free(host->tx_chan);
890c4223c2cSManuel Lauss return -ENODEV;
891c4223c2cSManuel Lauss }
8921c6a0718SPierre Ossman
893c4223c2cSManuel Lauss au1xxx_dbdma_set_devwidth(host->tx_chan, 8);
894c4223c2cSManuel Lauss au1xxx_dbdma_set_devwidth(host->rx_chan, 8);
895c4223c2cSManuel Lauss
896c4223c2cSManuel Lauss au1xxx_dbdma_ring_alloc(host->tx_chan, AU1XMMC_DESCRIPTOR_COUNT);
897c4223c2cSManuel Lauss au1xxx_dbdma_ring_alloc(host->rx_chan, AU1XMMC_DESCRIPTOR_COUNT);
898c4223c2cSManuel Lauss
899c4223c2cSManuel Lauss /* DBDMA is good to go */
9001177d99dSManuel Lauss host->flags |= HOST_F_DMA | HOST_F_DBDMA;
901c4223c2cSManuel Lauss
902c4223c2cSManuel Lauss return 0;
903c4223c2cSManuel Lauss }
904c4223c2cSManuel Lauss
au1xmmc_dbdma_shutdown(struct au1xmmc_host * host)905c4223c2cSManuel Lauss static void au1xmmc_dbdma_shutdown(struct au1xmmc_host *host)
906c4223c2cSManuel Lauss {
907c4223c2cSManuel Lauss if (host->flags & HOST_F_DMA) {
908c4223c2cSManuel Lauss host->flags &= ~HOST_F_DMA;
909c4223c2cSManuel Lauss au1xxx_dbdma_chan_free(host->tx_chan);
910c4223c2cSManuel Lauss au1xxx_dbdma_chan_free(host->rx_chan);
9111c6a0718SPierre Ossman }
9121c6a0718SPierre Ossman }
9131c6a0718SPierre Ossman
au1xmmc_enable_sdio_irq(struct mmc_host * mmc,int en)91420f522ffSManuel Lauss static void au1xmmc_enable_sdio_irq(struct mmc_host *mmc, int en)
91520f522ffSManuel Lauss {
91620f522ffSManuel Lauss struct au1xmmc_host *host = mmc_priv(mmc);
91720f522ffSManuel Lauss
91820f522ffSManuel Lauss if (en)
91920f522ffSManuel Lauss IRQ_ON(host, SD_CONFIG_SI);
92020f522ffSManuel Lauss else
92120f522ffSManuel Lauss IRQ_OFF(host, SD_CONFIG_SI);
92220f522ffSManuel Lauss }
92320f522ffSManuel Lauss
9241c6a0718SPierre Ossman static const struct mmc_host_ops au1xmmc_ops = {
9251c6a0718SPierre Ossman .request = au1xmmc_request,
9261c6a0718SPierre Ossman .set_ios = au1xmmc_set_ios,
9271c6a0718SPierre Ossman .get_ro = au1xmmc_card_readonly,
928e2d26477SManuel Lauss .get_cd = au1xmmc_card_inserted,
92920f522ffSManuel Lauss .enable_sdio_irq = au1xmmc_enable_sdio_irq,
9301c6a0718SPierre Ossman };
9311c6a0718SPierre Ossman
au1xmmc_probe(struct platform_device * pdev)932c3be1efdSBill Pemberton static int au1xmmc_probe(struct platform_device *pdev)
933c4223c2cSManuel Lauss {
934c4223c2cSManuel Lauss struct mmc_host *mmc;
935c4223c2cSManuel Lauss struct au1xmmc_host *host;
936c4223c2cSManuel Lauss struct resource *r;
937809f36c6SManuel Lauss int ret, iflag;
938c4223c2cSManuel Lauss
939c4223c2cSManuel Lauss mmc = mmc_alloc_host(sizeof(struct au1xmmc_host), &pdev->dev);
9401c6a0718SPierre Ossman if (!mmc) {
941c4223c2cSManuel Lauss dev_err(&pdev->dev, "no memory for mmc_host\n");
942c4223c2cSManuel Lauss ret = -ENOMEM;
943c4223c2cSManuel Lauss goto out0;
944c4223c2cSManuel Lauss }
945c4223c2cSManuel Lauss
946c4223c2cSManuel Lauss host = mmc_priv(mmc);
947c4223c2cSManuel Lauss host->mmc = mmc;
948c4223c2cSManuel Lauss host->platdata = pdev->dev.platform_data;
949c4223c2cSManuel Lauss host->pdev = pdev;
950c4223c2cSManuel Lauss
951c4223c2cSManuel Lauss ret = -ENODEV;
952c4223c2cSManuel Lauss r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
953c4223c2cSManuel Lauss if (!r) {
954c4223c2cSManuel Lauss dev_err(&pdev->dev, "no mmio defined\n");
955c4223c2cSManuel Lauss goto out1;
956c4223c2cSManuel Lauss }
957c4223c2cSManuel Lauss
9587a5ea56aSH Hartley Sweeten host->ioarea = request_mem_region(r->start, resource_size(r),
959c4223c2cSManuel Lauss pdev->name);
960c4223c2cSManuel Lauss if (!host->ioarea) {
961c4223c2cSManuel Lauss dev_err(&pdev->dev, "mmio already in use\n");
962c4223c2cSManuel Lauss goto out1;
963c4223c2cSManuel Lauss }
964c4223c2cSManuel Lauss
9652f73bfbeSManuel Lauss host->iobase = ioremap(r->start, 0x3c);
966c4223c2cSManuel Lauss if (!host->iobase) {
967c4223c2cSManuel Lauss dev_err(&pdev->dev, "cannot remap mmio\n");
968c4223c2cSManuel Lauss goto out2;
969c4223c2cSManuel Lauss }
970c4223c2cSManuel Lauss
97167d7d920SYangtao Li host->irq = platform_get_irq(pdev, 0);
972a1ab47acSSergey Shtylyov if (host->irq < 0) {
973a1ab47acSSergey Shtylyov ret = host->irq;
974c4223c2cSManuel Lauss goto out3;
975a1ab47acSSergey Shtylyov }
9761c6a0718SPierre Ossman
9771c6a0718SPierre Ossman mmc->ops = &au1xmmc_ops;
9781c6a0718SPierre Ossman
9791c6a0718SPierre Ossman mmc->f_min = 450000;
9801c6a0718SPierre Ossman mmc->f_max = 24000000;
9811c6a0718SPierre Ossman
9821c6a0718SPierre Ossman mmc->max_blk_size = 2048;
9831c6a0718SPierre Ossman mmc->max_blk_count = 512;
9841c6a0718SPierre Ossman
9851c6a0718SPierre Ossman mmc->ocr_avail = AU1XMMC_OCR;
98620f522ffSManuel Lauss mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
987809f36c6SManuel Lauss mmc->max_segs = AU1XMMC_DESCRIPTOR_COUNT;
988809f36c6SManuel Lauss
989809f36c6SManuel Lauss iflag = IRQF_SHARED; /* Au1100/Au1200: one int for both ctrls */
990809f36c6SManuel Lauss
991809f36c6SManuel Lauss switch (alchemy_get_cputype()) {
992809f36c6SManuel Lauss case ALCHEMY_CPU_AU1100:
993809f36c6SManuel Lauss mmc->max_seg_size = AU1100_MMC_DESCRIPTOR_SIZE;
994809f36c6SManuel Lauss break;
995809f36c6SManuel Lauss case ALCHEMY_CPU_AU1200:
996809f36c6SManuel Lauss mmc->max_seg_size = AU1200_MMC_DESCRIPTOR_SIZE;
997809f36c6SManuel Lauss break;
998809f36c6SManuel Lauss case ALCHEMY_CPU_AU1300:
999809f36c6SManuel Lauss iflag = 0; /* nothing is shared */
1000809f36c6SManuel Lauss mmc->max_seg_size = AU1200_MMC_DESCRIPTOR_SIZE;
1001809f36c6SManuel Lauss mmc->f_max = 52000000;
1002809f36c6SManuel Lauss if (host->ioarea->start == AU1100_SD0_PHYS_ADDR)
1003809f36c6SManuel Lauss mmc->caps |= MMC_CAP_8_BIT_DATA;
1004809f36c6SManuel Lauss break;
1005809f36c6SManuel Lauss }
1006809f36c6SManuel Lauss
1007809f36c6SManuel Lauss ret = request_irq(host->irq, au1xmmc_irq, iflag, DRIVER_NAME, host);
1008809f36c6SManuel Lauss if (ret) {
1009809f36c6SManuel Lauss dev_err(&pdev->dev, "cannot grab IRQ\n");
1010809f36c6SManuel Lauss goto out3;
1011809f36c6SManuel Lauss }
10121c6a0718SPierre Ossman
1013b6507596SManuel Lauss host->clk = clk_get(&pdev->dev, ALCHEMY_PERIPH_CLK);
1014b6507596SManuel Lauss if (IS_ERR(host->clk)) {
1015b6507596SManuel Lauss dev_err(&pdev->dev, "cannot find clock\n");
1016ee9d19d4SWei Yongjun ret = PTR_ERR(host->clk);
1017b6507596SManuel Lauss goto out_irq;
1018b6507596SManuel Lauss }
1019ee9d19d4SWei Yongjun
1020ee9d19d4SWei Yongjun ret = clk_prepare_enable(host->clk);
1021ee9d19d4SWei Yongjun if (ret) {
1022b6507596SManuel Lauss dev_err(&pdev->dev, "cannot enable clock\n");
1023b6507596SManuel Lauss goto out_clk;
1024b6507596SManuel Lauss }
1025b6507596SManuel Lauss
10261c6a0718SPierre Ossman host->status = HOST_S_IDLE;
10271c6a0718SPierre Ossman
1028c4223c2cSManuel Lauss /* board-specific carddetect setup, if any */
1029c4223c2cSManuel Lauss if (host->platdata && host->platdata->cd_setup) {
1030c4223c2cSManuel Lauss ret = host->platdata->cd_setup(mmc, 1);
1031c4223c2cSManuel Lauss if (ret) {
1032e2d26477SManuel Lauss dev_warn(&pdev->dev, "board CD setup failed\n");
1033e2d26477SManuel Lauss mmc->caps |= MMC_CAP_NEEDS_POLL;
1034c4223c2cSManuel Lauss }
1035e2d26477SManuel Lauss } else
1036e2d26477SManuel Lauss mmc->caps |= MMC_CAP_NEEDS_POLL;
10371c6a0718SPierre Ossman
10383b839070SManuel Lauss /* platform may not be able to use all advertised caps */
10393b839070SManuel Lauss if (host->platdata)
10403b839070SManuel Lauss mmc->caps &= ~(host->platdata->mask_host_caps);
10413b839070SManuel Lauss
1042a1149c38SEmil Renner Berthing tasklet_setup(&host->data_task, au1xmmc_tasklet_data);
10431c6a0718SPierre Ossman
1044a1149c38SEmil Renner Berthing tasklet_setup(&host->finish_task, au1xmmc_tasklet_finish);
10451c6a0718SPierre Ossman
10461177d99dSManuel Lauss if (has_dbdma()) {
1047c4223c2cSManuel Lauss ret = au1xmmc_dbdma_init(host);
1048c4223c2cSManuel Lauss if (ret)
1049a3c76eb9SGirish K S pr_info(DRIVER_NAME ": DBDMA init failed; using PIO\n");
10501177d99dSManuel Lauss }
10511c6a0718SPierre Ossman
1052c4223c2cSManuel Lauss #ifdef CONFIG_LEDS_CLASS
1053c4223c2cSManuel Lauss if (host->platdata && host->platdata->led) {
1054c4223c2cSManuel Lauss struct led_classdev *led = host->platdata->led;
1055c4223c2cSManuel Lauss led->name = mmc_hostname(mmc);
1056c4223c2cSManuel Lauss led->brightness = LED_OFF;
1057c4223c2cSManuel Lauss led->default_trigger = mmc_hostname(mmc);
1058c4223c2cSManuel Lauss ret = led_classdev_register(mmc_dev(mmc), led);
1059c4223c2cSManuel Lauss if (ret)
1060c4223c2cSManuel Lauss goto out5;
1061c4223c2cSManuel Lauss }
1062c4223c2cSManuel Lauss #endif
10631c6a0718SPierre Ossman
10641c6a0718SPierre Ossman au1xmmc_reset_controller(host);
10651c6a0718SPierre Ossman
1066c4223c2cSManuel Lauss ret = mmc_add_host(mmc);
1067c4223c2cSManuel Lauss if (ret) {
1068c4223c2cSManuel Lauss dev_err(&pdev->dev, "cannot add mmc host\n");
1069c4223c2cSManuel Lauss goto out6;
1070c4223c2cSManuel Lauss }
10711c6a0718SPierre Ossman
1072dd8572afSManuel Lauss platform_set_drvdata(pdev, host);
1073c4223c2cSManuel Lauss
10742f73bfbeSManuel Lauss pr_info(DRIVER_NAME ": MMC Controller %d set up at %p"
1075c4223c2cSManuel Lauss " (mode=%s)\n", pdev->id, host->iobase,
1076c4223c2cSManuel Lauss host->flags & HOST_F_DMA ? "dma" : "pio");
10771c6a0718SPierre Ossman
1078c4223c2cSManuel Lauss return 0; /* all ok */
10791c6a0718SPierre Ossman
1080c4223c2cSManuel Lauss out6:
1081c4223c2cSManuel Lauss #ifdef CONFIG_LEDS_CLASS
1082c4223c2cSManuel Lauss if (host->platdata && host->platdata->led)
1083c4223c2cSManuel Lauss led_classdev_unregister(host->platdata->led);
1084c4223c2cSManuel Lauss out5:
1085c4223c2cSManuel Lauss #endif
10862f73bfbeSManuel Lauss __raw_writel(0, HOST_ENABLE(host));
10872f73bfbeSManuel Lauss __raw_writel(0, HOST_CONFIG(host));
10882f73bfbeSManuel Lauss __raw_writel(0, HOST_CONFIG2(host));
10892f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
10901c6a0718SPierre Ossman
10911177d99dSManuel Lauss if (host->flags & HOST_F_DBDMA)
1092c4223c2cSManuel Lauss au1xmmc_dbdma_shutdown(host);
10931c6a0718SPierre Ossman
10941c6a0718SPierre Ossman tasklet_kill(&host->data_task);
10951c6a0718SPierre Ossman tasklet_kill(&host->finish_task);
10961c6a0718SPierre Ossman
1097e2d26477SManuel Lauss if (host->platdata && host->platdata->cd_setup &&
1098e2d26477SManuel Lauss !(mmc->caps & MMC_CAP_NEEDS_POLL))
1099c4223c2cSManuel Lauss host->platdata->cd_setup(mmc, 0);
11005cbedf52SChristophe JAILLET
1101b6507596SManuel Lauss clk_disable_unprepare(host->clk);
11025cbedf52SChristophe JAILLET out_clk:
1103b6507596SManuel Lauss clk_put(host->clk);
1104b6507596SManuel Lauss out_irq:
1105c4223c2cSManuel Lauss free_irq(host->irq, host);
1106c4223c2cSManuel Lauss out3:
1107c4223c2cSManuel Lauss iounmap((void *)host->iobase);
1108c4223c2cSManuel Lauss out2:
1109c4223c2cSManuel Lauss release_resource(host->ioarea);
1110c4223c2cSManuel Lauss kfree(host->ioarea);
1111c4223c2cSManuel Lauss out1:
1112c4223c2cSManuel Lauss mmc_free_host(mmc);
1113c4223c2cSManuel Lauss out0:
1114c4223c2cSManuel Lauss return ret;
11151c6a0718SPierre Ossman }
11161c6a0718SPierre Ossman
au1xmmc_remove(struct platform_device * pdev)1117*c7d25514SYangtao Li static void au1xmmc_remove(struct platform_device *pdev)
1118c4223c2cSManuel Lauss {
1119dd8572afSManuel Lauss struct au1xmmc_host *host = platform_get_drvdata(pdev);
1120c4223c2cSManuel Lauss
1121dd8572afSManuel Lauss if (host) {
1122dd8572afSManuel Lauss mmc_remove_host(host->mmc);
1123c4223c2cSManuel Lauss
1124c4223c2cSManuel Lauss #ifdef CONFIG_LEDS_CLASS
1125c4223c2cSManuel Lauss if (host->platdata && host->platdata->led)
1126c4223c2cSManuel Lauss led_classdev_unregister(host->platdata->led);
1127c4223c2cSManuel Lauss #endif
1128c4223c2cSManuel Lauss
1129e2d26477SManuel Lauss if (host->platdata && host->platdata->cd_setup &&
1130dd8572afSManuel Lauss !(host->mmc->caps & MMC_CAP_NEEDS_POLL))
1131dd8572afSManuel Lauss host->platdata->cd_setup(host->mmc, 0);
1132c4223c2cSManuel Lauss
11332f73bfbeSManuel Lauss __raw_writel(0, HOST_ENABLE(host));
11342f73bfbeSManuel Lauss __raw_writel(0, HOST_CONFIG(host));
11352f73bfbeSManuel Lauss __raw_writel(0, HOST_CONFIG2(host));
11362f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
1137c4223c2cSManuel Lauss
1138c4223c2cSManuel Lauss tasklet_kill(&host->data_task);
1139c4223c2cSManuel Lauss tasklet_kill(&host->finish_task);
1140c4223c2cSManuel Lauss
11411177d99dSManuel Lauss if (host->flags & HOST_F_DBDMA)
1142c4223c2cSManuel Lauss au1xmmc_dbdma_shutdown(host);
11431177d99dSManuel Lauss
1144c4223c2cSManuel Lauss au1xmmc_set_power(host, 0);
1145c4223c2cSManuel Lauss
1146b6507596SManuel Lauss clk_disable_unprepare(host->clk);
1147b6507596SManuel Lauss clk_put(host->clk);
1148b6507596SManuel Lauss
1149c4223c2cSManuel Lauss free_irq(host->irq, host);
1150c4223c2cSManuel Lauss iounmap((void *)host->iobase);
1151c4223c2cSManuel Lauss release_resource(host->ioarea);
1152c4223c2cSManuel Lauss kfree(host->ioarea);
1153c4223c2cSManuel Lauss
1154dd8572afSManuel Lauss mmc_free_host(host->mmc);
1155c4223c2cSManuel Lauss }
11561c6a0718SPierre Ossman }
11571c6a0718SPierre Ossman
1158dd8572afSManuel Lauss #ifdef CONFIG_PM
au1xmmc_suspend(struct platform_device * pdev,pm_message_t state)1159dd8572afSManuel Lauss static int au1xmmc_suspend(struct platform_device *pdev, pm_message_t state)
1160dd8572afSManuel Lauss {
1161dd8572afSManuel Lauss struct au1xmmc_host *host = platform_get_drvdata(pdev);
1162dd8572afSManuel Lauss
11632f73bfbeSManuel Lauss __raw_writel(0, HOST_CONFIG2(host));
11642f73bfbeSManuel Lauss __raw_writel(0, HOST_CONFIG(host));
11652f73bfbeSManuel Lauss __raw_writel(0xffffffff, HOST_STATUS(host));
11662f73bfbeSManuel Lauss __raw_writel(0, HOST_ENABLE(host));
11672f73bfbeSManuel Lauss wmb(); /* drain writebuffer */
1168dd8572afSManuel Lauss
1169dd8572afSManuel Lauss return 0;
1170dd8572afSManuel Lauss }
1171dd8572afSManuel Lauss
au1xmmc_resume(struct platform_device * pdev)1172dd8572afSManuel Lauss static int au1xmmc_resume(struct platform_device *pdev)
1173dd8572afSManuel Lauss {
1174dd8572afSManuel Lauss struct au1xmmc_host *host = platform_get_drvdata(pdev);
1175dd8572afSManuel Lauss
1176dd8572afSManuel Lauss au1xmmc_reset_controller(host);
1177dd8572afSManuel Lauss
11781e63d485SUlf Hansson return 0;
1179dd8572afSManuel Lauss }
1180dd8572afSManuel Lauss #else
1181dd8572afSManuel Lauss #define au1xmmc_suspend NULL
1182dd8572afSManuel Lauss #define au1xmmc_resume NULL
1183dd8572afSManuel Lauss #endif
1184dd8572afSManuel Lauss
11851c6a0718SPierre Ossman static struct platform_driver au1xmmc_driver = {
11861c6a0718SPierre Ossman .probe = au1xmmc_probe,
1187*c7d25514SYangtao Li .remove_new = au1xmmc_remove,
1188dd8572afSManuel Lauss .suspend = au1xmmc_suspend,
1189dd8572afSManuel Lauss .resume = au1xmmc_resume,
11901c6a0718SPierre Ossman .driver = {
11911c6a0718SPierre Ossman .name = DRIVER_NAME,
119221b2cec6SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS,
11931c6a0718SPierre Ossman },
11941c6a0718SPierre Ossman };
11951c6a0718SPierre Ossman
au1xmmc_init(void)11961c6a0718SPierre Ossman static int __init au1xmmc_init(void)
11971c6a0718SPierre Ossman {
11981177d99dSManuel Lauss if (has_dbdma()) {
1199c4223c2cSManuel Lauss /* DSCR_CMD0_ALWAYS has a stride of 32 bits, we need a stride
1200c4223c2cSManuel Lauss * of 8 bits. And since devices are shared, we need to create
1201c4223c2cSManuel Lauss * our own to avoid freaking out other devices.
1202c4223c2cSManuel Lauss */
1203c4223c2cSManuel Lauss memid = au1xxx_ddma_add_device(&au1xmmc_mem_dbdev);
1204c4223c2cSManuel Lauss if (!memid)
1205d6748066SLinus Torvalds pr_err("au1xmmc: cannot add memory dbdma\n");
12061177d99dSManuel Lauss }
12071c6a0718SPierre Ossman return platform_driver_register(&au1xmmc_driver);
12081c6a0718SPierre Ossman }
12091c6a0718SPierre Ossman
au1xmmc_exit(void)12101c6a0718SPierre Ossman static void __exit au1xmmc_exit(void)
12111c6a0718SPierre Ossman {
12121177d99dSManuel Lauss if (has_dbdma() && memid)
1213c4223c2cSManuel Lauss au1xxx_ddma_del_device(memid);
12141177d99dSManuel Lauss
12151c6a0718SPierre Ossman platform_driver_unregister(&au1xmmc_driver);
12161c6a0718SPierre Ossman }
12171c6a0718SPierre Ossman
12181c6a0718SPierre Ossman module_init(au1xmmc_init);
12191c6a0718SPierre Ossman module_exit(au1xmmc_exit);
12201c6a0718SPierre Ossman
12211c6a0718SPierre Ossman MODULE_AUTHOR("Advanced Micro Devices, Inc");
12221c6a0718SPierre Ossman MODULE_DESCRIPTION("MMC/SD driver for the Alchemy Au1XXX");
12231c6a0718SPierre Ossman MODULE_LICENSE("GPL");
1224bc65c724SKay Sievers MODULE_ALIAS("platform:au1xxx-mmc");
1225