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Searched refs:gcr (Results 1 – 25 of 81) sorted by relevance

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/openbmc/qemu/hw/misc/
H A Dmips_cmgcr.c38 memory_region_set_address(&gcr->iomem, gcr->gcr_base); in update_gcr_base()
48 if (is_cpc_connected(gcr)) { in update_cpc_base()
61 if (is_gic_connected(gcr)) { in update_gic_base()
85 return gcr->gcr_base; in gcr_read()
87 return gcr->gcr_rev; in gcr_read()
89 return gcr->gic_base; in gcr_read()
91 return gcr->cpc_base; in gcr_read()
103 return gcr->num_vps - 1; in gcr_read()
135 update_gcr_base(gcr, data); in gcr_write()
138 update_gic_base(gcr, data); in gcr_write()
[all …]
/openbmc/linux/arch/s390/kvm/
H A Dguestdbg.c62 u64 *cr9 = &vcpu->arch.sie_block->gcr[9]; in enable_all_hw_bp()
63 u64 *cr10 = &vcpu->arch.sie_block->gcr[10]; in enable_all_hw_bp()
64 u64 *cr11 = &vcpu->arch.sie_block->gcr[11]; in enable_all_hw_bp()
102 u64 *cr9 = &vcpu->arch.sie_block->gcr[9]; in enable_all_hw_wp()
103 u64 *cr10 = &vcpu->arch.sie_block->gcr[10]; in enable_all_hw_wp()
104 u64 *cr11 = &vcpu->arch.sie_block->gcr[11]; in enable_all_hw_wp()
158 vcpu->arch.sie_block->gcr[10] = 0; in kvm_s390_patch_guest_per_regs()
159 vcpu->arch.sie_block->gcr[11] = -1UL; in kvm_s390_patch_guest_per_regs()
541 u64 cr9 = vcpu->arch.sie_block->gcr[9]; in filter_guest_per_event()
542 u64 cr10 = vcpu->arch.sie_block->gcr[10]; in filter_guest_per_event()
[all …]
H A Dgaccess.c398 asce->val = vcpu->arch.sie_block->gcr[1]; in ar_translation()
401 asce->val = vcpu->arch.sie_block->gcr[7]; in ar_translation()
409 ald_addr = vcpu->arch.sie_block->gcr[5]; in ar_translation()
411 ald_addr = vcpu->arch.sie_block->gcr[2]; in ar_translation()
444 eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff; in ar_translation()
589 asce->val = vcpu->arch.sie_block->gcr[1]; in get_vcpu_asce()
592 asce->val = vcpu->arch.sie_block->gcr[7]; in get_vcpu_asce()
595 asce->val = vcpu->arch.sie_block->gcr[13]; in get_vcpu_asce()
645 ctlreg0.val = vcpu->arch.sie_block->gcr[0]; in guest_translate()
805 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; in low_address_protection_enabled()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/nuvoton/
H A Dnuvoton,npcm-gcr.yaml4 $id: http://devicetree.org/schemas/soc/nuvoton/nuvoton,npcm-gcr.yaml#
22 - nuvoton,wpcm450-gcr
23 - nuvoton,npcm750-gcr
24 - nuvoton,npcm845-gcr
40 gcr: syscon@800000 {
41 compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-gnome/gcr/
H A Dgcr3_3.41.2.bb5 HOMEPAGE = "https://gitlab.gnome.org/GNOME/gcr"
6 BUGTRACKER = "https://gitlab.gnome.org/GNOME/gcr/issues"
24 SRC_URI = "https://download.gnome.org/sources/gcr/3.41/gcr-${PV}.tar.xz;name=archive"
28 S = "${WORKDIR}/gcr-${PV}"
42 ${datadir}/gcr-3 \
44 ${systemd_user_unitdir}/gcr-ssh-agent.socket \
45 ${systemd_user_unitdir}/gcr-ssh-agent.service \
/openbmc/linux/drivers/soc/nuvoton/
H A Dwpcm450-soc.c52 struct regmap *gcr; in wpcm450_soc_init() local
59 gcr = syscon_regmap_lookup_by_compatible("nuvoton,wpcm450-gcr"); in wpcm450_soc_init()
60 if (IS_ERR(gcr)) in wpcm450_soc_init()
61 return PTR_ERR(gcr); in wpcm450_soc_init()
62 ret = regmap_read(gcr, GCR_PDID, &pdid); in wpcm450_soc_init()
/openbmc/qemu/hw/mips/
H A Dcps.c151 object_initialize_child(OBJECT(dev), "gcr", &s->gcr, TYPE_MIPS_GCR); in mips_cps_realize()
152 object_property_set_uint(OBJECT(&s->gcr), "num-vp", s->num_vp, in mips_cps_realize()
154 object_property_set_int(OBJECT(&s->gcr), "gcr-rev", 0x800, in mips_cps_realize()
156 object_property_set_int(OBJECT(&s->gcr), "gcr-base", gcr_base, in mips_cps_realize()
158 object_property_set_link(OBJECT(&s->gcr), "gic", OBJECT(&s->gic.mr), in mips_cps_realize()
160 object_property_set_link(OBJECT(&s->gcr), "cpc", OBJECT(&s->cpc.mr), in mips_cps_realize()
162 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gcr), errp)) { in mips_cps_realize()
167 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gcr), 0)); in mips_cps_realize()
/openbmc/linux/arch/mips/include/asm/
H A Dmips-cm.h115 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_GCB_OFS + off, name) \
116 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_COCB_OFS + off, redir_##name)
119 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_GCB_OFS + off, name) \
120 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_COCB_OFS + off, redir_##name)
123 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_CLCB_OFS + off, cl_##name) \
124 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_COCB_OFS + off, co_##name)
127 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_CLCB_OFS + off, cl_##name) \
128 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_COCB_OFS + off, co_##name)
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dinterrupts.c35 out_be32(&pic->gcr, MPC85xx_PICGCR_RST); in interrupt_init_cpu()
36 while (in_be32(&pic->gcr) & MPC85xx_PICGCR_RST) in interrupt_init_cpu()
38 out_be32(&pic->gcr, MPC85xx_PICGCR_M); in interrupt_init_cpu()
39 in_be32(&pic->gcr); in interrupt_init_cpu()
/openbmc/openbmc/meta-openembedded/meta-gnome/recipes-connectivity/libnma/
H A Dlibnma_1.10.6.bb9 REQUIRED_DISTRO_FEATURES = "${@bb.utils.contains('PACKAGECONFIG','gcr','x11','',d)} opengl"
14 PACKAGECONFIG ?= "gcr iso_codes mobile_broadband_provider_info"
15 PACKAGECONFIG[gcr] = "-Dgcr=true,-Dgcr=false,gcr"
/openbmc/openbmc/poky/meta/recipes-gnome/gcr/
H A Dgcr_4.2.1.bb5 HOMEPAGE = "https://gitlab.gnome.org/GNOME/gcr"
6 BUGTRACKER = "https://gitlab.gnome.org/GNOME/gcr/issues"
39 ${datadir}/gcr-4 \
40 ${systemd_user_unitdir}/gcr-ssh-agent.socket \
41 ${systemd_user_unitdir}/gcr-ssh-agent.service \
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/surf/surf/
H A D0001-config.ml-make-compatible-with-webkitgtk-2.34.0.patch32 -GTKINC = `pkg-config --cflags gtk+-3.0 gcr-3 webkit2gtk-4.0`
33 -GTKLIB = `pkg-config --libs gtk+-3.0 gcr-3 webkit2gtk-4.0`
36 +GTKINC = $(shell $(PKG_CONFIG) --cflags gtk+-3.0 gcr-3 webkit2gtk-4.1)
37 +GTKLIB = $(shell $(PKG_CONFIG) --libs gtk+-3.0 gcr-3 webkit2gtk-4.1)
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dinterrupts.c39 pic->gcr = MPC86xx_PICGCR_RST; in interrupt_init_cpu()
40 while (pic->gcr & MPC86xx_PICGCR_RST) in interrupt_init_cpu()
42 pic->gcr = MPC86xx_PICGCR_MODE; in interrupt_init_cpu()
/openbmc/linux/arch/arm64/boot/dts/nuvoton/
H A Dnuvoton-common-npcm8xx.dtsi20 gcr: system-controller@f0800000 { label
21 compatible = "nuvoton,npcm845-gcr", "syscon";
54 nuvoton,sysgcr = <&gcr>;
157 syscon = <&gcr>;
166 syscon = <&gcr>;
175 syscon = <&gcr>;
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-gnome/gcr/gcr3/
H A D0001-meson.build-correctly-handle-disabled-ssh_agent-opti.patch7 | gcr/meson.build:61:0: ERROR: Unable to get the path of a not-found external program
8 | gcr/meson.build:101:5: ERROR: Unknown variable "ssh_add_path".
12 Upstream-Status: Backport [ https://gitlab.gnome.org/GNOME/gcr/-/commit/9b67bb18d8409e0e693cc600050…
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun9i.c692 debug("DX2GCR0 reset: 0x%x\n", readl(&mctl_phy->dx[2].gcr[0])); in mctl_channel_init()
693 writel(0x7C000285, &mctl_phy->dx[2].gcr[0]); in mctl_channel_init()
694 writel(0x7C000285, &mctl_phy->dx[3].gcr[0]); in mctl_channel_init()
707 clrbits_le32(&mctl_phy->dx[lane].gcr[2], 0xffff); in mctl_channel_init()
708 clrbits_le32(&mctl_phy->dx[lane].gcr[3], in mctl_channel_init()
715 clrsetbits_le32(&mctl_phy->dx[lane].gcr[2], 0xffff, in mctl_channel_init()
718 setbits_le32(&mctl_phy->dx[lane].gcr[3], in mctl_channel_init()
721 setbits_le32(&mctl_phy->dx[lane].gcr[3], in mctl_channel_init()
H A Ddram_sunxi_dw.c457 clrsetbits_le32(&mctl_ctl->dx[i].gcr, clearmask, setmask); in mctl_channel_init()
490 writel(0x0, &mctl_ctl->dx[2].gcr); in mctl_channel_init()
491 writel(0x0, &mctl_ctl->dx[3].gcr); in mctl_channel_init()
493 writel(0x0, &mctl_ctl->dx[1].gcr); in mctl_channel_init()
540 writel(0x0, &mctl_ctl->dx[2].gcr); in mctl_channel_init()
541 writel(0x0, &mctl_ctl->dx[3].gcr); in mctl_channel_init()
546 writel(0x0, &mctl_ctl->dx[1].gcr); in mctl_channel_init()
H A Ddram_sun50i_h6.c551 clrsetbits_le32(&mctl_phy->dx[i].gcr[0], 0xe00, 0x800); in mctl_channel_init()
553 clrsetbits_le32(&mctl_phy->dx[i].gcr[2], 0xffff, 0x5555); in mctl_channel_init()
555 clrsetbits_le32(&mctl_phy->dx[i].gcr[3], 0x3030, 0x1010); in mctl_channel_init()
611 writel(0x00000909, &mctl_phy->dx[i].gcr[5]); in mctl_channel_init()
618 clrsetbits_le32(&mctl_phy->dx[i].gcr[2], 0xffff, val); in mctl_channel_init()
624 clrsetbits_le32(&mctl_phy->dx[i].gcr[3], 0x3030, val); in mctl_channel_init()
633 clrbits_le32(&mctl_phy->dx[i].gcr[3], ~0x3ffff); in mctl_channel_init()
/openbmc/u-boot/board/esd/vme8349/
H A Dpci.c112 out_be32(&immr->pci_ctrl[0].gcr, 0); in pci_init_board()
114 out_be32(&immr->pci_ctrl[0].gcr, 1); in pci_init_board()
/openbmc/linux/drivers/gpio/
H A Dgpio-xra1403.c124 unsigned int gcr; in xra1403_dbg_show() local
137 gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR]; in xra1403_dbg_show()
142 (gcr & BIT(i)) ? "in" : "out", in xra1403_dbg_show()
/openbmc/linux/sound/arm/
H A Dpxa2xx-ac97-lib.c275 u32 gcr = readl(ac97_reg_base + GCR); in pxa2xx_ac97_finish_reset() local
276 gcr &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN); in pxa2xx_ac97_finish_reset()
277 gcr |= GCR_SDONE_IE|GCR_CDONE_IE; in pxa2xx_ac97_finish_reset()
278 writel(gcr, ac97_reg_base + GCR); in pxa2xx_ac97_finish_reset()
/openbmc/qemu/include/hw/mips/
H A Dcps.h43 MIPSGCRState gcr; member
/openbmc/qemu/hw/arm/
H A Dnpcm7xx.c409 object_initialize_child(obj, "gcr", &s->gcr, TYPE_NPCM7XX_GCR); in npcm7xx_init()
410 object_property_add_alias(obj, "power-on-straps", OBJECT(&s->gcr), in npcm7xx_init()
512 object_property_set_int(OBJECT(&s->gcr), "disabled-modules", in npcm7xx_realize()
514 object_property_add_const_link(OBJECT(&s->gcr), "dram-mr", OBJECT(s->dram)); in npcm7xx_realize()
515 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gcr), errp)) { in npcm7xx_realize()
518 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gcr), 0, NPCM7XX_GCR_BA); in npcm7xx_realize()
/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_82598.c36 u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR); in ixgbe_set_pcie_completion_timeout() local
43 if (gcr & IXGBE_GCR_CMPL_TMOUT_MASK) in ixgbe_set_pcie_completion_timeout()
50 if (!(gcr & IXGBE_GCR_CAP_VER2)) { in ixgbe_set_pcie_completion_timeout()
51 gcr |= IXGBE_GCR_CMPL_TMOUT_10ms; in ixgbe_set_pcie_completion_timeout()
65 gcr &= ~IXGBE_GCR_CMPL_TMOUT_RESEND; in ixgbe_set_pcie_completion_timeout()
66 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr); in ixgbe_set_pcie_completion_timeout()
/openbmc/linux/Documentation/devicetree/bindings/arm/cpu-enable-method/
H A Dnuvoton,npcm750-smp15 "nuvoton,npcm750-gcr".

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