18e7e8a5bSLeon Alrae /* 28e7e8a5bSLeon Alrae * Coherent Processing System emulation. 38e7e8a5bSLeon Alrae * 48e7e8a5bSLeon Alrae * Copyright (c) 2016 Imagination Technologies 58e7e8a5bSLeon Alrae * 68e7e8a5bSLeon Alrae * This library is free software; you can redistribute it and/or 78e7e8a5bSLeon Alrae * modify it under the terms of the GNU Lesser General Public 88e7e8a5bSLeon Alrae * License as published by the Free Software Foundation; either 9*d136ecc0SChetan Pant * version 2.1 of the License, or (at your option) any later version. 108e7e8a5bSLeon Alrae * 118e7e8a5bSLeon Alrae * This library is distributed in the hope that it will be useful, 128e7e8a5bSLeon Alrae * but WITHOUT ANY WARRANTY; without even the implied warranty of 138e7e8a5bSLeon Alrae * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 148e7e8a5bSLeon Alrae * Lesser General Public License for more details. 158e7e8a5bSLeon Alrae * 168e7e8a5bSLeon Alrae * You should have received a copy of the GNU Lesser General Public 178e7e8a5bSLeon Alrae * License along with this library; if not, see <http://www.gnu.org/licenses/>. 188e7e8a5bSLeon Alrae */ 198e7e8a5bSLeon Alrae 208e7e8a5bSLeon Alrae #ifndef MIPS_CPS_H 218e7e8a5bSLeon Alrae #define MIPS_CPS_H 228e7e8a5bSLeon Alrae 238e7e8a5bSLeon Alrae #include "hw/sysbus.h" 24e8373c56SPhilippe Mathieu-Daudé #include "hw/clock.h" 25a9bd9b5aSLeon Alrae #include "hw/misc/mips_cmgcr.h" 2619494f81SLeon Alrae #include "hw/intc/mips_gic.h" 272edd5261SLeon Alrae #include "hw/misc/mips_cpc.h" 2840829435SLeon Alrae #include "hw/misc/mips_itu.h" 29ec150c7eSMarkus Armbruster #include "target/mips/cpu.h" 30db1015e9SEduardo Habkost #include "qom/object.h" 318e7e8a5bSLeon Alrae 328e7e8a5bSLeon Alrae #define TYPE_MIPS_CPS "mips-cps" 338063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(MIPSCPSState, MIPS_CPS) 348e7e8a5bSLeon Alrae 35db1015e9SEduardo Habkost struct MIPSCPSState { 368e7e8a5bSLeon Alrae SysBusDevice parent_obj; 378e7e8a5bSLeon Alrae 388e7e8a5bSLeon Alrae uint32_t num_vp; 398e7e8a5bSLeon Alrae uint32_t num_irq; 40a7519f2bSIgor Mammedov char *cpu_type; 418e7e8a5bSLeon Alrae 428e7e8a5bSLeon Alrae MemoryRegion container; 43a9bd9b5aSLeon Alrae MIPSGCRState gcr; 4419494f81SLeon Alrae MIPSGICState gic; 452edd5261SLeon Alrae MIPSCPCState cpc; 4640829435SLeon Alrae MIPSITUState itu; 47e8373c56SPhilippe Mathieu-Daudé Clock *clock; 48db1015e9SEduardo Habkost }; 498e7e8a5bSLeon Alrae 508e7e8a5bSLeon Alrae qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number); 518e7e8a5bSLeon Alrae 528e7e8a5bSLeon Alrae #endif 53