16cc82f07STomer Maimon// SPDX-License-Identifier: GPL-2.0
26cc82f07STomer Maimon// Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com
36cc82f07STomer Maimon
46cc82f07STomer Maimon#include <dt-bindings/clock/nuvoton,npcm845-clk.h>
56cc82f07STomer Maimon#include <dt-bindings/interrupt-controller/arm-gic.h>
66cc82f07STomer Maimon#include <dt-bindings/interrupt-controller/irq.h>
76cc82f07STomer Maimon
86cc82f07STomer Maimon/ {
96cc82f07STomer Maimon	#address-cells = <2>;
106cc82f07STomer Maimon	#size-cells = <2>;
116cc82f07STomer Maimon	interrupt-parent = <&gic>;
126cc82f07STomer Maimon
136cc82f07STomer Maimon	soc {
146cc82f07STomer Maimon		#address-cells = <2>;
156cc82f07STomer Maimon		#size-cells = <2>;
166cc82f07STomer Maimon		compatible = "simple-bus";
176cc82f07STomer Maimon		interrupt-parent = <&gic>;
186cc82f07STomer Maimon		ranges;
196cc82f07STomer Maimon
206cc82f07STomer Maimon		gcr: system-controller@f0800000 {
216cc82f07STomer Maimon			compatible = "nuvoton,npcm845-gcr", "syscon";
226cc82f07STomer Maimon			reg = <0x0 0xf0800000 0x0 0x1000>;
236cc82f07STomer Maimon		};
246cc82f07STomer Maimon
256cc82f07STomer Maimon		gic: interrupt-controller@dfff9000 {
266cc82f07STomer Maimon			compatible = "arm,gic-400";
276cc82f07STomer Maimon			reg = <0x0 0xdfff9000 0x0 0x1000>,
286cc82f07STomer Maimon			      <0x0 0xdfffa000 0x0 0x2000>,
296cc82f07STomer Maimon			      <0x0 0xdfffc000 0x0 0x2000>,
306cc82f07STomer Maimon			      <0x0 0xdfffe000 0x0 0x2000>;
316cc82f07STomer Maimon			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
326cc82f07STomer Maimon			#interrupt-cells = <3>;
336cc82f07STomer Maimon			interrupt-controller;
346cc82f07STomer Maimon			#address-cells = <0>;
356cc82f07STomer Maimon			ppi-partitions {
366cc82f07STomer Maimon				ppi_cluster0: interrupt-partition-0 {
376cc82f07STomer Maimon					affinity = <&cpu0 &cpu1 &cpu2 &cpu3>;
386cc82f07STomer Maimon				};
396cc82f07STomer Maimon			};
406cc82f07STomer Maimon		};
416cc82f07STomer Maimon	};
426cc82f07STomer Maimon
436cc82f07STomer Maimon	ahb {
446cc82f07STomer Maimon		#address-cells = <2>;
456cc82f07STomer Maimon		#size-cells = <2>;
466cc82f07STomer Maimon		compatible = "simple-bus";
476cc82f07STomer Maimon		interrupt-parent = <&gic>;
486cc82f07STomer Maimon		ranges;
496cc82f07STomer Maimon
506cc82f07STomer Maimon		rstc: reset-controller@f0801000 {
516cc82f07STomer Maimon			compatible = "nuvoton,npcm845-reset";
526cc82f07STomer Maimon			reg = <0x0 0xf0801000 0x0 0x78>;
536cc82f07STomer Maimon			#reset-cells = <2>;
546cc82f07STomer Maimon			nuvoton,sysgcr = <&gcr>;
556cc82f07STomer Maimon		};
566cc82f07STomer Maimon
576cc82f07STomer Maimon		clk: clock-controller@f0801000 {
586cc82f07STomer Maimon			compatible = "nuvoton,npcm845-clk";
596cc82f07STomer Maimon			#clock-cells = <1>;
606cc82f07STomer Maimon			reg = <0x0 0xf0801000 0x0 0x1000>;
616cc82f07STomer Maimon		};
626cc82f07STomer Maimon
636cc82f07STomer Maimon		apb {
646cc82f07STomer Maimon			#address-cells = <1>;
656cc82f07STomer Maimon			#size-cells = <1>;
666cc82f07STomer Maimon			compatible = "simple-bus";
676cc82f07STomer Maimon			interrupt-parent = <&gic>;
686cc82f07STomer Maimon			ranges = <0x0 0x0 0xf0000000 0x00300000>,
696cc82f07STomer Maimon				<0xfff00000 0x0 0xfff00000 0x00016000>;
706cc82f07STomer Maimon
71*d7c99890SIwona Winiarska			peci: peci-controller@100000 {
72*d7c99890SIwona Winiarska				compatible = "nuvoton,npcm845-peci";
73*d7c99890SIwona Winiarska				reg = <0x100000 0x1000>;
74*d7c99890SIwona Winiarska				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
75*d7c99890SIwona Winiarska				clocks = <&clk NPCM8XX_CLK_APB3>;
76*d7c99890SIwona Winiarska				cmd-timeout-ms = <1000>;
77*d7c99890SIwona Winiarska				status = "disabled";
78*d7c99890SIwona Winiarska			};
79*d7c99890SIwona Winiarska
806cc82f07STomer Maimon			timer0: timer@8000 {
816cc82f07STomer Maimon				compatible = "nuvoton,npcm845-timer";
826cc82f07STomer Maimon				interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
836cc82f07STomer Maimon				reg = <0x8000 0x1C>;
846cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_REFCLK>;
856cc82f07STomer Maimon				clock-names = "refclk";
866cc82f07STomer Maimon			};
876cc82f07STomer Maimon
886cc82f07STomer Maimon			serial0: serial@0 {
896cc82f07STomer Maimon				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
906cc82f07STomer Maimon				reg = <0x0 0x1000>;
916cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_UART>;
926cc82f07STomer Maimon				interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
936cc82f07STomer Maimon				reg-shift = <2>;
946cc82f07STomer Maimon				status = "disabled";
956cc82f07STomer Maimon			};
966cc82f07STomer Maimon
976cc82f07STomer Maimon			serial1: serial@1000 {
986cc82f07STomer Maimon				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
996cc82f07STomer Maimon				reg = <0x1000 0x1000>;
1006cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_UART>;
1016cc82f07STomer Maimon				interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
1026cc82f07STomer Maimon				reg-shift = <2>;
1036cc82f07STomer Maimon				status = "disabled";
1046cc82f07STomer Maimon			};
1056cc82f07STomer Maimon
1066cc82f07STomer Maimon			serial2: serial@2000 {
1076cc82f07STomer Maimon				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
1086cc82f07STomer Maimon				reg = <0x2000 0x1000>;
1096cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_UART>;
1106cc82f07STomer Maimon				interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
1116cc82f07STomer Maimon				reg-shift = <2>;
1126cc82f07STomer Maimon				status = "disabled";
1136cc82f07STomer Maimon			};
1146cc82f07STomer Maimon
1156cc82f07STomer Maimon			serial3: serial@3000 {
1166cc82f07STomer Maimon				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
1176cc82f07STomer Maimon				reg = <0x3000 0x1000>;
1186cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_UART>;
1196cc82f07STomer Maimon				interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
1206cc82f07STomer Maimon				reg-shift = <2>;
1216cc82f07STomer Maimon				status = "disabled";
1226cc82f07STomer Maimon			};
1236cc82f07STomer Maimon
1246cc82f07STomer Maimon			serial4: serial@4000 {
1256cc82f07STomer Maimon				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
1266cc82f07STomer Maimon				reg = <0x4000 0x1000>;
1276cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_UART>;
1286cc82f07STomer Maimon				interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
1296cc82f07STomer Maimon				reg-shift = <2>;
1306cc82f07STomer Maimon				status = "disabled";
1316cc82f07STomer Maimon			};
1326cc82f07STomer Maimon
1336cc82f07STomer Maimon			serial5: serial@5000 {
1346cc82f07STomer Maimon				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
1356cc82f07STomer Maimon				reg = <0x5000 0x1000>;
1366cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_UART>;
1376cc82f07STomer Maimon				interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1386cc82f07STomer Maimon				reg-shift = <2>;
1396cc82f07STomer Maimon				status = "disabled";
1406cc82f07STomer Maimon			};
1416cc82f07STomer Maimon
1426cc82f07STomer Maimon			serial6: serial@6000 {
1436cc82f07STomer Maimon				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
1446cc82f07STomer Maimon				reg = <0x6000 0x1000>;
1456cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_UART>;
1466cc82f07STomer Maimon				interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
1476cc82f07STomer Maimon				reg-shift = <2>;
1486cc82f07STomer Maimon				status = "disabled";
1496cc82f07STomer Maimon			};
1506cc82f07STomer Maimon
1516cc82f07STomer Maimon			watchdog0: watchdog@801c {
1526cc82f07STomer Maimon				compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt";
1536cc82f07STomer Maimon				interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1546cc82f07STomer Maimon				reg = <0x801c 0x4>;
1556cc82f07STomer Maimon				status = "disabled";
1566cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_REFCLK>;
1576cc82f07STomer Maimon				syscon = <&gcr>;
1586cc82f07STomer Maimon			};
1596cc82f07STomer Maimon
1606cc82f07STomer Maimon			watchdog1: watchdog@901c {
1616cc82f07STomer Maimon				compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt";
1626cc82f07STomer Maimon				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1636cc82f07STomer Maimon				reg = <0x901c 0x4>;
1646cc82f07STomer Maimon				status = "disabled";
1656cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_REFCLK>;
1666cc82f07STomer Maimon				syscon = <&gcr>;
1676cc82f07STomer Maimon			};
1686cc82f07STomer Maimon
1696cc82f07STomer Maimon			watchdog2: watchdog@a01c {
1706cc82f07STomer Maimon				compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt";
1716cc82f07STomer Maimon				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1726cc82f07STomer Maimon				reg = <0xa01c 0x4>;
1736cc82f07STomer Maimon				status = "disabled";
1746cc82f07STomer Maimon				clocks = <&clk NPCM8XX_CLK_REFCLK>;
1756cc82f07STomer Maimon				syscon = <&gcr>;
1766cc82f07STomer Maimon			};
1776cc82f07STomer Maimon		};
1786cc82f07STomer Maimon	};
1796cc82f07STomer Maimon};
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