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Searched refs:dw (Results 1 – 25 of 92) sorted by relevance

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/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_stratix10.dtsi129 compatible = "snps,dw-apb-gpio";
135 compatible = "snps,dw-apb-gpio-port";
150 compatible = "snps,dw-apb-gpio";
156 compatible = "snps,dw-apb-gpio-port";
226 compatible = "altr,socfpga-dw-mshc";
249 compatible = "snps,dw-apb-ssi";
262 compatible = "snps,dw-apb-ssi";
289 compatible = "snps,dw-apb-timer";
295 compatible = "snps,dw-apb-timer";
301 compatible = "snps,dw-apb-timer";
[all …]
H A Dsocfpga.dtsi585 compatible = "snps,dw-apb-gpio";
591 compatible = "snps,dw-apb-gpio-port";
605 compatible = "snps,dw-apb-gpio";
611 compatible = "snps,dw-apb-gpio-port";
625 compatible = "snps,dw-apb-gpio";
631 compatible = "snps,dw-apb-gpio-port";
730 compatible = "altr,socfpga-dw-mshc";
798 compatible = "snps,dw-apb-ssi";
809 compatible = "snps,dw-apb-ssi";
833 compatible = "snps,dw-apb-timer";
[all …]
H A Dsocfpga_arria10.dtsi497 compatible = "snps,dw-apb-gpio";
502 compatible = "snps,dw-apb-gpio-port";
517 compatible = "snps,dw-apb-gpio";
522 compatible = "snps,dw-apb-gpio-port";
537 compatible = "snps,dw-apb-gpio";
542 compatible = "snps,dw-apb-gpio-port";
624 compatible = "snps,dw-apb-ssi";
657 compatible = "altr,socfpga-dw-mshc";
793 compatible = "snps,dw-apb-timer";
801 compatible = "snps,dw-apb-timer";
[all …]
H A Drk3xxx.dtsi115 compatible = "snps,dw-apb-uart";
126 compatible = "snps,dw-apb-uart";
188 compatible = "rockchip,rk2928-dw-mshc";
198 compatible = "rockchip,rk2928-dw-mshc";
208 compatible = "rockchip,rk2928-dw-mshc";
290 compatible = "snps,dw-wdt";
359 compatible = "snps,dw-apb-uart";
371 compatible = "snps,dw-apb-uart";
H A Drv1108.dtsi82 compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
96 compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
110 compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
185 compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
197 compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
209 compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
H A Dfsl-ls2080a.dtsi101 compatible = "fsl,ls-pcie", "snps,dw-pcie";
116 compatible = "fsl,ls-pcie", "snps,dw-pcie";
131 compatible = "fsl,ls-pcie", "snps,dw-pcie";
146 compatible = "fsl,ls-pcie", "snps,dw-pcie";
H A Drk3036.dtsi111 compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
124 compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
137 compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
243 compatible = "rockchip,rk3288-dw-mshc";
268 compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
H A Dmeson-gxm.dtsi114 compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
H A Dsun8i-r40.dtsi323 compatible = "snps,dw-apb-uart";
334 compatible = "snps,dw-apb-uart";
345 compatible = "snps,dw-apb-uart";
356 compatible = "snps,dw-apb-uart";
367 compatible = "snps,dw-apb-uart";
378 compatible = "snps,dw-apb-uart";
389 compatible = "snps,dw-apb-uart";
400 compatible = "snps,dw-apb-uart";
H A Dsun50i-h6.dtsi195 compatible = "snps,dw-apb-uart";
206 compatible = "snps,dw-apb-uart";
217 compatible = "snps,dw-apb-uart";
228 compatible = "snps,dw-apb-uart";
/openbmc/qemu/hw/xen/
H A Dxen_pt_config_init.c717 .u.dw.read = xen_pt_bar_reg_read,
718 .u.dw.write = xen_pt_bar_reg_write,
726 .u.dw.read = xen_pt_bar_reg_read,
727 .u.dw.write = xen_pt_bar_reg_write,
735 .u.dw.read = xen_pt_bar_reg_read,
736 .u.dw.write = xen_pt_bar_reg_write,
744 .u.dw.read = xen_pt_bar_reg_read,
745 .u.dw.write = xen_pt_bar_reg_write,
753 .u.dw.read = xen_pt_bar_reg_read,
754 .u.dw.write = xen_pt_bar_reg_write,
[all …]
/openbmc/u-boot/drivers/ddr/fsl/
H A Dmain.c259 unsigned int dw; in __step_assign_addresses() local
262 dw = pinfo->dimm_params[i][j].primary_sdram_width; in __step_assign_addresses()
263 if ((dw == 72 || dw == 64)) { in __step_assign_addresses()
266 } else if ((dw == 40 || dw == 32)) { in __step_assign_addresses()
276 unsigned int dw; in __step_assign_addresses() local
277 dw = pinfo->dimm_params[i][j].data_width; in __step_assign_addresses()
279 && (dw == 72 || dw == 64)) { in __step_assign_addresses()
/openbmc/u-boot/doc/device-tree-bindings/pci/
H A Darmada8k-pcie.txt7 - compatible : should be "marvell,armada8k-pcie", "snps,dw-pcie".
10 points to the pcie configuration registers as mentioned in dw-pcie dt bindings in the link below.
26 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
/openbmc/u-boot/doc/device-tree-bindings/serial/
H A Dsnps-dw-apb-uart.txt4 - compatible : "snps,dw-apb-uart"
43 compatible = "snps,dw-apb-uart";
58 compatible = "snps,dw-apb-uart";
69 compatible = "snps,dw-apb-uart";
/openbmc/u-boot/drivers/pci/
H A Dpcie_intel_fpga.c147 u32 dw[4]; in tlp_read_packet() local
156 dw[count++] = cra_readl(pcie, RP_RXCPL_REG); in tlp_read_packet()
161 dw[count++] = cra_readl(pcie, RP_RXCPL_REG); in tlp_read_packet()
163 comp_status = TLP_COMP_STATUS(dw[1]); in tlp_read_packet()
168 TLP_BYTE_COUNT(dw[1]) == sizeof(u32) && in tlp_read_packet()
170 *value = dw[3]; in tlp_read_packet()
/openbmc/u-boot/arch/arc/dts/
H A Daxs10x_mb.dtsi57 compatible = "snps,dw-apb-uart";
65 compatible = "snps,dw-apb-ssi";
H A Dabilis_tb100.dts26 compatible = "snps,dw-apb-uart";
H A Demsdp.dts29 compatible = "snps,dw-apb-uart";
H A Dhsdk.dts66 compatible = "snps,dw-apb-uart";
90 compatible = "snps,dw-apb-ssi";
/openbmc/qemu/target/ppc/
H A Dcpu.c142 bool dw = extract32(dawrx, PPC_BIT_NR(57), 1); in ppc_update_daw() local
155 if (!dr && !dw) { in ppc_update_daw()
168 if (dw) { in ppc_update_daw()
/openbmc/qemu/libdecnumber/dpd/
H A Ddecimal32.c86 decNumber dw; /* work */ in decimal32FromNumber() local
103 decNumberPlus(&dw, dn, &dc); /* (round and check) */ in decimal32FromNumber()
105 dw.bits|=dn->bits&DECNEG; in decimal32FromNumber()
107 dn=&dw; /* use the work number */ in decimal32FromNumber()
H A Ddecimal128.c86 decNumber dw; /* work */ in decimal128FromNumber() local
107 decNumberPlus(&dw, dn, &dc); /* (round and check) */ in decimal128FromNumber()
109 dw.bits|=dn->bits&DECNEG; in decimal128FromNumber()
111 dn=&dw; /* use the work number */ in decimal128FromNumber()
/openbmc/qemu/hw/sd/
H A Domap_mmc.c45 int dw; member
310 host->dw = 0; in omap_mmc_reset()
352 return (s->dw << 15) | (s->mode << 12) | (s->enable << 11) | in omap_mmc_read()
462 s->dw = (value >> 15) & 1; in omap_mmc_write()
475 if (s->dw != 0 && s->lines < 4) in omap_mmc_write()
/openbmc/qemu/hw/i3c/
H A Dmeson.build4 i3c_ss.add(when: 'CONFIG_DW_I3C', if_true: files('dw-i3c.c'))
/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dsdram.c26 u32 dw = DDR_DW32 ? 4 : 2; in sdram_size() local
31 size = (1 << (DDR_ROW + DDR_COL)) * dw * banks; in sdram_size()
35 size = (1 << (DDR_ROW + DDR_COL)) * dw * banks; in sdram_size()

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