100b70788SNikunj A Dadhania /*
200b70788SNikunj A Dadhania * PowerPC CPU routines for qemu.
300b70788SNikunj A Dadhania *
400b70788SNikunj A Dadhania * Copyright (c) 2017 Nikunj A Dadhania, IBM Corporation.
500b70788SNikunj A Dadhania *
600b70788SNikunj A Dadhania * This library is free software; you can redistribute it and/or
700b70788SNikunj A Dadhania * modify it under the terms of the GNU Lesser General Public
800b70788SNikunj A Dadhania * License as published by the Free Software Foundation; either
96bd039cdSChetan Pant * version 2.1 of the License, or (at your option) any later version.
1000b70788SNikunj A Dadhania *
1100b70788SNikunj A Dadhania * This library is distributed in the hope that it will be useful,
1200b70788SNikunj A Dadhania * but WITHOUT ANY WARRANTY; without even the implied warranty of
1300b70788SNikunj A Dadhania * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
1400b70788SNikunj A Dadhania * Lesser General Public License for more details.
1500b70788SNikunj A Dadhania *
1600b70788SNikunj A Dadhania * You should have received a copy of the GNU Lesser General Public
1700b70788SNikunj A Dadhania * License along with this library; if not, see <http://www.gnu.org/licenses/>.
1800b70788SNikunj A Dadhania */
1900b70788SNikunj A Dadhania
2000b70788SNikunj A Dadhania #include "qemu/osdep.h"
2100b70788SNikunj A Dadhania #include "cpu.h"
2200b70788SNikunj A Dadhania #include "cpu-models.h"
23172d74efSBruno Larsen (billionai) #include "cpu-qom.h"
24172d74efSBruno Larsen (billionai) #include "exec/log.h"
25c19940dbSBruno Larsen (billionai) #include "fpu/softfloat-helpers.h"
26172d74efSBruno Larsen (billionai) #include "mmu-hash64.h"
27a3f5c315SBruno Larsen (billionai) #include "helper_regs.h"
28fe43ba97SBruno Larsen (billionai) #include "sysemu/tcg.h"
2900b70788SNikunj A Dadhania
cpu_read_xer(const CPUPPCState * env)3010de0521SMatheus Ferst target_ulong cpu_read_xer(const CPUPPCState *env)
3100b70788SNikunj A Dadhania {
32dd09c361SNikunj A Dadhania if (is_isa300(env)) {
33dd09c361SNikunj A Dadhania return env->xer | (env->so << XER_SO) |
34dd09c361SNikunj A Dadhania (env->ov << XER_OV) | (env->ca << XER_CA) |
35dd09c361SNikunj A Dadhania (env->ov32 << XER_OV32) | (env->ca32 << XER_CA32);
36dd09c361SNikunj A Dadhania }
37dd09c361SNikunj A Dadhania
3800b70788SNikunj A Dadhania return env->xer | (env->so << XER_SO) | (env->ov << XER_OV) |
3900b70788SNikunj A Dadhania (env->ca << XER_CA);
4000b70788SNikunj A Dadhania }
4100b70788SNikunj A Dadhania
cpu_write_xer(CPUPPCState * env,target_ulong xer)4200b70788SNikunj A Dadhania void cpu_write_xer(CPUPPCState *env, target_ulong xer)
4300b70788SNikunj A Dadhania {
4400b70788SNikunj A Dadhania env->so = (xer >> XER_SO) & 1;
4500b70788SNikunj A Dadhania env->ov = (xer >> XER_OV) & 1;
4600b70788SNikunj A Dadhania env->ca = (xer >> XER_CA) & 1;
47dd09c361SNikunj A Dadhania /* write all the flags, while reading back check of isa300 */
48dd09c361SNikunj A Dadhania env->ov32 = (xer >> XER_OV32) & 1;
49dd09c361SNikunj A Dadhania env->ca32 = (xer >> XER_CA32) & 1;
50dd09c361SNikunj A Dadhania env->xer = xer & ~((1ul << XER_SO) |
51dd09c361SNikunj A Dadhania (1ul << XER_OV) | (1ul << XER_CA) |
52dd09c361SNikunj A Dadhania (1ul << XER_OV32) | (1ul << XER_CA32));
5300b70788SNikunj A Dadhania }
54c19940dbSBruno Larsen (billionai)
ppc_store_vscr(CPUPPCState * env,uint32_t vscr)55c19940dbSBruno Larsen (billionai) void ppc_store_vscr(CPUPPCState *env, uint32_t vscr)
56c19940dbSBruno Larsen (billionai) {
57c19940dbSBruno Larsen (billionai) env->vscr = vscr & ~(1u << VSCR_SAT);
58c19940dbSBruno Larsen (billionai) /* Which bit we set is completely arbitrary, but clear the rest. */
59c19940dbSBruno Larsen (billionai) env->vscr_sat.u64[0] = vscr & (1u << VSCR_SAT);
60c19940dbSBruno Larsen (billionai) env->vscr_sat.u64[1] = 0;
61c19940dbSBruno Larsen (billionai) set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status);
62*af03aeb6SRichard Henderson set_flush_inputs_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status);
63c19940dbSBruno Larsen (billionai) }
64c19940dbSBruno Larsen (billionai)
ppc_get_vscr(CPUPPCState * env)65c19940dbSBruno Larsen (billionai) uint32_t ppc_get_vscr(CPUPPCState *env)
66c19940dbSBruno Larsen (billionai) {
67c19940dbSBruno Larsen (billionai) uint32_t sat = (env->vscr_sat.u64[0] | env->vscr_sat.u64[1]) != 0;
68c19940dbSBruno Larsen (billionai) return env->vscr | (sat << VSCR_SAT);
69c19940dbSBruno Larsen (billionai) }
70172d74efSBruno Larsen (billionai)
ppc_set_cr(CPUPPCState * env,uint64_t cr)712060436aSHarsh Prateek Bora void ppc_set_cr(CPUPPCState *env, uint64_t cr)
722060436aSHarsh Prateek Bora {
732060436aSHarsh Prateek Bora for (int i = 7; i >= 0; i--) {
742060436aSHarsh Prateek Bora env->crf[i] = cr & 0xf;
752060436aSHarsh Prateek Bora cr >>= 4;
762060436aSHarsh Prateek Bora }
772060436aSHarsh Prateek Bora }
782060436aSHarsh Prateek Bora
ppc_get_cr(const CPUPPCState * env)792060436aSHarsh Prateek Bora uint64_t ppc_get_cr(const CPUPPCState *env)
802060436aSHarsh Prateek Bora {
812060436aSHarsh Prateek Bora uint64_t cr = 0;
822060436aSHarsh Prateek Bora for (int i = 0; i < 8; i++) {
832060436aSHarsh Prateek Bora cr |= (env->crf[i] & 0xf) << (4 * (7 - i));
842060436aSHarsh Prateek Bora }
852060436aSHarsh Prateek Bora return cr;
862060436aSHarsh Prateek Bora }
872060436aSHarsh Prateek Bora
88a3f5c315SBruno Larsen (billionai) /* GDBstub can read and write MSR... */
ppc_store_msr(CPUPPCState * env,target_ulong value)89a3f5c315SBruno Larsen (billionai) void ppc_store_msr(CPUPPCState *env, target_ulong value)
90a3f5c315SBruno Larsen (billionai) {
91a3f5c315SBruno Larsen (billionai) hreg_store_msr(env, value, 0);
92a3f5c315SBruno Larsen (billionai) }
93a3f5c315SBruno Larsen (billionai)
946a8e8188SMatheus Ferst #if !defined(CONFIG_USER_ONLY)
ppc_store_lpcr(PowerPCCPU * cpu,target_ulong val)95a3f5c315SBruno Larsen (billionai) void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val)
96a3f5c315SBruno Larsen (billionai) {
97a3f5c315SBruno Larsen (billionai) PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
98a3f5c315SBruno Larsen (billionai) CPUPPCState *env = &cpu->env;
99a3f5c315SBruno Larsen (billionai)
100a3f5c315SBruno Larsen (billionai) env->spr[SPR_LPCR] = val & pcc->lpcr_mask;
101a3f5c315SBruno Larsen (billionai) /* The gtse bit affects hflags */
102a3f5c315SBruno Larsen (billionai) hreg_compute_hflags(env);
1032fdedcbcSMatheus Ferst
1042fdedcbcSMatheus Ferst ppc_maybe_interrupt(env);
105a3f5c315SBruno Larsen (billionai) }
10614192307SNicholas Piggin
10714192307SNicholas Piggin #if defined(TARGET_PPC64)
ppc_update_ciabr(CPUPPCState * env)10814192307SNicholas Piggin void ppc_update_ciabr(CPUPPCState *env)
10914192307SNicholas Piggin {
11014192307SNicholas Piggin CPUState *cs = env_cpu(env);
11114192307SNicholas Piggin target_ulong ciabr = env->spr[SPR_CIABR];
11214192307SNicholas Piggin target_ulong ciea, priv;
11314192307SNicholas Piggin
11414192307SNicholas Piggin ciea = ciabr & PPC_BITMASK(0, 61);
11514192307SNicholas Piggin priv = ciabr & PPC_BITMASK(62, 63);
11614192307SNicholas Piggin
11714192307SNicholas Piggin if (env->ciabr_breakpoint) {
11814192307SNicholas Piggin cpu_breakpoint_remove_by_ref(cs, env->ciabr_breakpoint);
11914192307SNicholas Piggin env->ciabr_breakpoint = NULL;
12014192307SNicholas Piggin }
12114192307SNicholas Piggin
12214192307SNicholas Piggin if (priv) {
12314192307SNicholas Piggin cpu_breakpoint_insert(cs, ciea, BP_CPU, &env->ciabr_breakpoint);
12414192307SNicholas Piggin }
12514192307SNicholas Piggin }
12614192307SNicholas Piggin
ppc_store_ciabr(CPUPPCState * env,target_ulong val)12714192307SNicholas Piggin void ppc_store_ciabr(CPUPPCState *env, target_ulong val)
12814192307SNicholas Piggin {
12914192307SNicholas Piggin env->spr[SPR_CIABR] = val;
13014192307SNicholas Piggin ppc_update_ciabr(env);
13114192307SNicholas Piggin }
132d5ee641cSNicholas Piggin
ppc_update_daw0(CPUPPCState * env)133d5ee641cSNicholas Piggin void ppc_update_daw0(CPUPPCState *env)
134d5ee641cSNicholas Piggin {
135d5ee641cSNicholas Piggin CPUState *cs = env_cpu(env);
136d5ee641cSNicholas Piggin target_ulong deaw = env->spr[SPR_DAWR0] & PPC_BITMASK(0, 60);
137d5ee641cSNicholas Piggin uint32_t dawrx = env->spr[SPR_DAWRX0];
138d5ee641cSNicholas Piggin int mrd = extract32(dawrx, PPC_BIT_NR(48), 54 - 48);
139d5ee641cSNicholas Piggin bool dw = extract32(dawrx, PPC_BIT_NR(57), 1);
140d5ee641cSNicholas Piggin bool dr = extract32(dawrx, PPC_BIT_NR(58), 1);
141d5ee641cSNicholas Piggin bool hv = extract32(dawrx, PPC_BIT_NR(61), 1);
142d5ee641cSNicholas Piggin bool sv = extract32(dawrx, PPC_BIT_NR(62), 1);
143d5ee641cSNicholas Piggin bool pr = extract32(dawrx, PPC_BIT_NR(62), 1);
144d5ee641cSNicholas Piggin vaddr len;
145d5ee641cSNicholas Piggin int flags;
146d5ee641cSNicholas Piggin
147d5ee641cSNicholas Piggin if (env->dawr0_watchpoint) {
148d5ee641cSNicholas Piggin cpu_watchpoint_remove_by_ref(cs, env->dawr0_watchpoint);
149d5ee641cSNicholas Piggin env->dawr0_watchpoint = NULL;
150d5ee641cSNicholas Piggin }
151d5ee641cSNicholas Piggin
152d5ee641cSNicholas Piggin if (!dr && !dw) {
153d5ee641cSNicholas Piggin return;
154d5ee641cSNicholas Piggin }
155d5ee641cSNicholas Piggin
156d5ee641cSNicholas Piggin if (!hv && !sv && !pr) {
157d5ee641cSNicholas Piggin return;
158d5ee641cSNicholas Piggin }
159d5ee641cSNicholas Piggin
160d5ee641cSNicholas Piggin len = (mrd + 1) * 8;
161d5ee641cSNicholas Piggin flags = BP_CPU | BP_STOP_BEFORE_ACCESS;
162d5ee641cSNicholas Piggin if (dr) {
163d5ee641cSNicholas Piggin flags |= BP_MEM_READ;
164d5ee641cSNicholas Piggin }
165d5ee641cSNicholas Piggin if (dw) {
166d5ee641cSNicholas Piggin flags |= BP_MEM_WRITE;
167d5ee641cSNicholas Piggin }
168d5ee641cSNicholas Piggin
169d5ee641cSNicholas Piggin cpu_watchpoint_insert(cs, deaw, len, flags, &env->dawr0_watchpoint);
170d5ee641cSNicholas Piggin }
171d5ee641cSNicholas Piggin
ppc_store_dawr0(CPUPPCState * env,target_ulong val)172d5ee641cSNicholas Piggin void ppc_store_dawr0(CPUPPCState *env, target_ulong val)
173d5ee641cSNicholas Piggin {
174d5ee641cSNicholas Piggin env->spr[SPR_DAWR0] = val;
175d5ee641cSNicholas Piggin ppc_update_daw0(env);
176d5ee641cSNicholas Piggin }
177d5ee641cSNicholas Piggin
ppc_store_dawrx0(CPUPPCState * env,uint32_t val)178d5ee641cSNicholas Piggin void ppc_store_dawrx0(CPUPPCState *env, uint32_t val)
179d5ee641cSNicholas Piggin {
180d5ee641cSNicholas Piggin int hrammc = extract32(val, PPC_BIT_NR(56), 1);
181d5ee641cSNicholas Piggin
182d5ee641cSNicholas Piggin if (hrammc) {
183d5ee641cSNicholas Piggin /* This might be done with a second watchpoint at the xor of DEAW[0] */
184d5ee641cSNicholas Piggin qemu_log_mask(LOG_UNIMP, "%s: DAWRX0[HRAMMC] is unimplemented\n",
185d5ee641cSNicholas Piggin __func__);
186d5ee641cSNicholas Piggin }
187d5ee641cSNicholas Piggin
188d5ee641cSNicholas Piggin env->spr[SPR_DAWRX0] = val;
189d5ee641cSNicholas Piggin ppc_update_daw0(env);
190d5ee641cSNicholas Piggin }
19114192307SNicholas Piggin #endif
1926a8e8188SMatheus Ferst #endif
193fe43ba97SBruno Larsen (billionai)
fpscr_set_rounding_mode(CPUPPCState * env)194fe43ba97SBruno Larsen (billionai) static inline void fpscr_set_rounding_mode(CPUPPCState *env)
195fe43ba97SBruno Larsen (billionai) {
196fe43ba97SBruno Larsen (billionai) int rnd_type;
197fe43ba97SBruno Larsen (billionai)
198fe43ba97SBruno Larsen (billionai) /* Set rounding mode */
199208d8033SVíctor Colombo switch (env->fpscr & FP_RN) {
200fe43ba97SBruno Larsen (billionai) case 0:
201fe43ba97SBruno Larsen (billionai) /* Best approximation (round to nearest) */
202fe43ba97SBruno Larsen (billionai) rnd_type = float_round_nearest_even;
203fe43ba97SBruno Larsen (billionai) break;
204fe43ba97SBruno Larsen (billionai) case 1:
205fe43ba97SBruno Larsen (billionai) /* Smaller magnitude (round toward zero) */
206fe43ba97SBruno Larsen (billionai) rnd_type = float_round_to_zero;
207fe43ba97SBruno Larsen (billionai) break;
208fe43ba97SBruno Larsen (billionai) case 2:
209fe43ba97SBruno Larsen (billionai) /* Round toward +infinite */
210fe43ba97SBruno Larsen (billionai) rnd_type = float_round_up;
211fe43ba97SBruno Larsen (billionai) break;
212fe43ba97SBruno Larsen (billionai) default:
213fe43ba97SBruno Larsen (billionai) case 3:
214fe43ba97SBruno Larsen (billionai) /* Round toward -infinite */
215fe43ba97SBruno Larsen (billionai) rnd_type = float_round_down;
216fe43ba97SBruno Larsen (billionai) break;
217fe43ba97SBruno Larsen (billionai) }
218fe43ba97SBruno Larsen (billionai) set_float_rounding_mode(rnd_type, &env->fp_status);
219fe43ba97SBruno Larsen (billionai) }
220fe43ba97SBruno Larsen (billionai)
ppc_store_fpscr(CPUPPCState * env,target_ulong val)221fe43ba97SBruno Larsen (billionai) void ppc_store_fpscr(CPUPPCState *env, target_ulong val)
222fe43ba97SBruno Larsen (billionai) {
22325ee608dSLucas Mateus Castro (alqotel) val &= FPSCR_MTFS_MASK;
224fe43ba97SBruno Larsen (billionai) if (val & FPSCR_IX) {
225fe43ba97SBruno Larsen (billionai) val |= FP_VX;
226fe43ba97SBruno Larsen (billionai) }
227fe43ba97SBruno Larsen (billionai) if ((val >> FPSCR_XX) & (val >> FPSCR_XE) & 0x1f) {
228fe43ba97SBruno Larsen (billionai) val |= FP_FEX;
229fe43ba97SBruno Larsen (billionai) }
230fe43ba97SBruno Larsen (billionai) env->fpscr = val;
23108e185caSLucas Mateus Castro (alqotel) env->fp_status.rebias_overflow = (FP_OE & env->fpscr) ? true : false;
23208e185caSLucas Mateus Castro (alqotel) env->fp_status.rebias_underflow = (FP_UE & env->fpscr) ? true : false;
233fe43ba97SBruno Larsen (billionai) if (tcg_enabled()) {
234fe43ba97SBruno Larsen (billionai) fpscr_set_rounding_mode(env);
235fe43ba97SBruno Larsen (billionai) }
236fe43ba97SBruno Larsen (billionai) }
237