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Searched refs:bit11 (Results 1 – 25 of 25) sorted by relevance

/openbmc/u-boot/board/buffalo/lsxl/
H A Dkwbimage-lschl.cfg41 # bit11-7: 0 required
57 # bit11-8: 4, 5 cyle tRP
80 # bit11-10: 0, Cs2size=nonexistent
106 # bit11-9: 3, Write recovery for auto-precharge (3 required)
119 # bit11: 0 required
132 # bit11: 0, 1/4 clock cycle skew disabled for write mesh
140 # bit11-8: 5, 5 cycles from read command to de-assertion of M_ODT signal
197 # bit11-10: 2, M_DQ, M_DM, and M_DQS I/O buffer ODT 75 ohm
H A Dkwbimage-lsxhl.cfg41 # bit11-7: 0 required
57 # bit11-8: 4, 5 cyle tRP
80 # bit11-10: 0, Cs2size=nonexistent
106 # bit11-9: 3, Write recovery for auto-precharge (3 required)
119 # bit11: 0 required
132 # bit11: 0, 1/4 clock cycle skew disabled for write mesh
140 # bit11-8: 5, 5 cycles from read command to de-assertion of M_ODT signal
197 # bit11-10: 2, M_DQ, M_DM, and M_DQS I/O buffer ODT 75 ohm
/openbmc/u-boot/board/d-link/dns325/
H A Dkwbimage.cfg39 # bit11-7: 0 required
54 # bit11-8: 4, 5 cyle tRP
75 # bit11-10: 0, Cs2size=nonexistent
98 # bit11-9: 0, Write recovery for auto-precharge (3 required ??)
110 # bit11: 0 required
122 # bit11: 0, 1/4 clock cycle skew disabled for write mesh
129 # bit11-8: 5, 5 cycles from read command to de-assertion of M_ODT signal
177 # bit11-10: 2, M_DQ, M_DM, and M_DQS I/O buffer ODT 75 ohm
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage-memphis.cfg68 # bit11- 8: TRP
89 # bit11-10: 00, Cs2size =nonexistent
115 # bit11: 0, required
127 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
134 # bit11-8 : 0101, M_ODT de-assertion 5 cycles after read
142 # bit11-8 : 0100, internal ODT assertion x cycles after write
170 # bit11-10:2, DQ_ODTSel. ODT select turned on, 75 ohm
H A Dkwbimage.cfg65 # bit11- 8: TRP
86 # bit11-10: 00, Cs2size =nonexistent
112 # bit11: 0, required
124 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
155 # bit11-10:2, DQ_ODTSel. ODT select turned on, 75 ohm
/openbmc/u-boot/board/LaCie/netspace_v2/
H A Dkwbimage-ns2l.cfg44 # bit11- 8: TRP
65 # bit11-10: 00, Cs2size =nonexistent
88 # bit11-9: 6, auto-precharge write recovery ????????????
100 # bit11: 0, required
112 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
143 # bit11-10:1, DQ_ODTSel. ODT select turned on
H A Dkwbimage.cfg44 # bit11- 8: TRP
65 # bit11-10: 00, Cs2size =nonexistent
88 # bit11-9: 6, auto-precharge write recovery ????????????
100 # bit11: 0, required
112 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
143 # bit11-10:1, DQ_ODTSel. ODT select turned on
H A Dkwbimage-is2.cfg44 # bit11- 8: TRP
65 # bit11-10: 00, Cs2size =nonexistent
88 # bit11-9: 6, auto-precharge write recovery ????????????
100 # bit11: 0, required
112 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
143 # bit11-10:1, DQ_ODTSel. ODT select turned on
/openbmc/u-boot/board/LaCie/net2big_v2/
H A Dkwbimage.cfg44 # bit11- 8: TRP
65 # bit11-10: 00, Cs2size =nonexistent
88 # bit11-9: 6, auto-precharge write recovery ????????????
100 # bit11: 0, required
112 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
143 # bit11-10:1, DQ_ODTSel. ODT select turned on
/openbmc/u-boot/board/Marvell/openrd/
H A Dkwbimage.cfg44 # bit11- 8: TRP
65 # bit11-10: 00, Cs2size =nonexistent
88 # bit11-9: 6, auto-precharge write recovery ????????????
100 # bit11: 0, required
112 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
142 # bit11-10: 01, M_DQ, M_DM, and M_DQS I/O buffer ODT Select: 150 ohm
/openbmc/u-boot/board/Seagate/nas220/
H A Dkwbimage.cfg48 # bit11- 8: TRP
70 # bit11-10: 00, Cs2size =nonexistent
93 # bit11-9: 6, auto-precharge write recovery ????????????
106 # bit11: 0, required
118 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
/openbmc/u-boot/board/Marvell/dreamplug/
H A Dkwbimage.cfg45 # bit11- 8: TRP
66 # bit11-10: 00, Cs2size =nonexistent
89 # bit11-9: 6, auto-precharge write recovery ????????????
101 # bit11: 0, required
113 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
/openbmc/u-boot/board/Marvell/sheevaplug/
H A Dkwbimage.cfg44 # bit11- 8: TRP
65 # bit11-10: 00, Cs2size =nonexistent
88 # bit11-9: 6, auto-precharge write recovery ????????????
100 # bit11: 0, required
112 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
/openbmc/u-boot/board/Seagate/dockstar/
H A Dkwbimage.cfg47 # bit11- 8: TRP
68 # bit11-10: 00, Cs2size =nonexistent
91 # bit11-9: 6, auto-precharge write recovery ????????????
103 # bit11: 0, required
115 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
/openbmc/u-boot/board/Marvell/guruplug/
H A Dkwbimage.cfg44 # bit11- 8: TRP
65 # bit11-10: 00, Cs2size =nonexistent
88 # bit11-9: 6, auto-precharge write recovery ????????????
100 # bit11: 0, required
112 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
/openbmc/u-boot/board/Seagate/goflexhome/
H A Dkwbimage.cfg50 # bit11- 8: TRP
71 # bit11-10: 00, Cs2size =nonexistent
94 # bit11-9: 6, auto-precharge write recovery ????????????
106 # bit11: 0, required
118 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
/openbmc/u-boot/board/Synology/ds109/
H A Dkwbimage.cfg48 # bit11- 8: TRP
69 # bit11-10: 00, Cs2size =nonexistent
92 # bit11-9: 6, auto-precharge write recovery ????????????
104 # bit11: 0, required
116 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
/openbmc/linux/include/uapi/linux/
H A Dioam6.h67 bit11:1, member
108 bit11:1, member
/openbmc/libpldm/include/libpldm/
H A Dpldm_types.h48 uint8_t bit11 : 1; member
70 uint8_t bit11 : 1; member
108 uint8_t bit11 : 1; member
/openbmc/u-boot/board/cloudengines/pogo_e02/
H A Dkwbimage.cfg48 # bit11- 8: TRP
69 # bit11-10: 00, Cs2size =nonexistent
92 # bit11-9: 6, auto-precharge write recovery ????????????
104 # bit11: 0, required
116 # bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
/openbmc/u-boot/board/raidsonic/ib62x0/
H A Dkwbimage.cfg45 # bit11-8: TRP
66 # bit11-10: 00, Cs2size (nonexistent)
89 # bit11-9: 0x6, auto-precharge write recovery
101 # bit11: 0, required
113 # bit11: 0x0, 1/4 clock cycle skew disabled for write mesh
/openbmc/u-boot/board/iomega/iconnect/
H A Dkwbimage.cfg44 # bit11-8: TRP
65 # bit11-10: 00, Cs2size (nonexistent)
88 # bit11-9: 0x6, auto-precharge write recovery
100 # bit11: 0, required
112 # bit11: 0x0, 1/4 clock cycle skew disabled for write mesh
/openbmc/linux/Documentation/arch/x86/
H A Dtsx_async_abort.rst117 CPUID(EAX=7).EBX{bit11} read as 0).
/openbmc/linux/tools/testing/selftests/net/
H A Dioam6_parser.c276 if (ioam6h->type.bit11) { in check_ioam6_data()
/openbmc/linux/net/ipv6/
H A Dioam6.c782 if (trace->type.bit11) { in __ioam6_fill_trace_data()